13 Semiconductors A (Silicon)
13.1 Fundamental Materials Characterization and Evaluation
Sept. 2 9:15〜17:00
2a-G-　/ II
1 Feasibility of tungsten films deposition using a novel F free tungsten precursor Air Liquide Laboratories1, Air Liquide2,　Ikuo Suzuki1, Kazutaka Yanagita1, Julien Gatineau1, Anthony CORREIA2, Andy ZAUNER
2 Shape-dependent of TEG that identifies thermal-treatment temperature Graduate School of Science and Technology Kumamoto University 1,Kumamoto University 2　*Keisuke Shiotsu 1, Takayuki Mizogami 1,Hiroshi Kubota 1, Masao Yoshioka 2
3 Biaxial Tensile Testing with Raman Spectroscopy for Evaluating Multi-Axis Stress State in Single Crystalline Silicon HORIBA, Ltd. 1, Univ. of HYOGO 2　*Shinsuke Kashiwagi 1, Naka Nobuyuki 1, Nagai Yuji 2, Namazu Takahiro 2, Inoue Shozo 2, Ohtsuki Kunio 1
△ 4 Evaluation of channel strain distribution in high-performance pMOSFET Meiji Univ. 1　*Munehisa Takei 1,Daisuke Kosemura 1,Atsushi Ogura 1
△ 5 Evaluation of strain induction in the channel of MOSFET with transparent dummy gate and SiN stressor Meiji Univ. 1, TOKYO ELECTRON AT 2　*Kosemura Daisuke 1, Takei Munehisa 1, Nagata Kohki 1, Akamatsu Hiroaki 1, Ogura Atsushi 1, Kohno Masayuki 2, Nishita Tatsuo 2, Nakanishi Toshio 2
Break 10:30〜10:45
▲ 6 Resistivity Measurement using the microwave reflection method Nagoya Inst. of Tech. 1　Sivvannagari Venkatramreddy 1, Kato Masashi 1, *Ichimura Masaya 1
7 UV Raman study of cleavage effects on stress distribution in Si STI cross sectional structures NIRC AIST　*Tetsuya Tada, Vladimir Poborchii, Toshihiko Kanayama
8 Evaluation of channel mobility for SOI structure Interdisciplinary Graduate School of Engineering Sciences, Kyushu Univ. 1,
Art, Science and Technology Center for Cooperative Research 2　*Satoshi Kojima 1, Dong Wang 2, Hiroshi Nakashima 2
9 Electrically detected magnetic resonance study of silicon MOSFET with trench gate structure Univ. of Tsukuba 1, Elpida Memory 2　Junichi Ohsaki 1, Takahide Umeda 1, Kensuke Okonogi 2, Kiyonori Ohyu 2
10 Dynamic fluctuation of leakage current in micro p-n junction CRL, Hitachi 1, Elpida Memory 2　*Yuki Mori 1, Kensuke Okonogi 2, Kiyonori Oyu 2, Kenichi Takeda 1, Ren-ichi Yamada 1
Lunch 12:00〜13:00
2p-G-　/ II
1 Fracture testing of piezoresistive differential tactile sensor array Graduate School of Science and Technology Kumamoto Univ. 1　*Soh Yuki 1, Miyamoto Yasuo 1, Kubota Hiroshi 1
2 Optical surface refractive index sensor using Si waveguide Waseda Univ. 1　Fukada Kota 1,Naoi Yusaku 1,Kobayashi Akane 1,Okayama Hideaki 1,
Nakajima Hirochika 1
3 Development of STM simulator considering tip-induced band bending for semiconductor measurement NIRC-AIST1　*Nishizawa Masayasu1, Bolotov Leonid1, Kanayama Toshihiko1
4 Doping concentration dependence of semiconductor local work function measured by STM NIRC-AIST1　*Nishizawa Masayasu1, Bolotov Leonid1, Kanayama Toshihiko1
5 Comparison of dopant distribution between n-type and p-type MOS by 3D atom-probe tomography IMR Tohoku Univ.1, MIRAI-Selete 2　*Inoue Koji 1, Yano Fumiko 2, Nishida Akio 2, Takaaki Tsunomura 2, Toyama Takeshi 1, Nagai Yasuyoshi 1, Hasegawa Masayuki 1
6 Atomic observation and analysis of directly bonded Si substrate interface Grad. Sch. Eng. Sci. Osaka Univ 1, Grad. Sch. Eng., Nagoya Univ 2, Covalent Materials Co., Ltd 3, UHVEM, Osaka Univ 4 　*Sakai Akira 1,Ueda Takaya 1,Ohara Yuji 1,Nakatsuka Osamu 2,Zaima Shigeaki 2,Toyoda Eiji 3,Izunome Kouji 3,Sakata Takao 4,Mori Hirotaro 4
△ 7 The in-situ measurement of thermal expansion coefficient of thin SiGe layer by XRD Meiji Univ. 1, Riken 2 , SUMCO TECHXIV Corp. 3 Rigaku Corp. 4　*Kambayashi Hirokazu 1,2, Yamamoto Yu 1,2, Imai Masato 2,3, Miyamura Yoshiji 2,3, Omote Kazuhiko 4 , Kobayashi Takane2 , Ogura Atsushi 1
8 IR observation of Silicon device using an ITO backside electrode Toyota Motor Corp. 1　*Nakagaki Shinji 1,Goto Yasunori 1
Break 15:00〜15:15
9 Profile of the local dielectric constant inside the ultrathin HfO2 film The Univ. Electro-Communications 1, The Univ. of Tokyo 2　Wakui Sadakazu 1, Nakamura Jun 1-2, Natori Akiko 1
10 First Principles Calculation of O-K ELNES in HfO2 NEC Corp. 1,The Univ. of Tokyo 2, JFCC 3　*Motofumi Saitoh 1, Teruyasu Mizoguchi 2, Yuichi Ikuhara 2,3
11 Transfer of a positive fixed charge at a Si/SiO2 interface with hydrogen migration(3) Musashi Inst. of Technology 1, Adv.Res.Lab. of Hitachi Ltd. 2　*Maruizumi Takuya 1, Ushio Jiro 2
12 Molecular Dynamics analysis of void type defects in silicon:Temperture dependence Kyushu Univ. 1　*Ogasawara Keita 1,Munetoh Shinzi 1,Motooka Teruaki 1
13 Magnetic Resonance of Phosphorus in Silicon with a Low Magnetic Field Keio Univ. 1, NTT/BRL 2, A.F. Ioffe Physico-Tech. Inst. 3 , Musashi Inst. Tech. 4　*Morishita Hiroki 1, Tanaka Hirotaka 2, Semba Kouichi 2 Vlasenko Leonid 3, Sawano Kentaro 4, Shiraki Yasuhiro 4, Itoh Kohei 1,
14 Sub-bandgap light absorption and carrier concentration in chalcogen doped silicon single crystal Fukuoka Univ. 1, Harvard School of Eng. & Appl. Sci. 2, The Australian National Univ. 3, U.S. Army-Benet Lab. 4, American University of Beirut 5, IESL-FORTH 6　*Atsushi Kohno 1, Brion Bob 2, Supakit Charnvanichborikarn 3, Jeffrey Warrender 4, Malek Tabbal 5, Dimitris Papazoglou 6, James S. Williams 3, Michael J. Aziz 2
▲ 15 The effect of phosphorus concentration within the spin-on doping source on emitter sheet resistance and carrier
lifetimes of p-type mc-Si wafers
 Tokyo A&T Univ.　1,　Jaballah Abdelkader Ben 1, Uzum Abdullah 1,*Supajariyawichai Piyasak 1, Ban Naoki 1, Marwan Dhamrin 1, Saito Tadashi 1, Kamisako Koichi 1
13.1 Fundamental Materials Characterization and Evaluation
Sept. 3 9:15〜12:00
3a-G-　/ II
1 Impurity doping in Si nanowires by ion-implantation and electrical activation of implanted impurities Inst. of Appl. Phys, Univ. of Tsukuba 1, NIMS 2, JST PRESTO 3　*Naoyuki Saito 1, Masanori Seoka 2, Naoki Fukata 2 3, Jun Chen 2, Takashi Sekiguchi 2, Shunnichi Hishita 2, Kouichi Murakami 1
2 Segregation behaviors of P and B in Si nanowires during thermal oxidation Inst.of Appl.Phys.,Univ.of Tsukuba 1, NIMS 2, JST PRESTO　*Seoka Masanori, Fukata Naoki, Saito Noyuki, Jun Chen, Sekiguchi Takashi, Murakami Kouichi
△ 3 Raman scattering studies of electrically active impurity in p-type/intrinsic and ntrinsic/p-type Si nanowires. Kobe Univ. 1, Matushita Electric Ind. Co.,Ltd 2　*Go Imamura 1, Takahiro Kasashima 2, Minoru Fujii 1, Chiharu Nishimura 1, Tohru Saitoh 2, Shinji Hayashi 1
△ 4 Raman scattering study of individual Si1-xGex nanowires Kobe Univ. 1, Matsushita Electric Ind. Co., Ltd 2　*Chiharu Nishimura 1, Go Imamura 1, Takahiro Kawashima 2, Minoru Fujii 1, Tohru Saitoh 2, Shinji Hayashi 1
5 Fabrication and Evaluation of Sn-catalyzed Silicon Nanowires (SiNWs) Tokyo Univ. of Agri. & Tech. 1
Nippon Inst. of Tech. 2　*Uchiyama Hisashi 1,Jyon Minson 1,Tomituka Yoshihiro 1,Maishigi Kazuya 1,Aoyagi Minoru 2,Kamisako Koichi 1
Break 10:30〜10:45
6 Nucleation Control for High Density Formation of Si Quantum Dots on Ultrathin SiO2 Grad. School of Advanced Sciences of Matter, Hiroshima Univ.　*Kawanami Akira 1,Makihara Katsunori 1,Ikeda Mitsuhisa 1,Higashi Seiichirou 1, Miyazaki Seiichi 1
7 Metal Nanodots Formation Induced by Remote Plasma Treatment-Comparison between the effects of H2 and rare gas plsamas Grad. School of AdSM Hiroshima Univ. 1　*Shimanoe Kazuhiro 1, Makihara Katsunori 1, Ikeda Mitsuhisa 1, Higashi Seiichiro 1, Miyazaki Seiichi 1
8 Behavior of deuterium atoms in thermally oxidized SiO2 layer containing silicon nanocrystals and at Si/ SiO2 interface Inst.of.Appl.Phys.,Univ.of Tsukuba 1, AIST-ASRC 2, NIMS 3, JST PRESTO 4, MST 5　*Tsujimura Masatoshi 1, Uchida Noriyuki 2, Fukata Noki 3,4 Hida Kennosuke 5, Kojima Kentarou 5, Kishimoto Noki 3, Murakami Kouichi 1
9 P doped silicon nanocrystals in SiO2 with hydrogen atom treatment Inst.of.Appl.Phys.,Univ.of Tsukuba 1, AIST-ASRC 2, NIMS 3, JST PRESTO 4　*Tsujimura Masatoshi 1, Uchida Noriyuki 2, Fukata Noki 3,4, Murakami Kouichi 1
10 Si nanocrystals formed by laser irradiation Univ. of electro-Communications 1　*Jaesung Lee 1,Nozaki Shinji 1,Koizumi Atsushi 1,Uchida Kazuo 1,Ono Hiroshi 1
13.2 Surface
Sept. 2 13:30〜17:00
2p-CD-　/ II
1 Characterization of diamond p-MOSFETs utilizing H-terminated (110) diamond surface Waseda Univ. 1, AIST 2　Kazuyuki Hirama 1, Tetsuya Tsuno 1, Kyosuke Tsuge 1, Yosuke Inoue 1, Yoshikatsu Jingu 1, Hitoshi Umezawa 2 and Hiroshi Kawarada 1
2 Microcanonical molecular-dynamics simulation of Si epitaxial film growth on hydrogen terminated surface Osaka Univ. 　Kouji Inagaki, Kikuji Hirose, Kiyoshi Yasutake
3 Residual Order in the Thermally Oxidized Thin Film of Strained SiGe Layer Grown on Si Substrate Osaka Univ.　*Takayoshi Shimura, Yuki Okamoto, Tomoyuki Inoue, Takuji Hosoi, and Heiji Watanabe
4 Experimental verification of the unified Si oxidation reaction model (4): dependence on surface oxidation reaction manner Tohoku Univ. 1, JAEA 2, Akita Nat. Col. Tech. 3　Ogawa Shuichi 1,　Hozumi Hideaki 1, Yoshigoe Akitaka 2, Ishidzuka Shinji 3, Teraoka Yuden 2, Takakuwa Yuji 1
5 Reaction mechanisms of H2O molecules at SiO2/Si interface Mie Univ. 1, NTT Basic Res. Labs. 2, Keio Univ. 3　*Toru Akiyama 1, Hiroyuki Kageshima 2, Masashi Uematsu 3, Tomonori Ito 1
6 Large-scale modeling of GeO2/Ge interface structure by means of classical molecular dynamics Waseda Univ. 1, Waseda INN. 2, ASMeW. 3　*Onda Tomoya 1, Watanabe Takanobu 1 2 3, Ohdomari Iwao 1 2 3
Break 15:00〜15:15
7 Thermal stability of thin HfO2 film: mechanism of void formation AIST-NeRI 1, Musashi Inst. Technol. 2　*Miyata Noriyuki 1,2, Abe Yasuhiro 2, Yasuda Tesuji 1
8 Perfectly coordinated defect-free Si3N4 film on Si(100) - Theoretical prediction - Toshiba RDC 1　*Koichi Kato 1, Daisuke Matsushita 1, Yuichiro Mitani 1
9 Annealing time dependency of low-energy ion irradiation effects on high-temperature Si(111) surface Waseda Univ. 1, Waseda ZAIKEN 2, ASMEW 3　*Kamioka Takefumi 1,2, Sato Kou 1, Kazama Yutaka 1, Ohdomari Iwao 1,2,3
10 Real-time STM observation of surface nano-modification by dopant ion irradiation on Si(001) Waseda Univ. 1,Waseda ZAIKEN 2,ASMEW 3　*Sato Kou 1,Kamioka Takefumi 1,2,Kazama Yutaka 1,Ohdomari Iwao 1,2,3
11 Oxidation of GaN Surface in High Pressure and High Temperature Water at 350℃ Organo Corp. 1, Osaka Univ. 2　*Futatsuki Takashi 1,2, Oe Taro 1, Aoki Hidemitsu 2, Komatsu Naoyoshi 2, Kimura Chiharu 2, Sugino Takashi 2
12 Adsorption and desorption of octanol on Silicon Surface Yokohama National Univ　* Kawahara Norihiro 1, Habuka Hitoshi 1
13 Preliminary tests on measuring instruments of trace moisture used for semiconductor manufacturing NMIJ AIST 1　*ABE Hisashi 1, KITANO Hiroshi 1
13.2 Surface
Sept. 3 9:30〜16:45
3a-CD-　/ II
1 Behavior of Au in Au-Contaminated and Thermally Oxidized n-Type Si(100) Surface (2) College of Engineeeing, Nihon Univ.　*Sadayoshi Shimada 1, Hirofumi Shimizu 1, Masanori Ikeda 1.
2 ISO TC201 WG2 activities– A history of ISO TC201 WG2 ISO TC201 WG2　*N. Yabumoto, K. Araki, A. Urano, S. Kozono, H. Shibata, A. Shimazaki, M. B. Shabani, H. Takahara, T. Tanaka, S. Taniike, T. Nakama, K. Nishihagi, Y. Mori, M. Yamagami, Y. Gohshi
3 ISO TC201 WG2 Activities – VPT-TXRF Round robin test ISO TC201 WG2　*H. Takahara,K. Araki, A. Urano, S. Kozono, H. Shibata, A. Shimazaki, M. B. Shabani, , T. Tanaka, S. Taniike, T. Nakama, K. Nishihagi, Y. Mori, N. Yabumoto, M. Yamagami, Y. Gohshi
4 Removal of Cu adsorbed on SiO2surfaces by defect passivation etchless cleaning solutions with an extremely low concentration Osaka Univ. 1, ISIR 2　*Yuko Higashi 1,2, Masao Takahashi 1,2, Hitoo Iwasa 1,2, Hikaru Kobayashi 1,2
Break 10:30〜10:45
5 Residual TOC on Ashingless Resist Removal Using Electrolyzed Sulfuric Acid Solution KURITA WATER INDUSTRIES LTD. 1, DAINIPPON SCREEN MFG.CO.,LTD. 2　Toru Otsu 1, Minoru Uchida 1, Tatsuo Nagai 1, Haruyoshi Yamakawa 1, Hiroaki Uchida 2, Tomomi Hirashita 2
6 Study on Ashingless Resist Removal of Single Wafer Cleaning Process Using Electrolyzed Sulfuric Acid Solution KURITA WATER INDUSTRIES LTD. 1　*Haruyoshi Yamakawa 1, Tatsuo Nagai 1, Minoru Uchida 1, Toru Otsu 1
7 Removal of high dose Ion-Implanted photoresists with SPMless cleaning(3) Fujitsu Microelectronics Ltd Aizuwakamatsu plant1,Aqua Science Corp2　*Toshiya Sato1,Tamotsu Suzuki1,Akihiko Tsukahara1,Kyota Morihira2
8 Removal of polymer with steam-water mixture spray Fujitsu Microelectronics Ltd Aizuwakamatsu plant1,Aqua Science Corp2 　*Toshiya Sato1,Tamotsu Suzuki1,Atsushi Hayashida2,Kunimitsu Matsuura2,Naomi Takahashi2
9 Cleaning technique of polymer residue using fluoro-compounds NTT-AT 1, AGC 2　*Namatsu Hideo 1, Ando Hiroshi 1, Takano Akio 1, Okamoto Hidekazu 2
Lunch 12:00〜13:30
3p-CD-　/ II
1 Si(001) Surface Etching by Oxygen Annealing - Eching Rate Measurement using AFM AIST NIRC 1, AIST NRI 2, AIST NeRI 3　*Yukinori Morita 1, Tetsuo Shimizu 2, Miyuki Tanaka 3, Shinji Migita 1, Hiroyuki Ota 1
2 Evaluation of the etching property for impurity-doped silicon thermal oxide Sony　Saito Suguru, Okuyama Atsushi, Hagimoto Yoshiya, Iwamoto Hayato
3 Change of oxide film etching rate by single wafer BHF treatment (2) Renesas technology corp. 1, Daikin Industries Ltd. 2 　Yusaku Hirota 1, Itaru Kanno 1, Mitsushi Itano 2, Yuusuke Etou 2
4 Evaluation of static electricity in the single wafer cleaning process Nec Electronics Corporation　Shunsuke Saito 1,Morimitsu Tanaka 1,Nobuko Serizawa
5 Behavior of Electro-static discharge in the single wafer cleaning process with inorganic chemistry Spansion Japan 1, SEZ Japan 2　Kato Takahiko 1, Usui Shungo 1, Hiraga Toshitaka 2, Nakano Tetsuya 2, Hayashi Hidekazu 2, *Mashimoto Satomi 2
△ 6 Development of water mark free drying process for hydrophobic Si surface by single wafer cleaning tool Toshiba Corp. Semiconductor Company 1, DAINIPPON SCREEN MFG Co.,Ltd 2　Yoshimizu Yasuhito 1, Mori Shinji 1, Umezawa Kaori 1, Ookuchi Hisashi 1, Tomita Hiroshi 1, Miya Katsuhiko 2
7 Dry Air Drying Technology *DAINIPPON SCREEN Mfg. Co., Ltd. , Toshiba semiconductor Co.,　*IwataTomomi, Higuchi Takashi, Furuichi Kohji, Tokuri Kentarou ,Matsubara Hideaki, Izumi Akira, Nadahara Souichi, Etoh Takanori, Yamada Hiroaki, Yonekura Yuri, FukuiHiroyuki, Nakajima Takahito
Break 15:15〜15:30
8 Effect of Mega-Sonic Wave on Bubble Motion in a Batch-Type Silicon Wafer Wet-Cleaning Bath Yokohama National Univ. 1, Pre-tech 2　Okada Yuta 1, *Fukumoto Ryohei 1, Yoshii Hirofumi 1,Habuka Hitoshi 1, Kato Masayuki 2
9 Characteristics of the Two Fluid Nozzle with a Rotation Atomizer for Device Wafer Cleaning Asahi Sunac Corp. 1, Kyushu Univ. 2　*Keiji Miyachi 1, Yoshiyuki Seike 1, Yoshinori Kobayashi 1, Toshiro Doi 2, Syuhei Kurokawa 2
10 The liquid action on the surface of a substrate in the single wafer cleaning equipment SHIBAURA MECHATRONICS 1,Toshiba Corporation 2　* Tsutomu kikuchi 1,Yosiaki.Kurokawa 1,Yuji Nagashima 1,Harumichi Hirose 1,Hisashi Ookuchi 2,Hiroshi Tomita 2
11 Evaluation of Particle Removal Efficiency of less than 30 nm filter Nihon Pall LTD. 1,　*Mizuno Takehito 1, Namiki Akihisa 1, Tsuzuki Shuichi 1, Numaguchi Toru 1,
12 Highly Sensitive　Analysis of Urea in Ultra Pure Water Organo Corp.R&D Center Analytical Deot.1,Organo Corp.R&D Center Development dept.1　*Iwamori Tomoyuki 1,Takeda Shunsuke 2,Ounobu Noriko 2,Kawada Kazuhiko 2,Umeka Akiko 1
13.3 Gate Insulator Technology
Sept. 2 9:15〜12:00
2a-Y-　/ II
1 Structures of SiO2 interfaces on high-index of Si evaluated by reflectance difference spectroscopy in VUV Yokohama National Univ. 1,AIST 2　*Ogata Shouichi 1,Ohono Shinya 1,Tanaka Masatoshi 1,Yasuda Tetsuji 2
2 Observation of two-dimensional trapped charge in TEOS-SiO2 Inst. of Appl. Phys, Univ. of Tsukuba 1,TIMS, Univ. of Tsukuba 2　*M.Sometani 1, R.Hasunuma 1,2 , K. Yamabe 1,2
3 Micro roughness of silicon dioxide thermally grown on atomically flat silicon terrace Inst. of Appl. Phys, Univ. of Tsukuba　1,Dept.Silicon Covalent Material 2,TIMS, Univ. of Tsukuba 3　*Ohsawa Keichiro 1,Hayashi Yusuke 1,Kogure Yosuke 1,Araki Koji 2,Isogai Hiromichi 2,Takeda Ryuji 1,2,Matsushita Yoshiaki 2,Hasunuma Ryu 1,3,Yamabe Kikuo 1,3
4 Native oxidation of super-flat Si surface Tokyo Univ. of Science. 1, Covalent Materials. 2　○Takahashi Naota 1, Araki Kouzi 1,2, Takeda Ryuzi 2, Matushita Yoshiaki 2, Zhao Xinwei 1
5 Reliability Control of Silicon Dioxide Films by Radical and Thermal Oxidation
 Tsukuba Univ. 1, Tsukuba Univ. TIMS 2.　*Zhao Lu 1, Sinkurou Sato 1, Ryu Hasunuma1,2, Kikuo Yamabe1,2
Break 10:30〜10:45
6 Reaction of oxinitridation species with an Si/SiO2 interface FUJITSU Lab.　*Yamasaki Takahiro, Kaneta Chioko
△ 7 Interface defects at SiO2/(100)Si biased between room and 200℃ temperature Kagawa Univ. 1　Shinichiro Ando 1, Yoshiaki Kamigaki 1
△ 8 Anisotropic and damage-free Oxidation for 3-dimentional structure transistor by Neutral Beam Oxidation Tohoku Univ. 1, AIST 2 　*Masahiro Yonemoto 1, Keisuke Sano 1, Kazuhiko Endo 2, Takashi Matsukawa 2, Meishoku Masahara 2, Seiji Samukawa 1
9 Evaluation of thermal tolerance of HfO2 by difference of ground structure. Tokyo Univ. Agri.&Tech. 1　*Takagi Tomomi 1, Iwazaki Yoshitaka 1, Hasumi Masahiko 1, Ueno Tomo 1, Kuroiwa Kouichi 1
△ 10 Ultrathin SiO2/Si　structure with a low leakage current density formed by 98wt% nitric acid solutions ISIR, Osaka Univ. 1, CREST-JST. 2.　*Woo-Byoung Kim 1.2, Takeshi Matsumoto 1.2, Hikaru Kobayashi 1.2
13.3 Gate Insulator Technology
Sept. 3 9:30〜17:45
3a-CB-　/ II
1 Annealing-temperature dependence of binding energy of photoelectron arising from HfLaOx/SiO2/Si(100) Musashi Inst.of Tech 1.FRC Tokyo Inst. of Tech 2.IGSSE, Tokyo Inst. of Tech 3　*Kitamura koji 1.Tachi Kiichi 2.Kakushima Kuniyuki 3.Iwai Hiroshi 2.Nohira Hiroshi 1
2 Characterization of Chemical Bonding Features in HfGdxOy Film Formed by MOCVD Using DPM Precursors Graduate School of AdSM, Hiroshima Univ.　*Daisuke Kanme 1, Akio Ohta 1, Ryo Yougauchi 1, Hideki Murakami 1, Seiichirou Higashi and Seiichi. Miyazaki
3 Formation of Ultrathin La Oxide Films by MOCVD Using La(TMOD)3 Graduate School of AdSM, Hiroshima Univ. 1　*Ryo Yougauchi 1, Akio Ohta 1, Hideki Murakami 1, Seiichirou Higashi 1, Seiichi Miyazaki 1
4 Electrical characteristic change by Mg insertion to La203 based MOSFET Tokyo Tech. FRC 1,IGSSE 2　*Koyanagi Tomotsune 1,Okamoto Kouichi 1,Kakushima Kuniyuki 2,Perhat Ahmet 1,Sugii Nobuyuki 2,Tsutsui Kazuo 2,Hattori Takeo 1,Iwai Hiroshi 1
5 Properties of interfaces in directly deposited La2O3/Si structure Tokyo Tech. FRC 1, IGSSE 2,　*kawanago Takamasa 1, Kakushima Kuniyuki 2, Parhat Ahmet 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1,
Break 10:45〜11:00
6 Properties of CeOX/La2O3 gate dielectric film Tokyo tech.FRC 1,Tokyo Tech.IGSSE 2　*Funamizu Kiyohisa 1,Kouda Miyuki 1,Tachi Kiichi 1,Kakushima Kuniyuki 2,Parhat Ahmet 1,Tsutsui Kazuo 2,Sugii Nobuyuki 2,Hattori Takeo 1,Iwai Hiroshi 1
7 Thermal Stability of CeO2/La2O3/Si(100) Musashi Inst. of Technol.1, Tokyo Inst. of Tech. FCRC2, Tokyo Inst. of Tech. IGSSE3,　*Nohira Hiroshi 1,Youichirou Kon 1, Koji Kitamura 1, Miyuki Kouda 2, Kakushima Kuniyuki 3, Iwai Hiroshi 2
8 Characteristics of Pr oxide formation by MOCVD using Pr(EtCp)3
 Graduate School of Engineering, Nagoya Univ. 1　Matsui Hirotaka 1,*Kondo Hiroki 1,Sakashita Mitsuo 1,Zaima Shigeaki 1
9 Electrical Properties of Aluminum Oxy-nitride Thin Films Deposited by Using ECR Plasma Sputtering Hirosaki Univ.1, Tokyo Univ. of Sci., Suwa2　*Toshiro Ono1, Hiroshi Toyota1, Hiroyuki Arihara1, Yukio Fukuda2, Yohei Otani2
10 Study on changes of flatband shift of Al2O3/Si structure as a function of fabrication processes Tokyo Univ. of Agri. & Tech.　Hayase Yukihide 1,Ikeda Ryou 1,Iwazaki Yoshitaka 1,Hasumi Masahiko 1,Ueno Tomo 1,Kuroiwa KOuichi 1
11 Effective Work Function of Si-based Gate Electrode on High-k Dielectrics MIRAI-ASET 1, MIRAI-ASRC,AIST 2, Univ. of Tokyo 3　*Kamimuta Yuuichi 1, Iwamoto Kunihiko 1, Hirano Akito 1, Ohta Hiroyuki 2, Nabatame Toshihide 1, Toriumi Akira 2,3
Lunch 12:30〜13:30
3p-CB-　/ II
1 O2 partial pressure dependence of charge density in HfSiON by synchrotron radiation The Univ. of Tokyo 1, JST-CREST 2, UT-SRRO 3, STARC 4　Tanimura Tatsuhiko 1, Toyoda Satoshi 1,2,3, Kumigashira Hiroshi 1,2,3, Oshima Masaharu 1,2,3, Ikeda Kazuto 4, Liu Guo-Lin 4, Liu Ziyuan 4
2 Fabrication and characterization of sub-1 nm EOT metal/higher-k gate stacks with TiO2/HfSiO/SiO2 layered dielectrics Osaka Univ. 1, AIST 2　*Arimura Hiroaki 1, Oku Yudai 1, Kitano Naomu 1, Naitou Yuichi 2, Hosoi Takuji 1, Shimura Takayoshi 1, Watanabe Heiji 1
3 Reliability degradation via defect formation in High-k gate dielectrics - thermo-chemical mode via charge trapping of VO in HfSiO4 - Toshiba Corp. R&D Center 1　Nakasaki Yasushi 1, Hirano Izumi 1, Kato Koichi 1, Mitani Yuuichiro 1
△ 4 Thermal Stability of HfLaSiO High-k Gate Dielectrics Fabricated by In-situ Solid Phase Interface Reaction Method Osaka Univ. 1　*Oku Yudai 1,Arimura Hiroaki 1,Saeki Masayuki 1,Kitano Naomu 1,Hosoi Takuji 1,Shimura Takayoshi 1,Watanabe Heiji 1
5 The Effect of Post Deposition Annealing of HfSiOx Films on Electric Property Degradation Inst. of Appl. Phys, Univ. of Tsukuba 1, Semiconductor Leading Edge Technologies 2, TIMS, Univ. of Tsukuba 3　*C.Tamura 1, T. Hayashi 1, K. Ohmori 2, R.Hasunuma 1,3 and K. Yamabe 1,3
6 Imprints of leakage current increase under high electric field stress on the high-k film’s surface Tsukuba Univ. 1,Tsukuba Research Center for Interdisciplinary Materials Science (TIMS) 2, Semiconductor Leading Edge Technologies(Selete) 3 　*Hayashi Tomohiro 1,Tamura Chihiro 1,Kikuchi Yuki 1,Sato Motoyuki 1,3,Hasunuma Ryu 2,3,Yamabe Kikuo 2,3
△ 7 Evaluation of DLC thin film for restraint of Fermi level pinning by Si diffusion Meiji Univ. 1, NIMS 2　*Iwashita Yuta 1, Adachi Tetsuya 2, Itaka Kenji 2, Chikyow Toyohiro 2,
Ogura Atsushi 1
△ 8 Characterization of High-k Film/Si Interfaces by SCM Measurements using dV/dC Signal Univ. of Hyogo 1　*Kuge Shingo 1, Yoshida Haruhiko 1, Mori Hidenobu 1, Satoh Shinichi 1
△ 9 Time Evolution of Stress-Induced Leakage Current in Magnetic Tunnel Junctions with Thin AlOx Films Osaka Univ. 1　Nakano Shinsuke 1,Kamakura Yoshinari 1,Taniguchi Kenji 1
Break 15:45〜16:00
10 Photoemission Study of Chemical Bonding Features and Electronic States of Ultrathin HfTixOy/Pt Stack Structures Hiroshima Univ. 1, Elpida Memory Inc. 2　Ohta Akio 1, Murakami Hideki 1, Higashi Seiichiro 1, Miyazaki Seiichi 1, Tanioku Masami 2, Horikawa Mitsuhiro 2, Ogishima Atsushi 2
11 Hafnium Oxide Etching Using HCl Gas Yokohama National Univ. 1, Hitachi-Kokusai Denki 2　Kobori Yoshitsugu 1,Yamaji Masahiko 1, * Habuka Hitoshi 1, Horii Sadayoshi 2, Kunii Yasuo 2
12 Characterization and Fabrication of HfOxNy Thin Films by ECR Plasma Nitridation(1) Tokyo Univ. of Agri.&Tech. 　*Kaneko Shota 1,Simomura Masaki 1,Hasumi Masahiko 1,Iwazaki Yoshitaka 1,Ueno Tomo 1,Kuroiwa Koichi 1
13 Characterization and Fabrication of HfOxNy thin films by ECR plasma nitridation(2) Toukyounoukou Univ.1　*Shimomura Masaki 1,Kaneko Shouta 1,Hasumi Masahiko 1,Iwazaki Yoshitaka 1,Ueno Tomoo 1,Kuroiwa Kouichi 1
14 ZrO2 deposition using a thermally stable zirconium precursor Air Liquide Laboratories1, Air Liquide2 　*Hsiao Cheng-Fang1, Gatineau Julien1, Blasco Nicolas2
15 Effect of Fluorine implantation on HfSiON observed by EUV excited photoelectron spectroscopy system EUPS2 AIST-NIRC 1, Renesas Technology 2　Tomie Toshihisa 1, Ishituka Tomoaki 1, Kasai Takeshi 1, Katayama Toshiharu 2, Inoue Masao 2, Asayama Kyouichirou 2
16 Permittivity presumption of insulation film that uses the first principle calculation Musashi Inst. Technol 1,ISAS 2　*Igarashi Satoru 1,Suzuki Haruhiko 1,Kobayashi Daisuke 2,Nohira Hiroshi 1,Hirose Kazuyuki 2
13.3 Gate Insulator Technology
Sept. 4 9:15〜17:45
4a-CB-　/ II
▲ 1 Fabrication and band offset of Al2O3 films grown by new CVD chemistry The Univ. of Tokyo1 , JSPS 2, JST-CREST 3, UT-SRRO 4　*Gang He 1,2, Satoshi Toyota 1,3,4, Masaharu Oshima 1,3,4, Yukihiro Shimogaki 1
2 Fabrication and Investigation of new amino-silane precursor(BEMAS) for low temperature deposition of SiO and SiN (2) JAC 1,AIST 2　*Nozu Sadao 1,Yasuhara Shigeo 1,Endo Kazuhiko 2
3 Reaction between ozone and hexamethyldisilazane during a photo-CVD process: Formation of SiO2 by gas reaction AIST 1,Meidensha Corp. 2　*Nakamura Ken 1,Kameda Naoto 1,2,Nishiguchi Tetsuya 1,2,Nonaka Hidehiko 1,Ichimura Shingo 1
4 Control of the thickness and the quality of an Si oxide film produced from silicone oil by monitoring CO2 generation rate Japan Advanced Institute of Sience and Technology1　*Hyun Gyungsu1,Horita Susumu1
5 Fabrication and characterization of new low-temperature siliconoxide thin film using　Tetra-iso-propoxysilane Imaging Science and Engineering Lab.,Tokyo Institute of Technology
　* C.Lim, J. Hanna
6 The effect of the ozone excitation efficiency by UV light irradiation to the Si oxidation process. Meidensha corp. 1, AIST 2　Kameda Naoto 1,2, Nishiguchi Testuya 1,2, Morikawa Yoshiki 1, Kekura Mitsuru 1, Nonaka Hidehiko 2, Ichimura Shingo 2
Break 10:45〜11:00
7 Development of new Sr, Ba and Ti precursors and STO and BST deposition Air Liquide R&D　* Gatineau Satoko, Yanagita Kazutaka, Dussarrat Christian, Zauner Andy
8 Characteristics of Stain Film formed on Back Surface of 300mm Wafer by Spin Etching SEZJapan,Inc. 1　*Sato Keisuke 1,Mashimoto Satomi 1,Watanabe Masaharu 1
9 Energy barrier and trajectory during penetration of H2O molecule into insulator films Mitsubishi Electric Corp. 1　*Oku Tomoki 1, Totsuka Masahiro 1, Ishikawa Takahide 1
10 Formation of Gate Oxide by Using Microwave Plasma Enhanced CVD Univ. of Yamanashi 1, Renkei 2, Miyatsu 3,　*Hirata Masahiro 1, Arimoto Keisuke 1, Yamanaka junji 1, Sato Tetsuya 1, Nakagawa Kiyokazu 1, Arai Tetsuji 2, Takamatsu toshiyuki 2, Sato Shoji 3, Aoki Yu 3
11 Fabrication of Silicon Compound Film as a Passivation by Wet-process at Low Temperature and Its Complexation AIST 1　Sei Uemura1, Kouji Suemori1, Manabu Yoshida1, Satoshi Hoshino1, Noriyuki Takada1, Takehito Kodzasa1, Toshihide Kamata1
12 Synchrotron radiation X-ray reflectivity measurements of silicon oxide film formed by radical oxidation Mitsubishi Electric Corp. 1, Renesas Technology Corp. 2　*Kawase Kazumasa 1, Motoya Tsukasa 1, Uehara Yasushi 1, Umeda Hiroshi 2
Lunch 12:30〜13:30
4p-CB-　/ II
1 Photoemission Study of Ultrathin Germanium Oxide/Ge(100) Interfaces Formed with Thermal and Chemical Oxidation Grad. School of Advanced Sciences of Matter, Hiroshima Univ.　*H. Murakami, M. Miura, Y. Ono, A. Ohta, R. Yogauchi, S. Higashi and S. Miyazaki
2 Annealing Effects on GeO2 Films Studied by Spectroscopic Ellipsometry The Univ. of Tokyo 1　*Kita Koji 1, Nishimura Tomonori 1, Nagashio Kosuke 1, Toriumi Akira 1
3 Optical characterization of Si3N4/GeNx/Ge structure by spectroscopic ellipsometry Tokyo Univ. of Science, Suwa 1, Yamanashi Univ. 2, Woolam Japan 3, Hirosaki Univ. 4　*Yukio Fukuda 1, Yohei Otani 1, Tetsuya Sato 2, Akio Sakaguchi 3, Toshiro Ono 4
4 Process dependency of surface characteristic in GeO2/Ge structure Tokyo Univ. of Agri. and Tech.　*Nurbaizura Mohamed 1,Kishiwada Jun 1,Oniki Yuusuke 1,Iwasaki Yoshitaka 1,Hasumi Masahiko 1,Ueno Tomoo 1,Kuroiwa Kouichi 1
5 Formation of insulator/Ge structure with HfxGe1-xNy interlayer I-Eggs, Kyushu Univ. 1, KASTEC, Kyushu Univ. 2　Kana Hirayama 1, *Wataru Kira 1, Hai-Gui Yang 2, Dong Wang 2, Hiroshi Nakashima 2
6 Temperature and nitriding species dependence of Ge3N4 formation by radical nitridation technique Nagoya univ. 1　*Hiroki Kondo 1, Shigehisa Oda 1, Shigeaki Zaima 1, Masaru Hori 1
7 Fabrication and Characterization of AlN/Ge structure formed by Electron Cyclotron Resonance(ECR) plasma nitridation Tokyo Univ. of Agri. &Tech.　*J. Kishiwada 1, Nurbaizura M 1, Y. Oniki 1, Y. Iwazaki 1, M. Hasumi 1, T. Ueno 1, K. Kuroiwa 1
Break 15:15〜15:30
△ 8 Orientation dependence of Ge Surface Oxidation Toray Research Center. Inc.　*Shingo Ogawa, Junichi Tsuji, Takashi Yamamoto
9 Effect of Al2O3 Interfacial Control Layer for LaAlO3/Ge System Graduate School of Eng., Nagoya Univ.　Ryosuke Kato 1, Shinya Kyogoku 1, Mitsuo Sakashita 1, Hiroki Kondo 1, Shigeaki Zaima 1
△ 10 Improved electrical properties of Ge3N4/Ge interfaces by fluorine ion implantation Osaka Univ. 1　*Kutsuki Katsuhiro 1, Okamoto Gaku 1, Hosoi Takuji 1, Shimura Takayoshi 1, Watanabe Heiji 1
11 Impact of interface GeO2 layer on the electrical property of HfO2/Ge structure Musashi Inst. Technol. 1, AIST-NeRI 2　*Abe Yasuhiro 1, Miyata Noriyuki 1,2, Yasuda Tetsuji 2
12 Response model for interaction of majority and minority carriers with Ge MIS interface traps in conductance method MIRAI-ASRC 1, MIRAI-ASET 2, The Univ. of Tokyo 3　*Noriyuki Taoka 1, Toyoji Yamamoto 2, Masatomi Harada 2, Yoshimi Yamashita 2,
Naoharu Sugiyama 2, Shin-ichi Takagi1,3
13 Analysis of response for interaction of majority and minority carriers with Ge MIS interface traps in conductance method MIRAI-ASRC 1, MIRAI-ASET 2, The Univ. of Tokyo 3　*Noriyuki Taoka 1, Toyoji Yamamoto 2, Masatomi Harada 2, Yoshimi Yamashita 2,
Naoharu Sugiyama 2, Shin-ichi Takagi 1,3
14 Theoretical analysis of fluorine treatment of Ge surface by molecular orbital method(2). Eng.Sci.Osaka Univ. 1　*Dong-Hun Lee 1,Hyun Lee 1,Takeshi Kanashima 1,Masanori Okuyama 1
△ 15 Improvement of MIS Interfacial properties by direct nitridation of InP surfaces Tokyo Univ. 1,2　*Haimoto Takashi 1,Hoshii Takuya 2,Takenaka Mitsuru 2,Takagi Shinichi 1,2
16 Quality MIS interfaces formed by ALD growth of Al2O3 on InGaAs AIST 1, Sumitomo Chemical 2, NIMS 3, Univ.Tokyo 4　*Tetsuji Yasuda 1, Noriyuki Miyata 1, Hiroyuki Ishii 1, Taro Itatani 1, Osamu Ichikawa 2, Noboru Fukuhara 2, Masahiko Hata 2, Akihiro Ohtake 3, Takashi Haimoto 4, Takuya Hoshii 4, Mitsuru Takenaka 4, Shinichi Takagi 4
13.4 Interconnect Technology
Sept. 4 9:30〜18:30
4a-CD-　/ II
1 ESR study of defects in TEOS-SiO2 films with bias temperature Kagawa Univ. 1　Atsushi Toki 1, Yoshiaki Kamigaki 1
△ 2 Paramagnetic defects in SiC insulating films for ULSI multilevel interconnects Kagawa Univ. 1　Kenji Tanbara 1, Yoshiaki Kamigaki 1
3 Hygroscopic properties evaluation of Low-k dielectric films by Pressure Cocker Test Consortium for Advanced Semiconductor Materials and Related Technologies 1　*Hiroshi Kawakami 1, Masahiro Tada 1
4 Pore connectivity evaluation of porous low-k films using in-situ ellipsometry in supercritical fluids yamanashi Univ1　*Aruga Syousaku 1, Saitou Yusuke 1, Yoneyama akari 1, kondo eiiti 1
5 Measurement of thermal conductivity for low-k film deposited on Si substarate AIST CAN-FOR 1, NIRC 2　* Masashi Kuwahara 1, Osamu Suzuki 1, Syozo Takada 2, Nobuhiro Hata 2, Junji Tominaga 1

Break 10:45〜11:00
△ 6 Formation of Super Low-k SiOC Film (k=2.2) by Neutral-Beam-Enhanced CVD) Tohoku Univ. 1, STARC 2　*Juhyun Chung 1, Shigeo Yasuhara 1, Kunitoshi Tajima 2, Hisashi Yano 2, Shingo Kadomura 2, Masaki Yoshimaru 2, Noriaki Matsunaga 2, Tomohiro Kubota 1, Hiroto Ohtake 1 and Seiji Samukawa 1
7 The relationship between W polishing rate and two roughness parameters of CMP pad-suface. Renesas Process Develop.1, Renesas Saijyo Eng. 2　*Oshita Hiroshi 1,Arayama Toshihiko 2
8 Evaluation of Cu-Inhibitor Complex *Ito Atsushi 1, Kawase Yasuhiro 1, Matsuoka Takeshi 1　*Ito Atsushi 1, Kawase Yasuhiro 1, Matsuoka Takeshi 1
9 Mechanism of Cu-Loss at Bottom of Via Hole during Post-Etch Cleaning Process for Cu Interconnects Production Engineering Research Laboratory, Hitachi, Ltd. 1, Renesas Semiconductor Engineering Corp. 2, Renesas Technology Corp. 3, Renesas Eastern Japan Semiconductor, Inc. 4　*Toshimitsu Noguchi 1, Tomonori Saeki 1, Yasuhisa Fujii 2, Hironori Ochi 3, Akira Koiwa 4, Takao Kamoshima 3, Yoshifumi Takata 3
10 Evaluation of Via hole bottom before/after solvent treatment for Cu interconnect NEC Electronics Corp.　Yoshiko Kasama , Nobuaki Hamanaka , Yasuaki Tsuchiya , Makoto Sekine
11 Behavior of Ti in Electrolyzed Sulfuric Acid Solution or SPM KURITA WATER INDUSTRIES LTD. 1, ROHM CO.,LTD. 2　*Tatsuo Nagai 1, Minoru Uchida 1, Toru Otsu 1, Masahide Maeda 2, Shingo Koga 2
Lunch 12:30〜13:30
4p-CD-　/ II
△ 1 Low-temperature plasma oxidation process of reliable TaO for MIM capacitors integrated into Cu-interconnect. LSI Fundamental Research Laboratory1, Advanced Device Development Division2, Advanced ASIC Division3, NEC Electronics Corporation　*Ippei Kume1, Naoya Inoue1, Takayuki Iwaki3, Takeshi Toda2, Masayuki Furumiya2, Akira Shida3, Yoshihiro Hayashi1
2 A New Direct Low-k/Cu Dual Damascene (DD) Contact Lines for Low-loss (LL) CMOS Device Platforms NEC Electronics Corporation　*J. Kawahara, M. Ueki, M. Tagami, K. Yako, H. Yamamoto, F. Ito, H. Nagase, S. Saito, N. Furutake, T. Onodera, T. Takeuchi, H. Nakamura, K. Arita, K. Motoyama, E. Nakazawa, K. Fujii, M. Sekine, N. Okada and Y. Hayashi
3 Low-temperature Cleaning of Gold Surface in MEMS Devices by Hydrogen Annealing NTT Microsystem Integration Labs. 1, NTT-AT 2　*Sakata Tomomi 1, Kuwabara Kei 1, Ono Kazuyoshi 1, Sato Norio 1, Machida Katsuyuki 2, Ishii Hiromu 1
4 Reliability of MOSFETs Added on Thick Plated Gold Interconnections NTT MI Labs. 1, NTT-AT 2, Shimane Univ. 3　*Shimoyama Nobuhiro 1,3, Ishii Hiromu 1, Sato Norio 1, Ono Kazuyoshi 1, Sakata Tomomi 1, Kudou Kazuhisa 2, Machida Katsuyuki 2, Tsuchiya Toshiaki 3
△ 5 Development of evaluation technique of thermophysical property in thin film Ulvac-Riko, Inc. 1　*Satoaki Ikeuchi 1, Kenji Shimada 1
6 Thermal stability of Cu/polyimide structures for package level interconnection Shibaura Inst. of Technology 1,AIST 2　*Furuno Hiroaki 1,Yokoshima Tokihiko 2,Aoyagi Masairo 1,2,Ueno kazuyoshi 1
7 Defect Reduction in Wafer Edge Induced Defect by Edge Polish Hitachi,Ltd. Micro Device Division　Shusuke Watanabe 1, Osamu Hirai 1, Yohei Yamada 1
8 Inspection Technique for 'Not Open Contact Failure' using Voltage Contrast Hitachi High-Techmologies 1, Hynix Semiconductor 2　Nozoe Mari 1, Ninomiya Taku 1, Lee Chang Hwan 2, Oh Jae Hyoung 2
9 Dependence of Resistivity of ITO/AlNiNd Contact on B-T Stress Mitsubishi Electric Corp. 1,Melco Display Technology Inc. 2,　*Yamagata Yusuke 1,Nakahata Takumi 1,Inoue Kazunori 1,Ishiga Nobuaki 2,Tsumura Nakoki 2,Nagayama Kensuke 2,Nakagawa Naoki 1,
10 Electroless CoWP/NiB barrier film for scaled-down copper interconnects Shibaura Inst. Univ. 1,Waseda Univ. 2,Tel-Aviv Univ. 3,　*Tomomi Sato 1,Koyama Fumiya 1,Aramaki Hitoshi 2,Yoshino Masahiro 2,Ueno Kazuyoshi 1,Yosi Shacham-Diamand 2 3,Tetuya Osaka 2,
Break 16:00〜16:15
11 Electrical resistivity and crystallinity of TaN thin films by reactive sputter deposition Meiji Univ. 1　Shiobara Naoki 1, Hama Tomoaki 2, Uekusa Shinichiro 3
12 Preparation of Cu Thin Films Deposited by Sputter-Ion-Plating Method ShinMaywa Industries,Ltd. R&D Center　Masao Marunaka 1,Kiyoshi Takeuchi 1,Noriaki Miyazaki 1,Takayuki Tsuchiya 1,Atsuhiro Terakura 1,Daisuke Akaishi 1
13 Current induced grain growth of electro-plated copper film Shibaura Inst of Technology 1　*Kouichiro Shimotani 1.Takato Takeshita 1.Shigeto Suzuki 1.and Kazuyoshi Ueno 1
14 Grain growth of electro-plated copper film by annealing in super-critical fluid Shibaura Inst of Technology.1.KISCO LTD.2.　*Shimada Yuji 1.Yomogida Shigeru 2.Yata Takashi 2.Ueno Kazuyoshi1.
15 Frozen-in Vacancies in PVD-Cu Films with Improved High-Pressure Reflowability Studied Using a Slow Positron Beam Osaka Univ. 1, Kobe Steel LTD. 2, Kyoto Univ. 3　*Yabuuchi Atsushi 1, Kubo Daichi 1, Mizuno Masataka 1, Araki Hideki 1, Onishi Takashi 2, Shirai Yasuharu 3
16 Formation of MnOx barrier layer with CVD process for LSI Cu interconnects Tohoku Univ. 1,Tokyo Electron LTD. 2　*Neishi Koji 1,Aki Shiro 1,Matsumoto Kenji 2,Sato Hiroshi 2,Ito Hitoshi 2,Hosaka Shigetoshi 2,Koike Junichi 1
17 Highly-Reliable Low-Resistance Cu Interconnects with PVD-Ru/Ti Barrier Metal NEC Electronics Corp. 1,NEC Corp. 2　*Masayoshi Tagami 1,Naoya Furutake 1, Shinsaku Saito 2,Yoshihiro Hayashi 1
18 Barrier metal re-sputtering process development for reducing low-k film damage. NEC Electronics Corporation　*Nakajima Akira 1,shikano Jun 1,Tohara Makoto 1,Motoyama Koichi 1,Fujii Kunihiro 1,Sekine Makoto 1,
19 Milti-scale simulation of electromigration for Cu interconnection using UA-QCMD and KMC method Tohoku Univ.　*Tsuboi Hideyuki 1, Sahnoun Riadh 1, Suzuki Ai 1, Koyama Michihisa 1, Hatakeyama Nozomu 1, Endou Akira 1, Takaba Hiromitsu 1, Del Carpio Carlos A. 1, Kubo Momoji 1, Miyamoto Akira 1
13.5 Si Process Technology
Sept. 2 9:00〜18:15
2a-CH-　/ II
1 Dehydrogenation and Lateral Crystallization of Nanocrystalline Silicon Film using Solid-State Continuous-Wave Green Laser Tohoku-Gakuin Univ.1,　Shimane Univ.2 　*Hara Akito 1, Umezu Wataru 1, Sato Tadashi 1, Yamamoto Kenichi 2,
Kitahara Kuninori 2
2 Large Square Crystalline Silicon by Carbon Dioxide Laser Assisted SLG Method Sharp. 1　*Okazaki Shinya 1, Tsunazawa Hiroshi 1, Otsuka Yasuhito 1, Seki Masanori 1, Takeuchi Hiroaki 1, Okamoto Masaya 1
3 Crystallization of silicon thin films by irradiation with infrared semiconductor laser TokyoA&TUniv 1, Hightec Systems 2　Tomonori Haba 1, Toshiyuki Sameshima 1, Naoki Sano 2
4 Millisecond Heating and Cooling of Substrate Surface During Si Micro Liquid Processing Hiroshima Univ. 1　*Koba Naohiro 1, Higashi Seiichiro 1, Okada Tatsuya 1, Kaku Hirotaka 1, Murakami Hideki 1, Miyazaki Seiichi 1
5 Crystallization of a-Ge thin films in Rapid Thermal Annealing Induced by Thermal Plasma Jet Irradiation Grad. School of Advanced Sciences of Matter, Hiroshima Univ. 1　*Hirotaka Kaku 1, Seiichiro Higashi 1, Tatsuya Okada 1, Seiichi Miyazaki 1
Break 10:15〜10:30
6 Solid Phase Crystallization of Amorphous Si Sub-micro Structure Hiroshima Univ. 1　*Yamamoto Yuji 1, Higashi Seiichiro 1, Kaku Hirotaka 1, Okada Tatsuya 1, Murakami Hideki 1, Miyazaki Seiichi 1
7 Si Polycrystallization Method by Utilizing Selective Heating of Metal in Microwave Plasma Univ. of Yamanashi.1,Renkei.2,Musashi Inst. of Tech.3　*Ariizumi Satoshi 1,Ashizawa Satoki 1,Ikeno Yuki 1,Itayama Yasuhiro 1,Arimoto Keisuke 1,Yamanaka Jyunji 1,Nakagawa Kiyokazu 1,Arai Tetsuji 2,Takamatsu Toshiyuki 2,Sawano Kentaro 3,Shiraki Yasuhiro 3
8 Orientation Control of SiGe on Insulator by Indentation-Induced Solid-Phase Crystallization Kyushu Univ.　*Kaoru Toko, Takashi Hagihara, Taizoh Sadoh
9 Formation of Single Crystalline Ge-on-Insulator by Self-Aligned Melting Growth Kyushu Univ.　*Takanori Tanaka, Takuro Nishimaru, Kaoru Toko, Masanori Tanaka, Kazuya Yokomizo, Masaru Itakura, Minoru Nishida, Taizoh Sadoh, Masanobu Miyao
10 Al-induced crystallization and Si/Ge inter-diffusion of Si/Ge multilayered structure Kyushu Univ. 1　*Kurosawa Masashi 1, Tsumura Yoshitaka 1, Sadoh Taizoh 1, Miyao Masanobu 1
Lunch 11:45〜12:45
2p-CH-　/ II
1 Study on crystal defects generated at SiGe/Si interface by FLA processing Toshiba Corporation Semiconductor Company　*Oshiki Yusuke 1,Itani takaharu 1,Itou Takayuki 1,Yoshino Kenichi 1, Iinuma Tosihiko 1,Suguro Kyouichi 1
2 Characterization of Lateral Growth in Laser-Crystallized SiGe Thin Films by Raman Spectroscopy-2 Shimane Univ. 1, Tohoku-Gakuin Univ. 2　*Mitsunori Kobata 1, Tadashi Sato 2, Kuninori Kitahara 1, Akito Hara 2
3 Evaluation of crystallinity of poly-Si thin film with surface photovoltage method Nihon Univ. 1, Kobe Steel, Ltd. 2　*Ikeda Masanori 1, Shimizu Hirofumi 1, Takamatsu Hiroyuki 2, Sakoda Naokazu
▲ 4 Dependence of crystallization fraction of the low-temperature deposited Si film on the composition of the YSZ seed layer JAIST　*Hana Sukreen 1, Susumu Horita 1
5 Preparation and Formation Mechanism of Silicon Wire Tokyo Denki Univ. 1　*Anzai Masahiro 1, Wagai Tatsuya 1, Motohashi Mitsuya 1, Homma Kazuaki 1
6 Formation of a-Si Nano Wires Using Ultra-Violet Nano-Imprint Lithography and Its Crystallization Kyushu Univ. 1　*Nakagawa Gou 1, Asano Tanemasa 1
7 Investigation of Shapes of Cylindrical Si Nanowire with Optimization of Si Fin Aspect Ratio prior to Sacrifice Oxidation Titech FRC 1, Titech IGSSE 2, Waseda Univ. INN 3.　*Sato Soshi 1, Kamimura Hideyuki 1, Arai Hideaki 1, Ohmori Kenji 3, Kakushima Kuniyuki 2, Parhat Ahmet 1, Tsutsui Kazuo 2, Hattori Takeo 1, Sugii Nobuyuki 2, Yamada Keisaku 3, Iwai Hiroshi 1.
Break 14:30〜14:45
△ 8 In situ doped Si Selective Epitaxial Growth at Low Temperatures by Atmospheric Pressure Plasma CVD Osaka Univ. 1　*Kirihata Yutaka 1,Ohnishi Takayuki 1,Ohmi Hiromasa 1,Kakiuchi Hiroaki 1,Yasutake Kiyoshi 1
9 Ultra-shallow junction formation using low temperature solid-phase epitaxy and non-melt laser annealing Keio Univ. 1, SEN Corporation, an SHI and Axcelis Company 2, Sumitomo Heavy Industries, Ltd. 3　*Takumi Fukaya 1, Shuhei Hara 1, Ryusei Kaneko 1, Satoru Matsumoto 1, Gensyu Fuse 2, Toshiharu Suzuki 2, Toshio Kudo 3, Susumu Sakuragi 3
10 Time dependence of ion-implanted B activation and Si recrystallization by microwave annealing Tohoku Univ. 1, Tohoku Univ. 2　*Koji Hara 1, Yuichiro Tanushi 2, Shin-Ichiro Kuroki 1, Koji Kotani 1, Takashi Ito 1
11 Local Resistance Profile of Ultra Shallow Junction with Spike Lamp and Laser Annealing Osaka Univ. 1, Renesas Technology Corporation 2　*Nishikawa Kazuhisa 1, Tanaka Yuji 1, Murakami Katsuhisa 1, Abo Satoshi 1, Iwamatsu Toshiaki 2, Oda Hidekazu 2, Wakaya Fujio 1, Takai Mikio 1
12 Dopant Activation Induced by High Density Thermal Plasma Jet Millisecond Annealing. Graduate School of AdSM, Hiroshima Univ.　*Furukawa Hirokazu 1, Higashi Seiichiro 1, Okada Tatsuya 1, Murakami Hideki 1, Miyazaki Seiichi 1
13 Flash Lamp Annealing in Diluted Oxygen for Low Sheet Resistance of Ultra Shallow Junction Selete 1　*Shinichi Kato 1, Takashi Onizawa 1, Takayuki Aoyama 1, Yasuo Nara 1, Yuzuru Ohji 1
Break 16:15〜16:30
14 Investigation of silicon self-interstitial behaviors during transient enhanced diffusion using silicon isotopes Keio Univ. 1, NTT-AT 2　*Shimizu Yasuo 1, Uematsu Masashi 1, Takano Akio 2, Itoh Kohei 1
15 Effect of amorphous layer on Boron diffusion during annealing Toshiba Semiconductor Campany 1　*Yasunori Oshima 1,Yoshimasa Kawase 1,Kiyotaka Miyano 1,Yoshinori Hamaoka 1,Tomomi Kusaka 1,Takahisa Kanemura 1,Toshihiko Iinuma 1,Kyoichi Suguro 1
16 The fabrication of USJ and improvement of metal/high-k device performances by using FSP-FLA (Flexibly-Shaped-Pulse FLA) Selete　*Onizawa Takashi1, Kato Shinichi1, Aoyama Takayuki1, Nara Yasuo1
17 Activation of arsenic impurity in Si observed by X-ray photoelectron spectroscopy and its depth profiling Tokyo Tech. 1,Musashi Inst of Technol. 2,Matsushita Electric Industry. 3,UJT Lab. 4,Tokyo Tech. 5　*Yasumasa Nakagawa 1,Hiroshi Nohira 2,Kazunori Sakai 1,Tomoyuki Yokota 1,
Takayuki Kai 3,Parhat Ahemet 5,Kuniyuki Kakushima 1,Bunji Mizuno 4,Takeo Hattori 5
18 Analysis of impurity doping using the microwave absorption method Tokyo A&T Univ.1, Hightec Systems Co.LTD.2, Nissin Ion Equipment Co. LTD.3　*Ukawa Kan 1, Sakakura Yuji 1, Sameshima Toshiyuki 1,Sano Naoki 2,Naito Masao 3
19 Evaluation of Hydrogen-Related Shallow Donor in Silicon Fuji Electric Device Technology Co., Ltd.　Michio Nemoto 1, Takashi Yoshimura 1, Haruo Nakazawa 1
20 Optical and electrical characterization of recrystallization of ultra-shallow junction Kyoto Inst. of Tech. 1,WaferMasters Inc. 2　*Takashima Shuhei 1,Kamoto Koji 1,Harima Hiroshi 1,Yoshimoto Masahiro 1,Woo Sik Yoo 2
13.5 Si Process Technology
Sept. 3 9:30〜18:30
3a-CH-　/ II
1 A taper shape control of stacked film by phosphoric acid based etchant RINKAGAKU KOGYO CO.,LTD. 1,TOYAMA INDUSTRIAL TECHNOLOGY CENTER 2, TOYAMA PREFECTURAL UNIV. 3　Sone Hironobu 1,Obata Tsutomu 2,Yamazaki Shigekazu2,Ishikuro Tomoaki 2,
Matsuda Toshihiro 3
2 Improvement of SiO2 Films by Thermal Plasma Jet Irraduced Millisecond Annealing Hiroshima Univ　*Y. Hiroshige, S. Higashi, H. Kaku, T. Okada, S. Miyazaki
3 Deposition of high breakdown field SiO2 gate insulator film by pulse-DC reactive magnetron sputtering method Nat'l Taiwan Univ. of Sci. & Tech. 1, Hiroshima Univ. 2　*Yeh wenchang 1, Dai Hanseng 1,Chang Chih-Yu 1, Higashi Seiichiro 2
4 Comparison of a-Si TFTs fabricated by PECVD and Cat-CVD method Jpn. Adv. Inst. Sci. & Tech. 　*Nishizaki Shogo 1, Ohdaira Keisuke 1, Matsumura Hideki 1
5 Formation of high quality SiNx films through rapid thermal annealing by a heated catalyzer Jpn. Adv. Inst. Sci. & Tech. 　*Nishizaki Shogo 1, Ohdaira Keisuke 1, Matsumura Hideki 1
△ 6 Suppression of Short Channel Effect of Thin-Film Transistor by Very Thin SiN Film Formed at Source and Drain Regions University of Hyogo. 1, Hiroshima University. 2　*Takahiro Kobayashi 1, Kensaku Ohkura 2, Atsushi Fukushima 1, Naoto Matsuo 1, Akira Heya 1, Shin Yokoyama 2
Break 11:00〜11:15
7 Analysis of carrier transport mechanism in CLC poly-Si TFTs Tohoku Univ. 1　*Fujii Shuntaro 1,Kuroki Shin-Ichiro 1,Zhu Xiaoli 1, Numata Masayuki 1, Kotani Koji 1,Ito Takashi 1
8 Investigation on the cause of characteristic variation of laterally grown poly-Si TFT ISEE, Kyushu Univ.　*Akiyama Kouji 1, Asano Tanemasa 1
9 Influence of Trap States Density and Si Thickness on the Characteristic of Poly-Si Thin Film Transistor Doshisha Univ. Fuculity of Science and Engineering1, Univ. of the Ryukyus Fuculity of Engineering　*Sengoku Kyozo1, Ohachi Tdashi1, Noguchi Takashi2
10 Physical Model of Current-Voltage Characteristic for Thin-Film Transistor Ryukoku Univ. 1, Thin Film Materials & Devices Meeting 2　*Kimura Mutsumi 1,2
11 Device Characterization of Poly-Si Thin-Film Phototransistors Ryukoku Univ. 1, Nara Inst. of Science and Technology 2　Hachida Tomohisa 1, Nishizaki Yoshitaka 2, Yamashita Takehiko 2, Shima Takehiro 1, *Kimura Mutsumi 1
Lunch 12:30〜13:30
3p-CH-　/ II
△ 1 Study on Strain Memorization of Patterned Si Wafer with SiN Film by Argon Implantation. Tokyo Tech. IGSSE　1, Tokyo Tech. FCR 2, Meiji Univ 3
　Hiroto Nakayama 1, Masafumi Hino 1, Hirosi Iwai 2,Takeo Hattori 2,Nobuyuki Sugii1 1,Kazuo Tsutsui1 1,P. Ahmet 2, Kuniyuki Kakushima 1,
Atsusi Ogura 3,Kouki Nagata 3
2 Evaluation of Channel Strain Depending on STI Width Using Nano-Beam Electron Diffraction Device Platforms Res. Labs., NEC Corporation 1,Process Technology Div., NEC Electronics Corporation 2　*Akio Toda 1,Nobuyuki Ikarashi 1,Keiji Sakamoto2
△ 3 Fabrication of Local Ge on Insulator Structures using Liquid Phase Selective Lateral Epitaxy Osaka Univ. 1　T. Hashimoto 1, C. Yoshimoto 1, T. Hosoi 1, T. Shimura 1, H. Watanabe 1
4 Surface inspection of SOI wafer surface by using laser light scattering Okayama Pref. Univ. 1, SUMCO Corp. 2　*Eiji Kamiyama 1,2, Koji Sueoka 1
5 Temperature Evaluation through SOI Wafer during Flash Lamp Annealing Yokohama National Univ.　* Kasahara Yu 1, Hara Akiko 1 and Habuka Hitoshi 1
6 Surface morphology of the of bi-axially oriented silicon thin films prepared on glass substrates Kagoshima University　*Toshiya Doi, Kosuke Nagata, Kentaro Matsunaga, Yoshinori Hakuraku
7 Investigation on Actuation Force Characteristics of Bistable Prestressed Curved-Beam Actuated by Ampere Force Kyushu Univ.　*I.Z. Pane, Tanemasa Asano
8 Formation of Si Nanocrystals in SiOx Films Induced by Thermal Plasma Jet Annealing and Its Application to Floating Gate Memory Hiroshima Univ. 1　*Okada Tatsuya 1, Higashi Seiichiro 1, Kaku Hirotaka 1, Furukawa Hirokazu 1, Miyazaki Seiichi 1
9 Control of Strain in SPC-Si Film by Patterning of Amorphous Si CCST Univ. of Yamanashi 1, ARL Musashi Inst. of Technology 2　*Yasuhiro Itayama 1, Keisuke Arimoto 1, Junji Yamanaka 1, Kiyokazu Nakagawa 1, Kentarou Sawano 2, Yasuhiro Shiraki 2
Break 15:45〜16:00
△ 10 Diffusion mechanism in Ge investigated by simultaneous observation of Ge self- and arsenic diffusion using Ge isotope superlattices Keio Univ. 1, Musashi Inst. of Tech 2　*Miki Naganawa 1, Yasuo Shimizu 1, Masashi Uematsu 1, Kohei M. Itoh 1, Kentarou Sawano 2, Yasuhiro Shiraki 2
11 Study of Diffusion and Activation Characteristics of Boron in Si(1-y)C(y) Film Nagaoka Univ. of Technology 1, TOSHIBA Corp. Semiconductor Company 2　*Agatsuma Yuji 1, Uchitomi Naotaka 1, Itokawa Hiroshi 2, Aoki Nobutoshi 2, Mizushima Ichiro 2
12 Gettering efficiency of Si(110)/(100) directly bonded hybrid crystal orientation substrates Department of System Engineering,Okayama Prefectural Univ. 1, Covalent Materials Co.,Ltd. 2 　*Tatsuhiko Aoki 1, Koji SUeoka 1, Koji Izunome 2
13 Si上の選択成長Geエピの転位と熱処理による低減 Toukyou Univ. 1　Okita Yousuke 1
14 Influence of boron and oxygen on the surface roughness of epitaxial SiGe films Toshiba Corp. Semiconductor Company 1 ,Nagaoka Univ. of Tech.2　* Mori Shinji 1,Sato Tsutomu 1,Mizushima Ichiro 1,Tsuchida ryutaro 2,Uchitomi Naotaka 2
△ 15 Formations of HfOxNy Thin　Films on 3 Dimentional Gate Structures by ECR Sputtering Tokyo Tech 1　*Sano Takahiro 1, Ohmi Shun-ichiro 1
16 High Quality TEOS Oxide Film CVD by Microwave RLSA Plasma(1) Tokyo Electron Technology Development Inst., Inc.　*Yoshinobu Tanaka 1, Hirokazu Ueda 1, Yusuke Ohsawa 1, Toshihisa Nozawa 1
17 High Quality TEOS Oxide Film CVD by Microwave RLSA Plasma(2) Tokyo Electron Technology Development Inst., Inc.　*Yusuke Ohsawa 1, Hirokazu Ueda 1, Yoshinobu Tanaka 1, Toshihisa Nozawa 1
18 Etching technique using repeated sacrificial oxidation applied to Fin structures for impurity profiling Tokyo Tech. 1,Tokyo Tech. 2,UJT Lab. 3　*Kazunori Sakai 1, Yasumasa Nakagawa 1, Tomoyuki Yokota 1, Kin Seikoku 3, Katumi Okashita 3,Yuichirou Sasaki 3, Parhat Ahmet 2, Kuniyuki Kakushima 1, Bunji Mizuno 3,Takeo Hattori 2,Kazuo Tsutsui 1, Hirosi Iwai 2
19 HCl Gas Transport in a Single-Wafer High-Speed Rotation Silicon Epitaxial Reactor Yokohama National Univ. 1, New Flare Tech 2　Takai Yusuke 1, *Suzuki Junpei 1, Habuka Hitoshi 1, Hirata Hironobu 2,Mitani Shin-ichi 2
13.5 Si Process Technology
Sept. 4 9:00〜11:30
4a-CH-　/ II
1 Formations of PtSi Gate Electrodes by RF Magnetron Sputtering Tokyo Tech 1　Suda Yuichiro 1, Mohd Anuar Bin Md Ali 1, Gao Jun 1, Ohmi Shun-ichiro 1
2 A Study on Crystallinity of PtSi alloying with Hf Tokyo Tech. 1　*Gao Jun 1, Ishikawa Junpei 1, Ohmi Shun-ichiro 1
3 A New Ruthenium Precursor for Improved Depositions

Air Liquide Laboratories 1　*Higashino Katsuko 1, Julien Gatineau 1
4 Impact of Sputtering Temperature Dependence of Additional Pt NiSi Thermal Stability Process & Manufacturing Eng. Center , TOSHIBA Corporation 1,NEC Electronics Corporation Process Technology Division 2 　*Nakamura Kazuhiko 1,Matsuo Koji 1,Nomura Kayo 1,Suzuki Tatsuya 2,Kinoshita Kazuya 1,Honda Makoto 1,Iinuma Toshihiko 1
5 Impurity-segregated NiSi2-FUSI/SiON for embedded memory application NEC Electronics 1, NEC 2　Kenzo Manabe 1, Koji Masuzaki 1, Takashi Ogura 1, Motofumi Saitoh 2, Hiroshi Sunamura 1, Hirohito Watanabe 1
6 Schottky Barrier Height Modulation of Ni Silicide by Er insertion and Its Application to SB-MOSFETs Tokyo Tech. FCRC 1, Tokyo Tech. IGSSE 2　*Hosoda Wataru 1,Noguchi Kohei 1, Kakushima Kuniyuki 2, Parhat Ahmet 1,Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1
7 Schottky Barrier Height Control of Ni Silicide by Inserting Hf Interlayer Tokyo Tech. FCRC 1, Tokyo Tech. IGSSE 2　*Matano Katuya 1, Noguchi Kohei 1, Kakushima Kuniyuki 2, Parhat Ahmet 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1
8 Dependence of Ti-Si-N and Hf-Si-N resistivity on nitrogen contents and annealing temperature Graduate School of Eng. Nagoya Univ. 1　*Miyamoto Kazuaki 1, Ben E. Urban 1, Kouhei Furumai 1, Kondo Hiroki 1, Zaima Shigeaki 1
9 Optimization of Gate-Stack-Structure at CVD TaSixNy Metal Gate for High-k MIS-FET Semiconductor Leading Edge Technologies Inc.　* Sugita Yoshihiro 1, Aoyama Takayuki 1, Nara Yasuo 1
10 Influence of silicide growth mode on control of metal source/drain junction edges AIST NIRC 1　*Migita Shinji 1, Morita Yukinori 1, Taoka Noriyuki 1, Mizubayashi Wataru 1, Ota Hiroyuki 1
13.6 Si Devices/Integration Technology
Sept. 2 9:00〜17:00
2a-E-　/ II
1 Reliability of MOS transistor with Nanograting Channels Tohoku　Univ. 1　* Zhu Xiaoli 1, KurokiShin-Ichiro 1, Kotani Koji 1 ,Ito Takashi 1
2 Separation of short channel effects on threshold voltage deviations for FinFETs induced by variation of device parameters Tokyo Tech. 1 2, Indian Inst. Tech. Bombay 3　*Yusuke Kobayashi 1, Kuniyuki Kakushima 1, Parhat Ahmet 2, V. Ramgopal Rao 3, Kazuo Tsutsui 1, Hiroshi Iwai 2
3 Dual metal gate integration for CMOS FinFETs by Ta/Mo stack metal gate technology NeRI AIST1　*Matsukawa Takashi1,Endo Kazuhiko1,Liu Yongxun1,O'uchi Shinichi1,Ishikawa Yuki1,Yamauchi Hiromi1,Tsukada Junichi1,Ishii Kenichi1,Sakamoto Kunihiro1,Suzuki Eiichi1,Masahara Meishoku1
4 Fabrication of Logic Gate Vth Controllable CMOS Inverters with 4-Terminal FinFET AIST1, Meiji Univ.　*Y. X. Liu1, T. Hayashida2, T. Matsukawa1, K. Endo1, S. Ouchi1, K. Sakamoto1, T. Sekigawa1, K. Ishii1, J. Tsukada1, Y. Ishikawa1, H. Yamauchi1, A. Ogura2, E. Suzuki1, and M. Masahara1
5 Independent Double-Gate FinFET SRAM for Drastic Leakage Current Reduction National Inst. AIST　*K. Endo, S. O’uchi, Y. Ishikawa, Y. Liu, T. Matsukawa, K. Sakamoto, M. Masahara, K. Ishii, J. Tsukada, H. Yamauchi, E. Suzuki
Break 10:15〜10:30
6 Electrical Characteristics of (110)-oriented Ultra-thin GOI p-MOSFETs Fabricated by Ge Condensation Method The Univ. of Tokyo 1, Tokyo Inst. of Tech. 2　*Dissanayake Sanjeewa 1, Shuto Yusuke 2, Sugahara Satoshi 2, Takenaka Mitsuru 1, Takagi Shinichi 1
7 Analysis of transport aspects of dynamic threshold SOI MOSFET – Comparison of nMOS and pMOS- Kansai Univ. 1　*Takayuki Tochio 1, Yasuhisa Omura 1
△ 8 Analysis of low-temperature characteristics of dynamic threshold SOI MOSFET Kansai Univ. 1　*Takayuki Tochio 1, Yasuhisa Omura 1
△ 9 Optimization of GIDL Current and Inverter Delay in Silicon on Thin BOX for Ultra-Low Power CMOS CRL., Hitachi 1, Renesas tech. 2　Morita Yusuke 1, Tsuchiya Ryuta 1, Ishigaki Takashi 1, Sugii Nobuyuki 1, Iwamatsu Toshiaki 2, Ipposhi Takashi 2, Oda Hidekazu 2, Inoue Yasuaki 2, Kimura Shin'ichiro 1
10 Hot Carrier Effect in SOI Power MOSFET NTT Energy and Environment Systems Laboratories. 1　*Matsumoto Satoshi
11 A Study on Prevention of Decrease in Self-bias Effect for Self-biased Channel Diode Tohoku Gakuin Univ. 1,Origin Electric Co.,Ltd. 2　*Yoshida Tatsuya 1,Sugawara Fumihiko 1,Ohnuma Koichi 1,Hoshi Hideaki 2, Aoki Kazuyuki 2,Yamaguchi Hideo 2
Lunch 12:00〜13:00
2p-E-　/ II
1 Allowable assembly errors of an optically reconfigurable gate array Shizuoka Univ.　Hironobu Morita, Minoru Watanabe
2 A dynamic optically reconfigurable gate array with reconfiguration period optimization Shizuoka Univ.　○Takayuki Mabuchi, Minoru Watanabe
3 Zero-overhead fast dynamic optically reconfigurable gate array VLSI Shizuoka Univ.　Shinichi Katou, Minoru Watanabe
△ 4 High-Gain On-Chip Antennas Fabricated by 180 nm CMOS Technology Research Inst. for Nanodevice and Bio Systems, Hiroshima Univ. 1　*Kimoto Kentaro 1, Sasaki Nobuo 1, Kubota Shin-ichi 1, Moriyama Wataru 1, Kikkawa Takamaro 1
△ 5 Confocal Imaging for Breast Cancer Detection Using UWB Silicon Array Antenna Hiroshima Univ. 1, Tianjin Univ. 2,　*Kubota Shinichi 1, Xiao Xia 2, Kayaba Yasuyoshi 1, Sasaki Nobuo 1, Kimoto Kentaro 1, Moriyama Wataru 1, Kikkawa Takamaro 1,
6 Mircowave Imaging via Beamforming for Early Breast Cancer Detection Hiroshima Univ. 1, Tianjin Univ. 2　*Kayaba Yasuhisa 1, Kubota Shinichi 1, Xiao Xia 2, Kikkawa Takamaro 1
7 SrTiO3 Thin Film Decoupling Capacitors with Through-Silicon Vias NEC Device Platforms Res. Labs. 1　*Takemura Koichi 1, Ouchi Akira 1, Shibuya Akinobu 1
△ 8 Crosstalk Analysis Method of 3-D Solenoid on-chip Inductors for High-speed CMOS-SoCs LSI Fundamental Res. Lab. NEC Electronics 1, Device Platforms Res. Labs. NEC 2　*Hijioka Ken'ichiro 1, Tanabe Akira 1 , Amamiya Yasushi 2, Hayashi Yoshihiro 1
Break 15:00〜15:15
9 Suppression of Electrical Coupling between RF MEMS Devices and a CMOS Substrate NTT MI Labs. 1, NTT AT 2　*Kuwabara Kei 1, Sato Norio 1, Morimura Hiroki 1, Kodate Junichi 1, Kamei Toshikazu 2, Machida Katsuyuki 2, Ishii Hiromu 1
▲ 10 Design Optimization of NEMS Switches for Single-Electron Logic Applications QNERC, Tokyo Tech 1, Dept. of Physical Electronics, Tokyo Tech 2, Southampton Univ. 3, SORST-JST 4　*Pruvost Benjamin 1,2, Uchida Ken 1,2,4, Mizuta Hiroshi 2,3,4, Oda Shunri 1,2,4
11 Novel Encapsulation Technology for Protecting Movable Parts with MEMS Devices Misuzu Ind. Corp. 1, NTT Advanced Technology 2, NTT Microsystem Integration Lab. 3, Univ. of Tokyo 4　*Chino Mitsuru 1, Kamei Toshikazu 2, Sato Norio 3, Mayumi Naruto 1, Tazawa Hiroshi 1, Shimada Teruo 1, Yano Masaki 2, Machida Katsuyuki 2, Kuwabara Kei 3, Ishii Hiromu 3, Higurashi Eiji 4
△ 12 Self-Assembly for MEMS Chips with cavities Department of Bioengineering and Robotics, Tohoku Univ. 1　*T. Konno, T. Fukushima, R. Kobayashi, T. Tanaka, and M. Koyanagi
13 20 um pitch vertical interconnection process for Through-Silicon-Vias and micro bumps Waseda Univ. 1
IBM Japan, Tokyo Research Laboratory 2　Katsuyuki Sakuma 1,2, *Noriyasu Nagai 1, Mikiko Saito 1, Jun Mizuno 1, and Shuichi Shoji 1
14 Chip stack interconnection of InP/Si using Compliant Bump Kyushu Univ.1, Fukuoka IST 2　*Fumihiko Hoashi 1, Naoya Watanabe 2, Tanemasa Asano 1
△ 15 RF-MEMS Switch with Through-Wafer Interconnections Advanced Technology R&D Center, Mitsubishi Electric Corp.　Shimpei Ogawa, Shinnosuke Soda, Shinichi Izuo, Yukihisa Yoshida
13.6 Si Devices/Integration Technology
Sept. 3 9:00〜12:00
3a-E-　/ II
1 Optimizations of designe and process for 40nm-node HDSRAM Semiconductor Company, Toshiba Corp.　*Satoru Fujita 1, Hironobu Fukui 1, Tomoya Sanuki 1, Kenji Yoshida 1, Masaaki Iwai 1, Fumitomo Matsuoka 1
2 Trapped-Hole-Enhanced Erase-Level Shift by FN-Stress Disturb and its suppression in Embedded SONOS Memory NEC 1, NEC Electronics 2　* Masayuki Terai 1, Yukihide Tsuji 1, Setsu Kotsuji 1, Sinji Fujieda 1, Koichi Ando 2
△ 3 New degradation mechanism of write-disturb immunity of scaled split-gate SONOS memory NEC 1, NECEL 2　*Tsuji Yukihide 1, Terai Masayuki 1, Fujieda Shinji 1, Ando Koichi 2
4 SiO2/SiOx/SiC/Si MIS Nonvolatile Resistance Memory Formed with One-Stage Oxidation Process Tokyo Univ. of Agric. & Technol.1　*Yamaguchi Yuichiro 1,Hasegawa Hiromi 1,Suda Yoshiyuki1
5 Small random number generator using Si rich SiN MOSFET and the reliability of the device Corporate R&D Center,Toshiba Corporation　*Matsumoto Mari 1, Ohba Ryuji 1, Yasuda Shinichi 1, Tanamoto Tetsufumi 1, Fujita Shinobu 1
6 RTN of Drain Current in High-k Gate Dielectric p-type MOSFETs Corporate RDC Toshiba Corp. 1　Kobayashi Shigeki 1,Saitoh Masumi 1,Uchida Ken1
Break 10:30〜10:45
7 Memory Characteristics of MOS Capacitor with Floating gate of Tungsten Nanodots and HfO2 Control Oxide IIAIR, Tohoku Univ.1, Institute for Materials Research, Tohoku Univ.2, Dept. of Bioengineering and Robotics, Tohoku Univ.3　Pei Yanli 1, Nishijima Masahiko 2, Fukushima Takafumi 3, Tanaka Tetsu 3, Koyanagi Mitsumasa 3
△ 8 Bio-nano dot floating gate memory with High-k films NAIST 1, STARC 2　*Ohara Kosuke 1, Uraoka Yukiharu 1, Fuyuki Takashi 1, Yamashita Ichiro 1, Yaegashi Toshitake 2, Moniwa Masahiro 2, Yoshimaru Masaki 2
9 Charge Retention Characteristics of Ni-Nanodots Floating Gate MOS Capacitors Grad. School of Advanced Sciences of Matter, Hiroshima Univ.　*Ikeda Mitsuhisa 1, Shimanoe Kazuhiro 1, Makihara Katsunori 1, Miyazaki Seiichi 1
10 Theoretical Study of Silicon Quantum Dots Floating Gate Memory Grad. School of Pure and Applied Science, Univ. of Tsukuba 1,Grad School of Advanced Sciences of Matter, Hiroshima univ. 2,　*Yukihiro Takada 1,Masakazu Muraguchi 1,Yoko Sakurai 1,Shintaro Nomura 1,Mitsuhisa Ikeda 2,Katsunori Makihara 2,Seiichi Miyazaki 2,Kenji Shiraishi 1
11 C-V characteristics of Quantum Dots Floating Gate Memory at Low Temperature Grad. School of Pure and Applied Science, University of Tsukuba 1,
Grad. School of Advanced Sciences of Matter, Hiroshima Univ. 2　*Sakurai Yoko 1, Nomura Shintaro 1, Shiraishi Kenji 1, Ikeda Mitsuhisa 2, Makihara Katsunori 2, Miyazaki Seiichi 2
13.6 Si Devices/Integration Technology
Sept. 4 9:00〜17:00
4a-E-　/ II
1 Analysis of Gate Length Dependence on VT Fluctuation Using Takeuchi Plot MIRAI-Selete 1,Univ.of Tokyo 2,Hiroshima City Univ. 3　*Tsunomura Takaaki 1,Arifin Tamsir Putra 2,Nishida Akio 1,Takeuchi Kiyoshi 1,Inaba Satoshi 1,Kamohara Shiro 1,Terada Kazuo 3,Hiramoto Toshiro 1,2
2 Investigation of VT Fluctuation Using Integrated Physical Analyses and Takeuchi Plot MIRAI-Selete 1,Univ.of Tokyo 2,Hiroshima City Univ. 3 　*Tsunomura Takaaki 1,Nishida Akio 1,Yano Fumiko 1,Arifin Tamsir Putra 2,Takeuchi Kiyoshi 1,Inaba Satoshi 1,Kamohara Shiro 1,Terada Kazuo 3,Hiramoto Toshiro 1,2,Mogami Tohru 1
3 Device performance evaluation of semiconductor devices with asymmetric dopant distribution Waseda Univ. 1, ASMeW 2, Waseda ZAIKEN 3 　*Hori Masahiro 1, Shinada Takahiro 2, Taira Keigo 1, Shimamoto Naonobu 2, Ohdomari Iwao 123
4 LET Dependence of Single Event Transient Pulse-Widths in SOI Logic Cell Sokendai 1, ISAS 2, Univ. Tokyo 3, MHI 4, JAEA 5,　*Makino Takahiro 1, Kobayashi Daisuke 1,2, Hirose Kazuyuki 1,2, Yanagawa Yoshimitsu 3, Saito Hirobumi 1,3, Ikeda Kazuhiro 1,2, Takahashi Daisuke 4, Ishii Shigeru 4, Kusano Masaki 4, Onoda Shinobu 5, Hirao Toshio 5, Ohshima Takeshi 5,
△ 5 Electronic Structure Analysis of Silicon Nanowires by First Principle Calculation IGSSE, Tokyo Tech. 1, FRC, Tokyo Tech. 2, Graduate School of Pure and Applied Sciences, Univ. of Tsukuba 3　*Lee Yeonghun 1, Nagata Takahiro 3, Shiraishi Kenji 3, Kakushima Kuniyuki 1, Iwai Hiroshi 2
△ 6 Experimental Study on Silicon Nanowire nMOSFET and Single-Electron Transistor at Room Temperature under Uniaxial Tensile Strain IIS, University of Tokyo. 1.　*YeonJoo Jeong 1, Kousuke Miyaji 1, Takuya Saraya 1, Toshiro Hiramoto 1
Break 10:30〜10:45
7 Dynamics of single-electron capture in silicon nanowire MOSFETs NTT Basic Research Labs. 1, NIST 2　*Akira Fujiwara 1, Satoru Miyamoto 1, Katsuhiko Nishiguchi 1, Yukinori Ono 1, N. M. Zimmerman 2
▲ 8 A single-electron transistor with a sub-20 nm Si nanowire RIKEN1, NIMS2, JST PRESTO3　*Shaoyun Huang1, Naoki Fukata2,3, Tomohiro Yamaguchi1, and Koji Ishibashi1
▲ 9 Preparation of Controlled Nanocolloid Dispersion for High-Density Small-Diameter Silicon Nanowire Synthesis　　 QNERC Tokyo Tech. 1, SORST-JST2　o SAEED AKHTAR, K. Usami, Ken Uchida, and Shunri Oda
10 Electrical Characteristics of Si Nanowires Fabricated by Thermal Oxidation Tokyo tech FRC. 1,IGSSE 2　　Arai Hideaki 1,Kamimura Hideyuki 1,Satou Soushi 1,Kakushima Kuniyuki 2,Parhat Ahmet 1,Tsutsui Kazuo 2,Hattori Takeo 1,Sugii Nobuyuki 2,Iwai Hiroshi 1
11 Flat-Type Device Technology for Si/Si1-xGex electron-tunneling RTD Tokyo Univ. of Agric. & Technol. 1　Okubo Takahumi 1, Suda Yoshiyuki 1
Lunch 12:00〜13:00
4p-E-　/ II
1 Impact of Pt incorporation into Ni silicide films on the electric and physical properties Center for Semiconductor Research & Development 1,Process & Manufacturing Eng. Center 2, TOSHIBA Corporation Semiconductor Company　Takeshi Sonehara 1, Akira Hokazono 1, Haruko Akutsu 2, Shigeru Kawanaka 1, Satoshi Inaba 1, Ayako Shimazaki 2 and Yoshiaki Toyoshima 1
△ 2 Metal segregation technology for reduction of contact resistance through pre-amorphization technique Corporate R&D Center Toshiba Corp. 1 ,Semiconductor Company Toshiba Corp. 2　*Nishi Yoshifumi 1 ,Tsuchiya Yoshinori 1 ,Kinoshita Atsuhiro 1 ,Hokazono Akira 2 ,Koga Junji 1
3 The Deep Source/Drain Junction optimization for 45nm node nMOSFET by using TCAD Toshiba 1　*Yabuuchi Yoshinori 1, Sawada Tatsuro 1, Fujii Osamu 1, Yoshimura Hisao 1
△ 4 Junction Profile Design for Aggressively Scaled pMOSFETs with Raised Source/Drain Extensions NEC Electronics Corp. 1　*Koichi Yako 1,Kazuya Uejima 1, Toyoji Yamamoto 1, Takashi Hase 1, and Masami Hane 1
5 Experimental Study of Single Source-Hetereojunction-MOS-Transistors (SHOTs) MIRAI-AIST 1, MIRAI-ASET 2, Kanagawa Univ. 3, Univ. Tokyo 4　*Mizuno Tomohisa 1,3, Moriyama Yoshihiko 2, Tezuka Tsutomu 2, Sugiyama Naoharu 2, Takagi Shinichi 1,4
6 Source-End Potential Engineering to Improve Ballisticity Kobe Univ. 1, Univ. of Tokyo 2　Tsuchiya Hideaki 1, Wang Wei 1, Takagi Shin-ichi 2
△ 7 Impact of Band Nonparabolicity on Effective Mass of 2-D and 1-D electrons Kansai Univ. 1　*Daisuke Kyokane 1, Yasuhisa Omura 1
8 Impact of Band Nonparabolicity on Threshold Voltage of ultrathin and quantum-wire SOI MOSFET’s Kansai Univ.　*Daisuke Kyokane 1, Yasuhisa Omura 1
Break 15:00〜15:15
9 Drift-Diffusion Current and “kT-Layer” Univ. of Tsukuba　*Natori Kenji
10 Analysis of High-field Transport in Silicon based on Flux Equation Univ. of Tsukuba 1　*Morozumi Naohito 1, Natori Kenji 1
11 Transport Analysis of Scaled MOSFET in 65nm Technology Based on Alpha-Power Law IIS, Univ. of Tokyo　*Suzuki Ryota 1, Saraya Takuya 1, Hiramoto Toshiro 1
12 Temperature dependence of electron mobility in Si MOSFETs with p-type poly-Si gates IIS/INQIE Univ. Of Tokyo 1, Dept. of EE Unvi. of Tokyo 2　*Park KyungHwa 1, Hirakawa Kazuhiko 1, Takagi Shinichi 2
13 First-principles study on inversion layer properties of atomically thin Si-channel FET NTT Basic Research Labs. 1　*Kageshima Hiroyuki 1, Fujiwara Akira 1
▲ 14 Mobility in [110]- and [100]-Directed Multiple Silicon Nanowire GAA MOSFETs on (100) SOI IIS, Univ. of Tokyo 1, CINQIE, Univ. of Tokyo. 2　*Jiezhi Chen 1, Takuya Saraya 1, Kousuke Miyaji 1, Ken Shimizu 1,2, and Toshiro Hiramoto 1,2　　　
15 Fabrication of GAA strained-Si MOSFET with SSON structure and characterization of strain around channel with NBD method MIRAI-ASET 1,MIRAI-ASRC,AIST 2, The Univ. of Tokyo 3　*Koji Usuda 1,S.Nakahara 1,Toshifumi Irisawa 1,, Yoshihiko Moriyama 1,Norio Hirashita 1, Tsutomu Tezuka 1, Naoharu Sugiyama 1, Yoshimi Yamashita 1, Noriyuki Taoka 2, Osamu Kiso 2, Toyoji Yamamoto 1, Shin-ichi Takagi 2,3
13.6 Si Devices/Integration Technology
Sept. 5 9:00〜11:00
5a-E-　/ II
▲△ 1 Fabrication of Silicon Nanogap Electrodes for Measuring Single Nanocrystalline Silicon Quantum Dot QNERC, Tokyo Tech 1、SORST-JST 2　Akhmadi Surawijaya1, Ken Uchida 1,2, and Shunri Oda1,2
△ 2 Characterization of the electron transport properties in the silicon triple quantum dots QNERC, Tokyo Tech. 1, Southampton Univ. 2, Tokyo Tech. 3, SORST-JST 4 　*Yamahata Gento 1, Tsuchiya Yoshishige 2, Mizuta Hiroshi 2, 3, 4, Uchida Ken 3, 4, and Oda Shunri 1, 4
△ 3 Observation of quantum level spectrum for silicon double single-electron transistors QNERC Tokyo Tech. 1,RIKEN 2,Southampton Univ. 3,Tokyo Tech. 4, SORST-JST 5　*Yoshiyuki Kawata 1,2,Tomohiro Yamaguchi 2,Koji Ishibashi 2,Yoshishige Tsuchiya 3,5,Hiroshi Mizuta 3,4,5,Ken Uchida 4,5,Shunri Oda 1,5
4 Operation of SOI-based radio frequency single electron transistor above 4.2 K QNERC, Tokyo Tech. 1,Southampton Univ. 2, Tokyo Tech. 3, SORST-JST 4　M. Manoharan 1,Yoshishige Tsuchiya 1,2,4,Hiroshi Mizuta 2,3,4,Ken Uchida 3,4,Shunri Oda1,4
5 Numerical study on single-electron turnstile operation by random multidot transistors Research Institute of Electronics, Shizuoka Univ. 1　*Yokoi Kiyohito 1, Moraru Daniel 1, Tabe Michiharu 1
▲△ 6 Observation of dopant-potential fluctuation in the channel of SOI-FETs by LT-KFM Research Institute of Electronics, Shizuoka Univ. 1, Faculty of Mechatronics, Warsaw Univ. of Tech. 2　*Ligowski Maciej 1,2, Moraru Daniel 1, Miftahul Anwar 1, Jablonski Ryszard 2, Tabe Michiharu 1
7 Single-electron characteristics with dopant ionization noise RIE Shizuoka Univ. 1,　*Ebisawa Kazuhito 1,Moraru Daniel 1,Kasai Yuuki 1,Mizuno Takeshi 1,Tabe Michiharu
▲ 8 Gate tuning of doped-nanowire FETs for single-electron transfer Research Institute of Electronics, Shizuoka Univ. 1　*Moraru Daniel 1, Yokoi Kiyohito 1, Ebisawa Kazuhito 1, Kasai Yuuki 1, Ligowski Maciej 1, Tabe Michiharu 1
13.7 Simulation
Sept. 3
3p-P11-　/ II
 
Poster Session
3p-P11-1〜14　15:30〜17:30
1 Simulating Quantum Transport in Nano-Scale MOSFET Kobe Univ. 　*Okazaki Hitoshi 1,Souma Satofumi 1,Matuto Ogawa 1
2 Effects of interface roughness on gate-tunneling in quantum-wire FETs – 3D NEGF study Osaka Univ. 1　Minari Hideki 1, Mori Nobuya 1
3 Simplified model for atomistic simulation of double-gate MOSFETs Osaka Univ. 1　*Nobuya Mori 1,Hideki Minari 1
△ 4 Theoretical Investigation of Electron--Modulated-Acoustic-phonon Interactions in a Free-standing Silicon Nanowire Nagoya Univ. 1, Osaka Univ. 2, SORST JST 3　Hattori Junichi 1, 3, Uno Shigeyasu 1, 3, Mori Nobuya 2, Numata Tatsuhiro 1, 3, Nakazato Kazuo 1, 3
5 Importance of the long-range part of the Coulomb interaction in distorted impurity distributions Inst. of Appl. Phys. Univ. of Tsukuba 1　*Fukui Takayuki 1, Nakanishi Kohei 1, Uechi Tadayoshi 1, Sano Nobuyuki 1
6 Analysis of Random Potential Fluctuation in Double-Gate MOSFETs Univ. of Tsukuba Inst. of Appl. Phys. 1　*Uechi Tadayoshi 1, Fukui Takayuki 1, Nakanishi Kouhei 1, Sano Nobuyuki 1
7 Suppression of DIBL in SOI MOSFET by controlling permittivity and thickness of BOX layers. Bio-Nano Electronics Research Centre, Toyo Univ.　*Abe Shunpei 1,Miyazawa yosiyasu 1,Nakajima yoshikata 1 ,Hanajiri taturo ,Toyabe toru 1, and Sugano takuo 1
8 Inprovement of performance of DSOI MOSFETs by heavy dopoing between local BOX regions Bio-Nano Electronics Research Centre Toyo Univ. 1　*Yamada Tatsuya 1, Miyazawa Yoshiyasu 1, Nakajima Yoshikata 1, Hanajiri Tatsuro 1, Toyabe Toru 1, Sugano Takuo 1
9 Crystal Plasticity Analysis of Dislocation Accumulation in ULSI Cells of different gate length Kitami Ins. Tec. 1,Musashi Ins.Tec. 2,Advanced Research Labo., Hitachi, Ltd. 3
　*Sato Michihiro 1,Ohashi Tetsuya 1,Maruizumi Takuya 2,Kitagawa Isao 3
▲ 10 FEM assessment of strain distribution in strained Si membranes Faculty of Eng. Sci.1, KASTEC 2　Gao Hongye 1, Ikeda Kenichi 1, Hata Satoshi 1, Nakashima Hideharu 1, Yang Haigui 2, Wang Dong 2, Nakashima Hiroshi 2
11 Statistical Compact Model Parameter Extraction by Direct Fitting to Variations NEC Electronics　Kiyoshi Takeuchi, Masami Hane
12 Independent-Double-Gate FinFET Compact Model and Its Calibration AIST　Shin-ichi O'uchi, Tadashi Nakagawa, Yongxun Liu, Kazuhiko Endo, Takashi Matsukawa, T. Sekigawa, K. Sakamoto, H. Koike, Meishoku Masahara
13 Design Optimization of Lateral DMOS using Genetic Algorithm New Japan Radio Co.,Ltd,　*Yohei Sudou 1, Hideto Mitsuhashi 1, Akio Mouraguchi 1, Masaaki Sato 1
△ 14 Feasibility study of the PHITS code in simulation of cosmic-ray neutron induced soft errors Kyushu Univ. 1, Fujitsu Microelectronics Limited 2,　*Abe Shin-ichiro 1, Watanabe Yukinobu 1, Tosaka Yoshiharu 2