11 Semiconductors A (Silicon)
11.1 Fundamental Materials Characterization and Evaluation
March 28 9:00`18:00
28a-K-@/ II
’ 1 In-situ observation of cyclic surface morphology change during charge/discharge in Li secondary micro battery embedded in Si substrate. Hosei Univ. 1,Osaka Kyoiku Univ. 2@*Yuasa Yuki 1,Onoue Asuka 1,Kuriyama Kazuo 1,Kushida Kazumasa 2.
  2 Characterization of potential difference in Si/SiGe heterostructures by scanning tunneling microscopy Musashi Inst. of Technol. 1@*Okui Toshiko 1, Tanaka Yuma 1, Shiraki Yasuhiro 1
  3 First-principles calculations on Si1-xGex crystal structure and its properties Musashi Inst. of Tech. 1,Hitachi Ltd. 2,@*Yoshida Kenji 1,Wakabayashi Naoki 1,Suwa Yuji 2,Maruizumi Takuya 1, Shiraki Yasuhiro 1,
  4 Charge Transfer Doping for Si Surfaces Using Aluminum Oxidation Meiji Univ. 1,ASRC-AIST 2,MIRAI-ASET 3@*Sakaya Kou 1,Tada Tetsuya 2,Kanayama Toshihiko 2,Kimoto Kenji 3,Uekusa Shin-ichiro 1
  5 Dose rate dependence of performance degradation in Si bipolar transistor by 2-MeV electron irradiation KNCT 1, IMEC 2@K.Hayama 1, K.Takakura 1, M.Yoneoka 1, H.Ohyama 1, E.Simoen 2, C.Claeys 2
  6 Thermally recovery behavior of electron irradiated SiC MESFETs KNCT 1, New Japan Radio 2, JAXA 3, IMEC 4@*Kenichiro Takakura 1, Koushi Uemura 1, Kiyoteru Hayama 1, Hidenori Ohyama 1, Manabu Arai 2, Satoshi Kuboyama 3, Tomohiro Kamezawa 3, Eddy Simoen 4, Cor Claeys 4
    Break 10:30`10:45
  7 Mechanism of the creation of traps induced by hole injection for SiO2/Si PERL., Hitachi, Ltd. 1, Renesus Technology 2 @*Yonamoto Yoshiki 1, Akamatsu Naotoshi 1, Kanda Naoki 2, Kato Hisayuki 2
  8 Transfer of a positive fixed charge at a Si/SiO2 interface with hydrogen migration Musashi Inst. of Technology 1, National Inst. for Materials Science 2@*Takuya Maruizumi 1, Jiro Ushio 2, Yasuhiro Shiraki 1
  9 Nanoscale dielectric properties at the SiO2/Si(001) interface Univ. Electro-Communications@*Wakui Sadakazu, Nakamura Jun, Natori Akiko
  10 Theoretical Study of Influence of Oxygen Atoms on Metallic Atoms in Gate Insulators Kyoto Univ.@*Doi Kentaro 1, Sugino Shinya 1, Mikazuki Yutaka 1, Doi Tatsuki 1, Szarek Pawel 1, Tachibana Akitomo 1
’ 11 Local bonding state analysis of Gate/dielectric including heavy elements by means of TEM-EELS Advanced LSI Technology Laboratory, Research and Development Center, TOSHIBA CORPORATION@Hiroki Tanaka 1, Reika Ichihara 1, Yoshinori Tsuchiya 1, Masato Koyama 1, Shiro Takeno 1
    Lunch 12:00`13:00
28p-K-@/ II
  1 Doping Effects of Donor Impurities in Si Nanostsructures by Ion Implantation Inst.of Appl.Phys.Univ.ofTsukuba 1,S.R.P Nano Science 2,NIMS 3,@*Shirakawa Ryota 1,Tsujimura Masatoshi 1,Uchida Noriyuki 1.2,Fukata Naoki 2.3,Murakami Kouichi 1.2,
  2 Formation process of nanocrystal Si dots by laser annealing Inst.of Appl.Phys.Univ.of Tsukuba 1,S.R.P Nano Science 2,NIMS 3@*Okami Tsuyoshi 1,Uchida Noriyuki 1.2,Fukata Naoki 2.3,Murakami Kouichi 1.2,
’ 3 Impact of Impurity Doping into Si Quantum Dots with Ge Core on Their Electrical Charging Characteristics Grad. School of Advanced Sciences of Matter, Hiroshima Univ. 1@*Katsunori Makihara 1, Mitsuhisa Ikeda 1, Seiichiro Higashi 1, Seiichi Miyazaki 1
  4 Luminescence Study of Multiply-Stacked Structures Consisting of Impurity-Doped Si Quantum Dots and Ultrathin SiO2 Grad. School of Advanced Sciences of Matter, Hiroshima University 1.@*Yoshihiro Kawaguchi 1, Katsunori Makihara 1, Mitsuhisa Ikeda 1, Hideki Murakami 1, Seiichiro Higashi 1, Seiichi Miyazaki 1
  5 Precipitation of P atoms in P-doped Si nanowires by thermal oxidation Inst. of Appl. Phys., Univ. of Tsukuba 1, NIMS 2, S.R.P. Nano Science 3, IMR Tohoku Univ. 4@›Matsushita Satoshi 1, Fukata Naoki 2,3, Seoka Masanori 1, Tsurui Takao 4, Chen Jun 2, Sekiguchi Takashi 2, Uchida Noriyuki 1,3, Murakami Kouichi 1,3
  6 Hydrogen passivation effect in B-doped silicon nanowires Inst. of Appl. Phys., Univ. of Tsukuba 1,NIMS 2,S.R.P. Nano Sci., Univ. of Tsukuba 3,Inst. For Mat. Research, Tohoku Univ. 4@*Okada Naoya 1,Seoka Masanori 1,Fukata Naoki 2,3,Chen Jun 2,Sekiguchi Takashi 2,Tsurui Takao 4,Murakami Kouichi 1,3
  7 Evaluation of Electronic Charged States of Single-NiSi dots Using an AFM/Kelvin Probe Technique Hiroshima Univ.@*Nishihara Ryosuke 1,Makihara Katsunori 1,Kawaguchi Yoshihiro 1,IKeda Mitsuhisa 1,Murakami Hideki 1, Higashi Siichiro,Miyazaki Siichi 1
  8 Formation of Ni Nanodots Induced by Remote Hydrogen Plasma-Control of Dot Density Adsm, Hiroshima Univ. 1@*shimanoe kazuhiro 1,makihara katsunori 1,kawaguti yoshiyuki 1,okuyama kazuki 1,nishihara ryousuke 1,ikeda mitsuhisa 1,matsumoto ryuuji 1,higashi seiichirou 1,miyazaki seiichi 1
  9 Electron transport of Si nanochains at high bias voltages: stability and the effect of electron injection Osaka Univ. 1@*Hideo Kohno 1, Seiji Takeda 1
  10 Micrometer-sized pore formation in silicon by wet etching using spherical metal particles as catalysts Research Center for Solar Energy Chemistry, Osaka Univ. 1@Kazuya Tsujino 1, Chia-Lung Lee 1, Michio Matsumura 1
    Break 15:30`15:45
  11 STM observations of metallic nanowires along atomic steps on Si(111) surfaces Osaka Univ. 1@Shigetoshi Takushi 1, Yoshimatsu Akina 1, Morita Mizuho 1, Arima Kenta 1
  12 Chemical Vapor Deposition of Ruthenium Films under Hydrogen Reduction Atmosphere Inst. for Semiconductor Tech., ULVAC,Inc. 1@*Zama Hideaki 1, Nishimura Yuuji 1, Ishikawa Michio 1
£ 13 Formation of High Conductive W Thin Film Using Co Seed Layer Samsung Electronics 1@Eun-Ok Lee 1, Hyun-Su Kim 1, Eun-Ji Jung 1, Jang-Hee Lee 1, Dae-Yong Kim 1, Jong-Ho Yun 1, Byung-Hee Kim 1, Gil-Heyun Choi 1, Sung-Tae Kim 1, U-In Chung 1, Joo-Tae Moon 1
  14 Evaluation method of Barrier Metal by Carrier Life-Time of p-n junction Graduate School of Science and Technology, Kumamoto University@*Syun-ichirou Komura, Takayuki Mizogami, Fumito Imura and Hiroshi Kubota
  15 Characterization of surface recombination velocity of SOI substrates by optical measurements (2) Bio Nano Electronics Research Center, Toyo Univ. 1, Faculty of Eng., Toyo Univ. 2@Y. Miyazawa 1,2, Y. Nakajima 1,2, T. Hanajiri 1,2, S. Komuro 1, T. Toyabe 1,2
’ 16 Stress Characterization of Si by a Scanning Near-Field Optical Raman Microscope Toray Research Center Inc. 1@Murakami Masataka 1, Matsuda Keiko 1, Sugie Ryuuichi 1, Yoshikawa Masanobu 1
  17 Raman spectroscopy with quasi-line shape excitation source using high-speed Galvanometer PHOTON Design Co. 1, Meiji Univ. 2@*Shimidzu Ryosuke 1, Chiba Ichiro 1, Kannno Tadaaki 1, Kosemura Daisuke 2, Yamasaki Kosuke 2, Kakemura Yasuto 2, Yoshida Tetsuya 2, Ogura Atsushi 2
’ 18 Evaluation of strain distribution at Si-surface under patterned SiN film by UV-Raman specroscopy with quasi-line excitation source Meiji Univ. 1, TOKYO ELECTRON AT 2@*Kosemura Daisuke 1, Yamasaki Kosuke 1, Kakemura Yasuto 1, Yoshida tetsuya 1, Ogura Atsushi 1, Kohno Masayuki 2, Nishida Tatsuo 2, Nakanishi Toshio 2
  19 Investigation of Raman Spectroscopic Stress Evaluation Method for Silicon using Micro-Tensile Tester HORIBA, Ltd. 1, Univ. of HYOGO 2@*Kashiwagi Shinsuke 1, Naka Nobuyuki 1, Nagai Yuji 2, Namazu Takahiro 2, Inoue Shozo 2, Ohtsuki Kunio 1
11.2 Surface
March 27 9:30`11:30
27a-ZG-@/ II
  1 Initial stage of silicon oxidation in the Torr pressure range : A comparison between O2 and H2O oxidations Hirosaki Univ. 1,Lawrence Berkeley National Lab. 2,Univ. California Davis 3@*Enta Yoshiharu 1,Mun S.Bongjin 2,Rossi Maximilliano 2,Fadley S.Charles 23
  2 Characterization of Atomic Roughness at the Gate Oxide/Si Substrate Interface MIRAI-Selete 1, Univ. of Tokyo 2@Yano Fumiko 1, Tsunomura Takaaki 1, Nishida Akio 1, Kamohara Shiro 1, Hiramoto Toshio 1,2
  3 Step-flow growth of native oxide on Si (111) surface Tsukuba Univ. 1,TIMS 2@*Ohsawa Keichiro 1,Hasunuma Ryu 1,2,Yamabe Kikuo 1,2
  4 Enhanced Si self-diffusion near the oxide/silicon interface during silicon thermal oxidation NTT Basic Research Labs. 1, Keio Univ. 2@*Uematsu Masashi 1, Ibano Kenzo 2, Itoh Kohei 2
  5 Oxygen stable sites in Si thermal oxide and oxygen transport mechanism NTT Basic Research Labs. 1, Mie Univ. 2@*Kageshima Hiroyuki 1, Uematsu Masashi 1, Akiyama Toru 2, Ito Tomonori 2
  6 Unified kinetic theory for thermal oxidation of silicon in dry and wet ambients Waseda Univ. 1, Waseda Nano Inst. 2, PRESTO-JST 3@Watanabe Takanobu 1,2,3, Ohta Hiromichi 1, Ohdomari Iwao 1,2
  7 Properties of light-emitting porous silicon formed in HF/FeCl3 mixed solutions Gunma University@Y. K. Xu, S. Adachi, T. Miyazaki 1
  8 Modification of step structure on Si(111) during wet etching Tsukuba Univ. Appl.Sci. 1, Tsukuba Univ. NIMS 2@*Ryota Ozaki 1 ,Ryu Hasunuma1,2 ,Kikuo Yamabe 1,2
11.2 Surface
March 28 9:00`16:45
28a-C-@/ II
  1 Study on Sulfuric Acid Electrolysis using Boron Doped Diamond Electrode Chlorine Engineers Corp. 1,Toshiba Corp.Manufacturing Engineering Center 2,Shibaura Mechatronics Corp. 3@Masaaki Kato 1,Yukihiro Shibata 2,Naoya Hayamizu 2,Nobuo Kobayashi 3,Yoshiaki Kurokawa 3
  2 Resist Removal using Electrolyzed Sulfuric Acid Toshiba Manufacturing Engineering Center 1,Chlorine Engineers 2,Shibaura Mechatronics 3@*Shibata Yukihiro 1,Hayamizu Naoya 1,Kato Masaaki 2,Kobayashi Nobuo 3,Kurokawa Yoshiaki 3
  3 Cross contamination control with dissolved hydrogen water. Hitachi,LTD. 1,Hitachi High-Technologies Corp. 2@*Hara Koji 1,Hamano Megumi 1,Takahara Yoichi 1,Moriguchi Yoshihiro 2
  4 Influence of Pre-Cleaning Defects on SiGe Epitaxial Growth Sony corp.@*Okamoto Akira 1, Watanabe Hideo 1, Kuniyasu Hitoshi 1
  5 Development of Bevel Brush Scrubbing Process (I) Sony Corporation@*Uemura Takayuki, Ugajin Hajime, Hagimoto Yoshiya, Iwamoto Hayato
    Break 10:15`10:30
  6 Effect of additive on selectivity in silicon nitride film wet etching Corporate Manufacturing Engineering Center, TOSHIBA Corporation 1@*Katsuya Eguchi 1,Naoya Hayamizu 1
  7 Nano particle removal efficiency on 300mm wafer by using supercritical CO2 Espec Corp. 1, Tsukuba Semi Technology Co.,Ltd 2, Hirhoshima Univ. 3@*Inahara Junichi 1,3, Nakahira Megumi 2, Shin Chul Kang 2, Takahagi Takayuki 3, Hasegawa Shinichi 2
  8 Removal of Cu contaminants on bare Si by defect passivation etchless cleaning solutions (2) Control of surface morphology ISIR Osaka Univ. 1@*Takahashi Masao 1, Narita Hiroaki 1, Liu Yueh-Ling 1, Kobayashi Hikaru 1
  9 Vt shift by DIW rinsing using single spin wafer process NECYamagata 3rd Production1, NECYamagata Product Eng.2, NECEL Adv. Dev.3@Hiroaki Tomimori 1, Eiichi Fujikura 2, Yoshitaka Kubota 3, Hiroshi Kawaguchi3
  10 Homogeneous and high density Ge nanodot formation on Si(001)-2Boff substrate using MMGe. Nagaoka Univ. of Technology 1@*Ogiwara Tomoaki 1, Kanemaru Tetsushi 1,Yasui Kanji 1, Akahane Tadashi 1, Takata Masasuke 1
  11 Simulation of thermal agglomeration of ultrathin silicon-on-insulator layer Research Inst. of Electronics, Shizuoka Univ. 1@Youjun Fan 1, Zainal A. Burhanudin 1, Maciej Ligowski 1, *Ratno Nuryadi 1, Michiharu Tabe 1
    Lunch 12:00`13:00
28p-C-@/ II
  1 SR-XPS study on the RT-adsorption of water on Si(110)-16~2 CIR Tohoku univ.1, JAEA.2@*Nakano Takuya1, Hasegawa Satoshi1, Togashi Hideaki1, Kato Atsushi1, Goto Seiichi1, Teraoka Yuuden2, Yoshigoe Akitaka2, Suemitsu Maki1
  2 The difference of reactivity on the H-terminated Si(111)(1~1) surface between N-type and P-type Fac. of Eng. Univ. of Tokyo 1, RIKEN 2, G.S. of F.S. Univ. of Tokyo 3@*Hideki Ozawa 1,2, Taro Yamada 2, Hiroyuki Kato 2, Toshiaki Iitaka 2, Maki Kawai 1,2,3
  3 Amount of Adsorbed Diethylphthalate and Isopropyl alcohol on Silicon Surface (2) Yokohama National Univ.@Yamaya Daisuke 1, *Habuka Hitoshi 1
  4 Stereodynamics in the dissociative adsorption of NO on Si(111) Osaka Univ .1, JST 2, Univ. of Hyogo 3, JAEA 4@Hashinokuchi Michihiro 1, Okada Michio 1 2, Moritani Kousuke 3, Teraoka Yuden 4, Kasai Toshio 1
  5 STM/STS measurements in the initial growth of titnium silicide Yokohama National Univ.@*Toramaru Masamitsu 1, Koma Masahiro 1, Iida Takanori 1, Sato Kazunari 1, Shudo Kenichi 1, Ohno Shinya 1, Tanaka Masatoshi 1
  6 Atomic structures of Si(001) flattened by SiO2 particles mixed with water Osaka Univ. 1, Kumamoto Univ. 2@Arima Kenta 1, Kubota Akihisa 2, Mimura Hidekazu 1, Katoh Jun 1, Inagaki Kouji 1, Mori Yuzo 1, Endo Katsuyoshi 1, Yamauchi Kazuto 1
’ 7 FTIR study of the initial oxidation stage on HF-treated@Si,SiGe(100) surfaces Graduate School of Science and Engineering Yamagata Univ 1,@*Nagato Masaya 1,Kinoshita Yuta 1,Hirose Fumihiko 1,
    Break 14:45`15:00
  8 New Approach to Angle-resolved Photoelectron Spectroscopy Graduate Shcool of Eng Tohoku Univ. 1,JASRI/SPring-8 2,Musashi Inst. of Technol 3,NICHe Tohoku Univ. 4@*Aratani Takashi 1, Higuchi Masaaki 1, Sugawa Shigetoshi 1,Ikenaga Eishi 2, Nohira Hiroshi 3,Teramoto Akinobu 4, Ohmi Tadahiro 4, Hattori Takeo 4
’ 9 Photoelectron spectroscopy study on subnitride and valence band offset at Si3N4/Si interface formed by radical nitridation Graduate School of Eng. Tohoku Univ. 1, JASRI/SPring-8 2, Musashi Inst. of Technol 3, Niche Tohoku Univ. 4 @*Aratani Takashi 1, Higuchi Masaaki 1, Sugawa Shigetoshi 1,Ikenaga Eishi 2, Nohira Hiroshi 3, Maruizumi Takuya 3, Teramoto Akinobu 4, Ohmi Tadahiro 4, Hattori Takeo 4
’ 10 Evaluation of Si3N4/Si interface by UV-Raman spectroscopy School of Science and Technologies Meiji Univ. 1,Graduate School of Engineering Tohoku Univ. 2, Niche Tohoku Univ. 3@*Yoshida Tetsuya 1,Yamasaki kousuke 1,Kosemura Daisuke 1,Kakemura Yasuto 1,Ogura Atsushi 1,Aratani Takashi 2,Higuchi Masaaki 2,Teramoto Akinobu 3,Tadahiro Ohmi 3,Hattori Takeo 3
  11 Real-time STM observation of low-energy metal-ion irradiation on high-temperature Si(111) surface (II) Waseda University 1, Waseda ZAIKEN 2@*Takefumi Kamioka 1, Makoto Uchigasaki 1, Iwao Ohdomari 1,2
  12 Thickness dependent band bending of SiO2 films observed with EUV excited photoelectron spectroscopy system EUPS2 AIST-ASRC 1, Renesas 2@Tomie Toshihisa 1, Kasai Takeshi 1, Iwazumi Hiromi 1, Katayama Toshiharu 2, Asayama kyouichirou 2
  13 Polarization Controlled Near-field Raman Imaging on Crystalline Materials Dept.of phys.,Gakushuin Univ. 1, Riken Nanophotonics 2, Dept.of Appl.phys.,Osaka Univ. 3, CREST 4@*Motohashi Masashi 12, Hayazawa Norihiko 24, Saito Yuika 3, Kawata Satoshi 234
  14 Analysis of surface potential on Cr-contaminated and thermally oxidized n-type Si with alternating current surface photovoltage method College of Engineering, Nihon Univ.1@*Takuma Ishikawa 1, Hirofumi Shimizu 1, Masanori Ikeda 1
11.3 Gate Insulator Technology
March 27 10:15`12:00
27a-ZH-@/ II
  1 Characterization of non-volatile memory using a thin AlSiOx film as a charge trapping layer System Devices Res. Lab. NEC 1@Yukishige Saito 1, Takashi Nakagawa 1, Hiroshi Sunamura 1, Taeko Ikarashi 1, Ayuka Morioka 1, Shinji Fujieda 1, Toru Tatsumi 1
  2 Evaluation of Retention Characteristics of MONOS structure using Si-rich SiN films Hitachi CRL. 1@*Mine Toshiyuki 1,Fujisaki Koji 1,Ishida Takeshi 1,Hirotaka Hamamura 1
’ 3 Study on Anomalously Large Threshold Voltage Fluctuation Caused by Complex Random Telegraph Signal in Floating Gate Flash Memory Hitachi CRL. 1, Renesas 2@*Naoki Tega 1, Hiroshi Miki 1, Taro Osabe 1, Akira Kotabe 1, Kazuo Otsuga 1, Hideaki Kurata 1, Shiro Kamohara 2, Kenji Tokami 2, Yoshihiro Ikeda 2, Renichi Yamada 1
  4 Thermodynamics of silicon dioxide PHENITEC SEMICONDUCTOR Corp.@*Masashi Minami 1, Yoichi Shiraga 2
’ 5 Influence of Recovery Time on AC-NBTI in Ultra-thin Gate Dielectrics Corporate R&D Center Toshiba Corp 1, Semiconductor Company, Toshiba Corp. 2@Shigeto Fukatsu 1, Yuichiro Mitani 1, Daisuke Hagishima 1, Kazuya Matsuzawa 1, Koichiro Inoue 2
’ 6 Development of NBTI Simulator considering gate bias dependancy Advanced LSI Technology Lab., Corporate R&D Center, Toshiba Corporation 1Semiconductor Company, Toshiba Corporation 2@Daisuke Hagishima 1, Shigeto Fukatsu 1,Kazuya Matsuzawa 1, Yuichiro Mitani 1,Kouichiro Inoue 2
  7 A modeling of NBTI mechanism considering nitrogen concentration dependency II Toshiba 1@*Shimokawa Junji 1, Enda Toshiyuki 1, Ito Sanae 1, Aoki Nobutoshi 1, Toyoshima Yoshiaki 1
11.3 Gate Insulator Technology
March 28 9:00`19:00
28a-ZH-@/ II
  1 Prevention of interfacial reaction of HfO2/Si structure by 1nm silicon nitride layers formed by nitrogen plasma generated by low energy electron impact ISIR Osaka Univ 1@Imamura Kentarou 1, Fukayama Kennichi 1, Takahashi Masao 1, Kobayashi Hikaru 1
£ 2 Preparation and characterization of hafnium silicate dielectric layers by photo-assisted MOCVD using mixed precursor of Hf(O-t-C4H9)4‚ΖSi(O-t-C4H9)4 Osaka Univ. 1@*Hyun Lee 1. Takeshi Kanashima 1. Masanori Okuyama 1.
  3 Fabrication and Characterization of HfOxNy Thin Films followed by O2 annealing Tokyo Univ.of Agri.&Tech @*Otaka Naoko 1,Jyo Ryuuyou 1, Iwazaki Yositaka 1, Hasumi Masahiko 1, Ueno Tomo 1, Kuroiwa Koichi 1
  4 Fabrication of HfO2 Films on Si and Ge substrate by ECR Plasma Oxidation of Metal Hf Tokyo Univ. of Agri. & Tech.@*Nagasato Yoshitaka 1, Iwazaki Yoshitaka 1, Hasumi Masahiko 1, Ueno Tomo 1, Kuroiwa Koichi 1
  5 Fabrication of HfO2/Al2O3/Si stacked structure using Al2/O3 film as barrier for oxidant Tokyo Univ. of Agri. & Tech.@*Hayase Yukihide 1,Niikura Masayuki 1, Iwazaki Yoshitaka 1, Hasumi Masahiko 1, Ueno Tomo 1, Kuroiwa koichi 1
  6 Study of Fabrication Process of high-k Films by Metal Deposition Followed by O2 Annealing. Tokyo Univ.ofAgri.&Tech. 1@*Iwazaki Yoshitaka 1,Fujitani Jyun 1,Hasumi Masahiko 1,Ueno Tomoo 1,Kuroiwa Kouichi 1
  7 HfOxNy gate insulator formations utilizing ECR plasma process Tokyo Tech 1,NTT MI Lab. 2@*Nakano Yusuke 1,Satoh Masaki 1,Jin Yoshito 2,Shimada Masaru 2, Ohmi Shun-ichiro 1
    Break 10:45`11:00
  8 The Effect of Nitrogen on Thermal Stability in Hf1-XSiXO2/SiO2 Interface Region FUJITSU LABORATORIES LTD. 1@*Takahashi Norihiko 1, Yamasaki Takahiro 1, Kaneta Chioko 1
  9 Effect of Ba or N doping on electronic properties of HfO2 gate insulator Toshiba Co., R&D Center 1 @Tatsuo Schimizu 1, Masato Koyama 1
’ 10 Improved Electrical Properties of HfTiSiO Gate Dielectrics by Structural Optimization Osaka Univ.1, Canon ANELVA.2@*Arimura Hiroaki 1,Horie Shinya 1,Minami Takashi 2,Kitano Naomu 1,2,Kosuda Motomu 2,Shimura Takayoshi 1,Watanabe Heiji 1
  11 Theoretical analysis of metal work function in Pt/HfO2/SiO2/Si system and role of the HfO2/SiO2 MIRAI-ASET 1,Univ. of Vienna 2,MIRAI-ASRC-AIST 3,Univ. of Tokyo 4@Ikeda Minoru 1,Kresse Georg 2,Nabatame Toshihide 1,Toriumi Akira 3,4
’ 12 Analysis of time-dependence of HfO2 based gate dielectrics by photoemission spectroscopy Toukyou Univ. 1, STARC 2, JST-CREST 3@*Tanimura Tatsuhiko 1, Toyoda Satoshi 1, Kumigashira Hiroshi 1,3, Oshima Masaharu 1,3, Ikeda Kazuto 2, Liu Guo-Lin 2, Liu Ziyuan 2, Usuda Koji 2
  13 Evaluation of Defect State Density in HfSiOxNy/SiO2/Si(100) System by Total Photoelectron Yield Spectroscopy ADSM, Hiroshima Univ 1, Selete 2@*Munetaka Yuuki 1, Ohta Akio 1, Tsugou Akinari 1, Nakagawa Hiroshi 1, Murakami Hideki 1, Higashi Seiichiro 1, Miyazaki Seiichi 1, Inumiya Seiji 2, Nara Yasuo 2
    Lunch 12:30`13:30
28p-ZH-@/ II
  1 Suppression of Hf diffusion in SiO2 by N incorporation NEC System Devices Res. Labs.@Nobuyuki Ikarashi 1, Koji Watanabe 1, Koji Masuzaki 1, Takashi Nakagawa 1, Makoto Miyamura 1
  2 Thickness dependent band bending of HfSiON films observed with EUV excited photoelectron spectroscopy system EUPS2 AIST-ASRC 1, Renesas 2@Tomie Toshihisa 1, Kasai Takeshi 1, Iwazumi Hiromi 1, Katayama Toshiharu 2, Asayama kyouichirou 2
£ 3 Evolution of leakage sites in high-k dielectrics revealed by electron-beam-induced current (EBIC) technique NIMS 1, Tsukuba Univ. 2, Selete 3@@*Chen Jun 1, Sekiguchi Takashi 1, Takase Masami 1, Fukata Naoki 1, Umezawa Naoto 1, Ohmori Kenji 1, Chikyow Toyohiro 1, Hasunuma Ryu 2, Yamabe Kikuo 2, Inumiya Seiji 3, Nara Yasuo 3
  4 Analysis of HfO2/Si interfacial silicidation reaction by spectroscopic photoemission and low energy electron microscope The Univ. of Tokyo 1, JST-CREST 2, SPring-8/JASRI 3, KEK-PF 4, STARC 5@*Yasuhara Ryutaro 1, Taniuchi Toshiyuki 1, Kumigashira Hiroshi 1,2, Oshima Masaharu 1,2, Guo Fangzhun 2,3, Ono Kanta 2,4, Kinoshita Toyohiko 2,3, Ikeda Kazuto 5, Liu Guo-Lin 5, Liu Ziyuan 5, Usuda Koji 5
  5 The Effect of Nitrogen Concentration into HfSiOx Films on Flatband Voltage Shift Inst. of Appl. Phys, Univ. of Tsukuba 1, Semiconductor Leading Edge Technologies 2, TIMS, Univ. of Tsukuba 3@*Tamura Chihiro 1,Naito Tatsuya 1,Sato Motoyuki 2,Inumiya Seiji 2,Hasunuma Ryu 1,3,Yamabe Kikuo 1,3
  6 Relationship between Low-Field Mobility and High-Field Carrier Velocity in Short-Channel High-k FETs RDC, Toshiba Corp. 1@*Saitoh Masumi 1, Uchida Ken 1
£ 7 Determination of electron energy barrier profiles in HfO2 dielectric using internal photoemission (IPE) Univ. of Tokyo 1@*Widiez Julie 1, Nishimura Tomonori 1, Kita Koji 1, Toriumi Akira 1
  8 High Performance HfSi/HfO2 MOSFETs by Interfacial Layer made of Ozone Water Sony@Oshiyama Itaru 1, Kaori Tai 1, Hirano Tomoyuki 1, Hagimoto Yoshiya 1, Uemura Takayuki 1, K.M.A.Salam 1, Ando Takashi 1, Iwamoto Hayato 1
£ 9 Interface characteristics of sub-1nm EOT HfSix/HfO2 gate stack driven by Si extrusion process Sony Corporation@K.M.A Salam, T. Ando, M. Nakata, T. Hirano, K. Tai, H. Iwamoto
  10 Conductance characteristics of direct-contact HfO2/Si structures AIST-NeRI 1, Musashi Inst. 2@@@*Miyata Noriyuki 1,2, Abe Yasuhiro 1,2, Yasuda Tetsuji 1
    Break 16:00`16:15
  11 Reduction of accumulation capacitance observed for p-Si/HfO2 direct-contact structures AIST-NeRI 1, Musashi Inst. Technol. 2@*Abe Yasuhiro 1,2, Miyata Noriyuki 1,2, Shiraki Yasuhiro 2, Yasuda Tetsuji 1
’ 12 Systematic Study on Effective Work Function Instability of Hf-based High-k Dielectric/Electrode Interfaces Osaka Univ. 1, Univ. of Tsukuba 2, Hiroshima Univ. 3, SELETE 4, Waseda Univ. 5@*Kita Yuki 1, Yoshida Shinichi 1, Shimura Takayoshi 1, Yasutake Kiyoshi 1, Watanabe Heiji 1, Shiraishi Kenji 2, Ohta Akio 3, Miyazaki Seiichi 3, Nara Yasuo 4, Yamada Keisaku 5
  13 Thermal tolerance and Interface state of ZrNxOy Thin Films followed by O2 annealing Tokyo Univ.of Agri.&Tech@*Jyo Ryuuyou 1, Otaka Naoko 1, Hasumi Masahiko 1, Iwazaki Yositaka 1, Ueno Tomo 1, Kuroiwa Koichi 1
  14 Anisotropic relative dielectric constant of tetragonal Zr1-xSixO2 film Toshiba Corporation 1@*Tsunehiro Ino 1, Kamimuta Yuuichi 1, Koyama Masato 1, Nishiyama Akira 1
  15 Correlation between Atomic Structure and Workfunction at Metal/high-k Interfaces; Theoretical Study Chiba univ. 1, Tsukuba Univ. 2@Ayuda Ryuichi 1, Nii Harumichi 1, Nakayama Takashi 1, Shiraishi Kenji 2
  16 Effect of Ni-Si ratio on work function modulation with dopant pileup at Ni-FUSI gate interface Toshiba Co. RDC 1, Toshiba Co. Semiconductor Com.@*Tsuchiya Yoshinori 1,Yoshiki Masahiko 1,Sato Motoyuki 2,Sekine Katsuyuki 2,Saito Tomohiro 2,Nakajima Kazuaki 2,Aoyama Tomonori 2,Koga Junji 1,Nishiyama Akira 1,Koyama Masato 1
’ 17 Work function modulation with Al pileup at Ni-FUSI/HfSiON interface Toshiba Co. RDC 1, Toshiba Co. Semiconductor Com. 2,@*Tsuchiya Yoshinori 1,Yoshiki Masahiko 1,Sato Motoyuki 2,Sekine Katsuyuki 2,Saito Tomohiro 2,Nakajima Kazuaki 2,Aoyama Tomonori 2,Koga Junji 1,Nishiyama Akira 1,Koyama Masato 1
  18 Vfb roll-off behavior of Metal/HfO2/SiO2 stack in thinner EOT region MIRAI-ASET 1, MIRAI-AIST 2, The Univ. of Tokyo 3@*Akiyama Koji1, Wang Wenwu2, Mizubayashi Wataru2, Ikeda Minoru1, Ota Hiroyuki2, Nabatame Toshihide1, Toriumi Akira2,3
  19 Additional Mobility Component due to Replacement of Poly-Si Gate with TiN Metal Gate in HfSiON MISFET Toshiba Corp. R&D center 1, Toshiba Corp. Semiconductor Company 2@*Tatsumura Kosuke 1, Iijima Ryosuke 1, Ishihara Takamitsu 1, Koyama Masato 1, Goto Masakazu 2, Watanabe Takeshi 2, Kawanaka Shigeru 2, Takayanagi Mariko 2
  20 Reduction reaction of RuO2 gate electrodes in high-k gate stack Semiconductor Leading Edge Technologies, Inc.@Kadoshima Masaru 1, Sugita Yoshihiro 1, Aminaka Toshio 1, Kurosawa Etsuo 1, Nakata Hiroyuki 1, Aoyama Takayuki 1, Nara Yasuo 1, Ohji Yuzuru 1
  21 Characterization of metal/high-k dielectrics stacking structures using hard x-ray photoelectron spectroscopy NIMS 1, Tokyo Inst. Tech 2, Univ. of Tsukuba 3@*Kenji Ohmori1,Hideki Yoshikawa1, Parhat Ahmet2, Kuniyuki Kakushima2, Kikuo Yamabe3, Keisuke Kobayashi1, Hiroshi Iwai2, Toyohiro Chikyow1
11.3 Gate Insulator Technology
March 29 9:15`18:30
29a-ZH-@/ II
  1 Experimental verification of the unified Si oxidation reaction model using real-time monitoring surface analytical methods Tohoku Univ.@1@Ogawa Shuichi 1, Takakuwa Yuji 2
  2 Si atom emission kinetics during oxidation on Si(001) surfaces (X)FCorrelation between strained Si atoms and growth rate Tohoku Univ. 1, JAEA 2, Akita Nat. Col. Tech. 3@Ogawa Shuichi 1, Yoshigoe Akitaka 2, Ishidzuka Shinji 3, Teraoka Yuden 2, Takakuwa Yuji 1
  3 Electrical properties and roles of H atoms on Pb centers at SiO2/Si interfaces – Experimental observation Advanced LSI Technology Laboratory, Toshiba Corp.1@Matsushita Daisuke 1,Kato Koichi 1,Ishihara Takamitsu 1,Muraoka Koichi 1, Mitani Yuuichiro 1
  4 Electrical properties and roles of H atoms on Pb centers at SiO2/Si interfaces - Theoretical prediction Toshiba R & D Cent.@*Kato Koichi 1, Ishihara Takamitsu 1, Matsushita Daisuke 1
  5 Degradation mechanism of the inversion layer mobility in MOSFETs associated with interface states Advanced LSI Technology Laboratory, Toshiba Corp., R & D Center@Takamitsu Ishihara 1, Kouichi Kato 1, Daisuke Matsushita 1
  6 Oxide formation by hexamethyl-disilazane with ozone: Analysis of photochemical reaction of precursors AIST 1,Meidensha Corporation 2 @Kameda Naoto 1,2,Nishiguchi Tetsuya 1,2,Nonaka Hidehiko 1, *Nakamura Ken 1, Ichimura Shingo 1@
    Break 10:45`11:00
’ 7 IRAS study of atomic layer deposition of SiO2 on Si by using tris(dimethylamino)silane (TDMAS) and ozone Yamagata Univ. 1, Hitachi Kokusai Electric 2, Shin-Etsu Chemical 3, Tohoku Univ. nanospin 4@*Yuta Kinoshita 1, Fumihiko Hirose 1, Hironobu Miya 2, Kazuhiro Hirahara 3, Yasuo Kimura 4, and Michio Niwano 4
  8 Observation of nanoscale-order structure of SiO2 film on poly-silicon grown at room temperature by UV light excited ozone. Meidensha Corporation 1, AIST 2@*Naoto Kameda 1, 2, Tetsuya Nishiguchi 1, 2, Yoshiki Morikawa 1, Mitsuru Kekura 1, Hidehiko Nonaka 2, Singo Ichimura 2
  9 Development of high-density radical source and application to the radical nitridation process Graduate School of Engineering, Nagoya Univ. 1, CCRAST, Nagoya Univ. 2, Katagiri Engineering Co.,Ltd. 3, NU-EcoEngineering Co.,Ltd. 4@Oda Shigehisa 1,*Kondo Hiroki 1,Hara Yasuhiro 1,Takashima Seigou 1,Sakai Akira 1,Ogawa Masaki 2,Zaima Shigeaki 1,Hori Masaru 1,Den Shouji 3,Kano Hiroyuki 4
’ 10 Effect of dilution rare gas on Si oxidation process in production level surface wave plasma equipment Nagoya Univ. 1, Tokyo Electron AT 2,@Takeda Keigo 1, Takashima Seigo 1, Shiozawa Toshihiko 2, Kabe Yoshiro 2, Kitagawa Junichi 2, Nakanishi Toshio 2, Hori Masaru 1
  11 Effect of Electric Charged Particles and Electrical Field on Plasma Oxidation Toshiba Corporate Manufacturing Engineering Center@Matsuba Hiroshi 1,Yamage Masashi 1,Konno Takuya 1,Yamauchi Takeshi 1
’ 12 Low-Leakage-Current Ultra-thin SiO2 Film Formation using Low-Temperature Neutral Beam Oxidation (2) Inst. Fluid Sci., Tohoku Univ. 1, Grad. School Eng., Tohoku Univ. 2, AIST 3, Osaka Univ. 4, Kyoto Univ. 5@*Ikoma Toru 1, Fukuda Seiichi 1, Miura Hideo 2, Endo Kazuhiko 3, Watanabe Heiji 4, Eriguchi Koji 5, Samukawa Seiji 1
    Lunch 12:30`13:30
29p-ZH-@/ II
’ 1 Improvement of Alumina with Heat Treatment in Ozone for Insulator of DRAM Capacitor Central Research Laboratory, Hitachi Ltd.@*Osamu Tonomura 1, Yuichi Matsui 1, Hirotaka Hamamura 1,Hiroshi Miki 1
  2 Fabrication of Al2O3 film by Sputtering method and Evaluation of Electrical Properties Inst. for Semiconductor Technology, ULVAC, Inc. 1@*Yutaka Nishioka 1, Shin Kikuchi 1, Isao Kimura 1, Takehito Jimbo 1, Kouko Suu 1
  3 A novel aluminum precursor for MOCVD TOSOH CORPORATION 1,SAGAMI CHEMICAL RESEARCH CENTER 2@Hirokazu Chiba 1,Taishi Furukawa 1,2,Ken-ichi Tada 2,Koichiro Inaba 1,2,Tetsu Yamakawa 2,Noriaki Oshima 1,2
  4 Effective Work Function in La2O3/Metal Gate Stack Structure Tokyo tech FCRC 1,IGSSE 2@* Adachi Manabu 1, Kakushima Kuniyuki 2, Parlhat Ahmet 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1
  5 Characterization of High-k Gate Dielectrics using Rare earth Composite Oxides Tokyo Tech. FCRC 1,IGSSE 2@*Kawanago Takamasa 1,Shiino Yasuhiro 1,Kakushima Kuniyuki 2,Parhat Ahmet 1,Tsutsui Kazuo 2,Sugii Nobuyuki 2,Hattori Takeo 1,Iwai Hiroshi 1
  6 Evaluation of Oxide Charges in W/La2O3/Si Structure Tokyo Tech. FCRC 1, Tokyo Tech. IGSSE 2@*Tachi Kiichi 1, Kakushima Kuniyuki 2, Parhat Ahmet 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1
’ 7 La concentration dependence of VFB in Au/HfLaOx/SiO2/Si capoacitors and discussion for its origin The University of Tokyo 1@Yamamot Yoshiki 1 ,Kita Koji 1 ,Kyuno kentaro 1 ,Toriumi Akira 1
  8 LaxY2-xO3(x=0.6-1.2) films as high-k gate dielectrics with good resistance to moisture and high permittivity Univ. of Tokyo@1@Zhao@Yi 1, Kita@Koji 1,Kyuno Kentaro@1,@Toriumi@Akira@1@
’ 9 Amorphous high-k LaTaOx films for alternative gate dielectrics Univ. of Tokyo. 1@Yi Zhao@1, Koji Kita@1, Kentaro Kyuno@1,@Akira Toriumi@1
’ 10 Effects of PDA on Chemical Structures of MOCVD-grown Pr-silicate and Pr-silicate/Si Interface QNERC & Dept. of Phys. Electronics, Tokyo Tech 1,Dept. of E&EE, Mi-Tech 2,Adv. Research Lab., Mi-Tech 3,RIKEN/SPring-8 4,JASRI/SPring-8 5@Furukawa Ryousuke 1,2,Tsuchiya Yoshishige 1,Suto Takaya 1,Matsuda Tooru 2,Nohira Hiroshi 2,Mizuta Hiroshi 1,Maruizumi Takuya 2,Shiraki Yasuhiro 3,Hattori Takeo 3,Ikenaga Eiji 4,Kobayashi Keisuke 5,Oda Syunri 1
    Break 16:00`16:15
  11 Annealing-Temperature Dependence of Chemical Structures of LaOx/ScOx/ Si Interfacial Transition Layer Musashi Inst. of Tech.1, Tokyo Inst. of Tech. IGSSE 2, Tokyo Inst. of Tech. FCRC 3, Musashi Inst. of Tech. ARL 4 @*Takenaga Yoshinori 1, Matsuda Toru 1, Nohira Hiroshi 1, Shiino Yasuhiro 2, Kakushima Kuniyuki 2, Parhat Ahmet 3, Tsutsui Kazuo 2, Iwai Hiroshi 3, Hattori Takeo 3,4
  12 Thermostability of La2O3/Sc2O3 stacked gate dielectric thin films(2) Tokyo Tech. FCRC 1,Tokyo Tech. IGSSE 2@*Yasuhiro Shiino 1,Kuniyuki Kakushima 2, Parhat Ahmet 1, Kazuo Tsutsui 2, Nobuyuki Sugii 2, Takeo Hattori 1,Hiroshi Iwai 1
  13 Thermal Stability of Lanthanum Oxynitride Thin Film Fablicated by in-situ Radical Nitridation Tokyo Tech. FCRC 1, IGSSE 2@*Sato Soshi 1, Tachi Kiichi 1, Kakushima Kuniyuki 2, Parhat Ahmet 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1
  14 Improvement of the electrical properties of La aluminates/Si (100) interface by insertion of one monolayer epitaxial SrSi2 Corporate R&D center,Toshiba, corp. 1@*A. Takashima 1, Y. Nishikawa 1, S. Schimizu 1, M. Suzuki 1, D. Matsushita 1, M. Yoshiki 1, M. Tomita 1, T. Yamaguchi 1, M. Koyama 1, N. Fukushima 1
  15 Annealing atmosphere dependence of effective work function of metal gates on LaAlO3 gate dielectrics. TOSHIBA R&D Center 1@*Suzuki Masamichi 1, Tsuchiya Yoshinori 1, Koyama Masato 1
  16 Electrical properties of lanthanum oxynitride films on silicon substrates Seikei Univ. 1@M.Ito, K.Shibuya, S.Kobayashi N.Kawada, Y.Saito
  17 Electrical characteristics of MIS structure with LaHfxOy/Si direct interface. Toshiba R&D Center.@Electrical characteristics of MIS structure with LaHfxOy/Si direct interface.
  18 Improvement of interfacial properties with interfacial layer growth in La2O3/Ge structure Tokyo Tech. FCRC 1,Tokyo Tech. IGSSE 2@*Song JaeYeol 1, Kakushima Kuniyuki 2, Ahmet Parhat 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1
  19 Syntheses of Highly Volatile Niobium and Tantalum Precursors for MOCVD SAGAMI CHEMICAL RESEARCH CENTER 1, TOSOH CORPORATION 2@Ken-ichi Tada 1, Taishi Furukawa 1,2, Koichiro Inaba 1,2, Hirokazu Chiba 2, Tetsu Yamakawa 1, Noriaki Oshima 1,2
11.3 Gate Insulator Technology
March 30 9:00`15:00
30a-ZH-@/ II
  1 Difference of electrical properties between GeO2/Ge and GeO2/SiO2/Si caused by the difference of interfacial reactivity. The Univ. of Tokyo 1@*Hideyuki Nomura 1, Tomonori Nishimura 1, Koji Kita 1, Akira Toriumi 1
  2 Suppression of degradation in GeO2/Ge structure caused by GeO desorption univ. of Tokyo@*Sho Suzuki 1,Tomonori Nishimura 1,Koji Kita 1,Akira Toriumi 1
’ 3 Difference of interface layer desorption passway between Y2O3/Ge and HfO2/Ge and influence on interface properties. The Univ. of Tokyo 1@*Hideyuki Nomura 1, Tomonori Nishimura 1, Koji Kita 1, Akira Toriumi 1
  4 Demonstration of MIS characteristics measured from high-k (LaxY1-x)2O3/Ge structure The Unic. of Tokyo 1@*Toshitake Takahashi 1, Yi Zhao 1, Hideyuki Nomura 1, Tomonori Nishimura 1, Koji Kita 1, Akira Toriumi 1
  5 Equivalent Circuits and Analyses of Ge MIS Capacitors Tokyo Univ. of Science, Suwa 1, Hirosaki Univ. 2@*Yukio Fukuda 1, Yohei Otani 1, Yasuhiro Itayama 1, Takuo Tanaka 1, Toshiro Ono 2
  6 Spectroscopic Measurements of Interface Trap Densities at Ge MIS Interfaces Tokyo Univ.of Science, Suwa 1, Hirosaki Univ. 2@*Otani Yohei 1, Itayama Yasuhiro 1, Tanaka Takuo 1, Fukuda Yukio 1, Ono Toshiro 2
’ 7 Stability of Ge3N4 thin layers formed by plasma nitridation Osaka Univ. 1@*Kutsuki Katsuhiro 1,Okamoto Gaku 1,Shimura Takayoshi 1,Yasutake Kiyoshi 1,Watanabe Heiji 1
    Break 10:30`10:45
  8 Characteristics of HfO2/Ge-nitride/Ge MIS structures AIST1, U. Tokyo2@*Tatsuro Maeda1, Yukinori Morita1, Masayasu Nishizawa1, and Shinichi Takagi1, 2
’ 9 Characteristics of SiO2/Ge MIS capacitors by plasma oxidation of ultrathin Si films on Ge Univ. of Tokyo 1, Tokyo Inst. of Tech 2, Teikyo Univ. of Science and Technology 3@Kumagai Hiroshi 1, Shichijo Masato 1, Matsubara Hiroshi 1, Sugahara Satoshi 2, Uchida Yasutaka 3, Takagi Shinichi 1
  10 Electrical Properties of Ge oxide/Ge MOS structures fabricated by Ozone and Thermal Oxidation Tokyo Univ. Kougakukei 1,Tokyo Univ. Shinryouikisouseikagaku 2,Toukou Univ. Rikou 3@* Nishikawa Masashi 1,Kumagai Hiroshi 2,Sugahara Satoru 3,Takagi Shinichi 1,2
’ 11 Properties of SiO2/Ge MIS interface states analized by low temperature conductance method The Univ of Tokyo 1, Tokyo Inst of Technology 2,@ Matsubara Hiroshi 1, Kumagai Hiroshi 1, Sugahara Satoru 2, Takagi Shinichi 1
    Lunch 12:00`13:00
30p-ZH-@/ II
  1 Defect control in High-k gate dielectrics - on the germanium-induced defects in HfO2 : comparison with silicon-induced defects - Toshiba Corp. R&D Center 1@*Nakasaki Yasushi 1, Kamata Yoshiki 1, Kato Koichi 1, Koyama Masato 1
  2 Effect of H2O2 Incorporation into Halogen Acid Pretreatment on High-ƒΘ/Ge MOS device characteristics Toshiba@*Yoshiki Kamata 1, Tsunehiro Ino 1, Masato Koyama 1, Nishiyama Akira 1
  3 Improvement of interface characteristics of SiO2/GaN MOS capacitors Furukawa Electric, Yokohama R&D 1@*Niiyama Yuki 1, Ootomo Shinya 1, Kambayashi Hiroshi 1, Nomura Takehiko 1, Yoshida Seikoh 1
  4 Caracteristics of Ge-MIS Structres Using Hot-Wire CVD SiN MIRAI-ASET 1, MIRAI-ASET 2, Univ. of Tokyo 3@*Yamashita Yoshimi 1, Taoka Noriyuki 2, Harada Masaomi 1, Yamamoto Toyoji 1, Sugiyama Naoharu 1, Takagi Shinichi 2,3
  5 Fabrication of pure Germanium Nitride film on Ge by Atmospheric Pressure Plasma Osaka Pref.Univ.1 Sekisui Chemical Co.2@*Abe Takuya 1.Yoshida Masashi 1.Yoshimura Takeshi 1.Kunugi Shunsuke 2.Uehara Tuyoshi 2.Fujimura Norifumi 1.
  6 Formation of GeNx Layers by ECR Plasma Irradiation and Their Analysis by XPS Tokyo Univ. of Science, Suwa 1, Yamanashi Univ. 2, Hirosaki Univ. 3@*Itayama Yasuhiro 1, Tanaka Takuo 1, Otani Yohei 1, Fukuda Yukio 1, Sato Tetsuya 2, Nakagawa Kiyokazu 2, Toyota Hiroshi 3, Ono Toshiro 3
  7 Evaluation of Thermal Stability of HfO2/SiONx/Ge(100) Stacked Structures. Hiroshima Univ.@*Hiroshi Nakagawa, Akio Ohta, Hideki Murakami, Seiichiro Higashi, Seiichi Miyazaki
  8 Monitoring Techniques for Controlling High-k/III-V Interfaces: Applicability of Reflectance Difference Spectroscopy (RDS) AIST 1, NIMS 2@*Tetsuji Yasuda 1, Noriyuki Miyata 1, Akihiro Ohtake 2
11.3 Gate Insulator Technology
March 30 9:30`12:15
30a-ZK-@/ II
  1 Improvement of PECVD TEOS gate oxide with D.C. bias on the substrate Imaging Science and Engineering Lab.@*Cheolhyun Lim, Hiroaki Iino and Junichi Hanna
  2 Development of SiO2 Insulator Thin Film by Low Temperature Printing Process Nat. Inst. Adv. Indust. Sci. Tech@*kodzasa Takehito 1, Uemura Sei 1, Suemori Kouji 1, Yoshida Manabu 1, Hoshino Satoshi 1, Kamata Toshihide 1
  3 Verification of reaction mechanism of Si oxide formation using silicone oil and ozone gas by measuring the source material supply and the CO2 generation rates Jpn. Adv. Inst. of Sci. & Tech. (JAIST)@*K. Toriyabe 1, S. Ohno 1, K. Nishioka 1 and S. Horita 1
  4 Oxidations of Si surface by irradiation of high pressure water and their MOS characteristics Toshiba Corporation, Corporate Manufacturing Engineering Center1@*H.Katsumata1, M.Saito1, H.Fujita1, E.Nishimura1, J.Tonotani1, and T.Shinmura1
  5 Dissolution and diffusion of interstitial N2 molecules in amorphous SiO2 JST 1, AGC Electronics Co. Ltd. 2, Univ. Latvia 3, TITech 4@*Koichi Kajihara 1, Yasuyuki Takimoto 2, Masahiro Hirano 1, Linards Skuja 1 3, Hideo Hosono 1 4
    Break 10:45`11:00
  6 Dipole moment of an H2O molecule during the penetration into SiO2, Si2N2O, Si3N4, SiC films Mitsubishi Electric Corp. High Frequency & Optical Semiconductor Works.@*Oku Tomoki 1, Totsuka Masahiro 1, Ishikawa Takahide 1
  7 Open volumes in strained SiN deposited on Si substrates probed by monoenergetic positron beam Tsukuba Univ. 1, Runesas 2, AIST 3 @*K. Ito 1, T. Otsuka 1, A. Uedono 1, Y. Miyagawa 2, T. Murata 2, N. Hattori 2, M. Matsuura 2, T. Asai 2, T. Ohdaira 3, R. Suzuki 3
  8 Depth Profiling of Chemical Composition and Defect State Density of SiNx Formed by Plasma CVD Hiroshima Univ. 1,TEL 2@*Miura Masashi 1,Ohta Akio 1,Murakami Hideki 1,Higashi Seiitirou 1,Miyazaki Seiiti 1,Kohno Masayuki 2,Nishida Tatuo 2 and Nakanishi Toshio 2
  9 Comparison of LPCVD- and PECVD-SiN films formed of SiH4/NH3 gas (1) ESR study Kagawa Univ. 1@*Toki Atsushi 1, Shinohara Noriaki 1, Kamigaki Yoshiaki 1
  10 Comparison of LPCVD- and PECVD-SiN films formed of SiH4/NH3 gas (2) PL study Kagawa Univ. 1@*Shinohara Noriaki 1, Toki Atsushi 1, Kamigaki Yoshiaki 1
11.4 Review Lectures and General Session:uLSI‘½‘w”zό‚ΙŠΦ‚·‚ιƒvƒƒZƒXEM—А«ƒƒJƒjƒYƒ€‚ƍŐζ’[‹Zpv
March 28 10:00`16:15
28a-ZL-@/ II
  1 Introductory Talk NEC 1CToshiba 2@* Yoshihiro Hayashi 1CMasahiko Hasunuma 2
  2 32nm-node Cu Interconnects technology using density-modulated Low-k film NEC 1, NEC Electronics 2@*Tada Munehiro 1, Yamamoto Hironori 1, Ito Fuminori 1, Narihiro Mitsuru 1, Ueki Makoto 1, Inoue Naoya 1, Abe Mari 1, Saito Shinobu 1, Takeuchi Tsuneo 1, Furutake Naoya 1, Onodera Takahiro 1, Kawahara Jun 1, Kasama Yoshiko 2, Taiji Toshiji 2, Tohara Makoto 2, Sekine Makoto 2, Hayashi Yoshihiro 1
  3 45nm-node Cu/ULK integration focusing on the low-k damage Sony 1@*Kagawa Yoshihisa 1
  4 State-of-the-art Optical Interconnect Technologies MIRAI-Selete 1, NEC 2@Ohashi Keishi 1,2
  5 Improvement mechanism of oxidation resistance with Titanium barrier metal. Toshiba Corp. Semiconductor Comp. Process & Manufacturing Engineering Center@Sakata Atsusko 1,*Hasunuma Masahiko 1
    Lunch 12:10`13:10
28p-ZL-@/ II
  1 Copper Plating Technology for LSI damascene wiring process Hitachi Res. Lab., Hitachi,Ltd@Akahoshi Haruo 1
  2 Pore analysis of Cu/low-k interconnect materials by using a positron beam RIIF AIST 1@*Ohdaira Toshiyuki 1, Suzuki Ryoichi 1
    Break 14:10`14:25
  3 Mechanism of Stress-Induced Voiding (SIV) phenomena in Copper Interconnects Fujitsu Labs. 1, Fujitsu Ltd. 2@*Tomoji Nakamura1, Takashi Suzuki1, Takahiro Kouno2, Hideya Matuyama2
  4 High Performance Cu Dual Damascene Interconnects with Ultra Low-k Porous-SiOC and Selective Barrier Layer CuSiN for 32 nm-node Semiconductor Company, Toshiba Corp. @Yumi Hayashi, Kazumichi Tsumura, Miyoko Shimada, Kei Watanabe, Hideshi Miyajima, Takamasa Usui, Hideshi Shibata
  5 TDDB reliability: Copper-ion drift mechanism in interlayer dielectrics CRL, Hitachi@Kenichi Takeda 1
  6 Transistor Characteristic Evaluation Technology for Assembly Stress and Assembly Stress Relaxation Design Matsushita Electric Industrial Co., Ltd.@*Koji Takemura 1,Hikari Sano 1,Koji Koike 1,Kazuhiro Ishikawa 1,Yutaka Itoh 1,Hiroshige Hirano 1
11.4 Interconnect Technology
March 29
29a-P5-@/ II
   
Poster Session
29a-P5-1`22 9:30`11:30
  1 Enhancement of zeolite crystallinity by vapor-phase treatment of a spin-on-deposited low-k film from a hydro-thermally synthesized precursor solution ASRC-AIST 1@*Takenobu Yoshino 1, Nobuyoshi Ohnuki 1, Nobuhiro Hata 1
’ 2 Effects of zeolite crystallization on porous silica by a vapor phase transport method Hiroshima Univ. 1, Mitsui Chemicals Inc. 2@*Yoshinori Cho 1, Kazuo Kohmura 2, Takamaro Kikkawa 1
’ 3 Effect of Silylation Treatment in Electrical Characteristics of Porous Zeolite Film Hiroshima Univ. 1, ASRC-AIST 2@Seo Toshiki 1, Yoshino Takenobu 2, Seino Yutaka 2, Hata Nobuhiro 2, Kikkawa Takamaro 1
’ 4 Water Adsorption Property of the Porous Silica Film Hiroshima Univ. 1, Mitsui Chemicals 2@*Abe Satoshi 1, Kayaba Yasuhisa 1, Kohmura Kazuo 2, Kikkawa Takamaro 1
  5 Progen concentration dependence on low-k porous silica films with C,2H4 groups. Teikyo Univ. of Sci. & Tech. 1, AIST 2 @Yoshiyuki Maruyama 1, Toshiyuki Ohdaira 2, Ryouichi Suzuki 2, Yasutaka Uchida 1
  6 Characterization of mesoporous silaca for low-k membrane using hyperpolarized 129Xe NMR Photonics RI AIST 1, Advanced Semiconductor RC AIST 2@*Hattori Mineyuki 1,Hayamizu Kikuko 1,Hiraga Takashi 1,Yamamoto Noritaka 1,Takada Shouzou 2,Hata Nobuhiro 2
  7 ESR study of Porous Low-k SiOCH Materials Kagawa Univ. 1, Semiconductor Leading Edge Technologies, Inc. 2@*Hirata Satoshi 1, Kamigaki Yoshiaki 1, Nakao Shinichi 2, Yoneda Katsumi 2, Kinoshita Keizo 2, Ogawa Shinichi 2
  8 Measurement of thermal conductivity for low-k materials using a nanosecond thermoreflectance system AISTFCAN-FOR1, ASRC2@ @Masashi Kuwahara1, Osamu Suzuki1, Nobuhiro Hata2, Syozo Takada2, Toshio Fukaya1, Junji Tominaga1
  9 Laser SAW propagating along Si [110] and [100] directions for determining mechanical properties of low-k films ASRC-AIST 1@Takimura Toshinori 1, Takada Syozo 1, Hata Nobuhiro 1
  10 Dielectric and mechanical properties of porous organosilica low-k films ASRC-AIST 1@*Takada Syozo 1, Hata Nobuhiro 1, Takimura Toshinori 1, Yoshino Takenobu 1
  11 Structure Studies of UV Cured SiOC films Toray Research Center, Inc.@*Miyoshi Riko 1,Matsuda Keiko 1,Seki Hirofumi 1,Takahashi Kazumi 1,Hashimoto Hideki 1,Yoshikawa Masanobu 1
  12 Property Control of Molecular Pore Stacked (MPS) SiOCH Films Using Plasma Co-polymerization NEC Corporation 1@*Yamamoto Hironori 1, Ito Fuminori 1, Tada Munehiro 1, Takeuchi Tsuneo 1, Furutake Naoya 1, Hayashi Yoshihiro 1
  13 Cu/Low-k interconnect with spin-on barrier-dielectric/CMP-cap CASMAT 1, Sumitomo Bakelite 2, JSR 3@Shin-ya Arase 1, *Nobuhide Maeda 1, Yoshio Takimoto 1, Hiroshi Kawakami 1, Kouji Sumiya 3, Yoshio Homma 1, Hidenori Saito 2, Masahiro Tada 2, Terukazu Kokubo 3
  14 Control of Damage to Low-k Dielectrics in Sputtering Process for Barrier Metals System Devices Research Laboratories, NEC Corporation@Naoya Inoue 1, *Naoya Furutake 1, Yoshihiro Hayashi 1
  15 Effect of electron beam and UV cure on Cu barrier dielectric film. SONY Corp. 1@*Hashimoto Yukinobu 1,Nishizawa kenichi 1,Matsugai Hiroyasu 1,Tabuchi Kiyotaka 1,Kanamura Ryuichi 1
’ 16 Integration of High-k MIM Capacitors into Copper Dual Damascene Interconnect System Devices Research Laboratories, NEC 1, NEC Electronics 2@*Ippei Kume1, Naoya Inoue1, Shinobu Saito1, Naoya furutake1, Takeshi Toda2, Masayuki Furumiya2, Yoshihiro Hayashi1
’ 17 Radical-assisted chemical vapor deposition of vertically aligned carbon nanotubes at low temperatures from via structres for interconnects Waseda Univ. 1,MIRAI-Selete 2@*Daisuke Yokoyama 1,Takayuki Iwasaki 1,Tsuyoshi Yoshida 1,Shintaro Sato 2,Mizuhisa Nihei 2,Yuji Awano 2,Hiroshi Kawarada 1
  18 Growth of Carbon Nanotubes by Remote Plasma CVD for LSI Via Interconnects MIRAI-Selete@*Sakuma Naoshi, Katagiri Masayuki, Sakai Tadashi, Suzuki Mariko, Sato Shintaro, Nihei Mizuhisa, Hyakushima Takashi, Awano Yuji
  19 Direct CMP of Porous Low-k Films Semiconductor Leading Edge Technologies, inc.@Shiohara Morio 1,Maruyama Koji 1,Yamada Koji 1,*Kondo Seiich 1
  20 The property of Copper dissolution with Ammonium PerSulfate Fujitsu Labs. LTD. 1, Fujitsu LTD. 2@Tsuyoshi Kanki 1, Tetsuya Shirasu 2, Takahiro Kimura 1, Tomoji Nakamura 1, Motosyu Miyajima 2
’ 21 Effect of polish stopper film in STI-CMP for 45nm node devices and beyond Fujitsu Limited 1, Fujitsu Laboratories LTD. 2@*Watanabe Takashi 1, Shibata Seiichi 2, Idani Naoki 1, Kase Masataka 1, Miyajima Motosyu 1
£ 22 Decrease defects after poly Si CMP with oxide slurry SAMSUNG ELECTRONICS 1. HANYANG UNIV. 2.@Han Sang Yeob 1. Yun Seong Kyu 1. Lee Jae Dong 1. Hong Yi Koan 2. Park Jin Goo 2. Yoon Bo Un 1. Hong Chang Ki 1. Cho Han Ku 1. Moon Joo Tae 1.
11.4 Interconnect Technology
March 30
30a-P9-@/ II
   
Poster Session
30a-P9-1`19 9:30`11:30
  1 Prevention of Release-related Sticking in MEMS Devices by Electrodeposition of Water-repellent Film NTT Microsystem Integration Labs. 1, NTT Advanced Technology Corp. 2@*Sakata Tomomi 1, Kuwabara Kei 1, Sato Norio 1, Shimamura Toshishige 1, Ishii Hiromu 1, Kudou Kazuhisa 2, Machida Katsuyuki 2
  2 Study of thick multilevel interconnects by Au electroplating technique (3) NTT MI Labs.1, NTT Advanced Technology 2@Kazuyoshi Ono 1, Nobuhiro Shimoyama 1, Norio Sato 1, Hiroki Morimura 1, Junichi Kodate 1, Kazuhisa Kudou 2, Toshikazu Kamei 2, Hiromu Ishii 1, Katsuhisa Machida 2
  3 Stress migration phenonema in narrow copper lines Fujitsu Laboratories LTD. 1, Fujitsu LTD. 2@*Suzuki Takashi 1, Kouno Takahiro 2, Shiozu Motoki 2, Otsuka Satoshi 2, Hosoda Tsutomu 2, Nakamura Tomoji 1, Mizushima Yoriko 1, Matsuyama Hideya 2, Shono Ken 2
  4 Resistivity reduction of a Cu-Mn alloy layer in self-forming barrier process JST 1, Tohoku Univ. 2@Jun Iijima 1, Junichi Koike 2
  5 Factors affect on the electrical resisitivity in narrowed and thinned Cu interconnects Center for Semiconductor R&D , Toshiba Corporation@M. Wada 1, K. Higashi 1, A. Kajita 1, and H. Shibata 1
  6 Characteristics of Cu provided for ULSI Application under GPa Stresses The Univ. of Tokyo@*Tomohira Tabata 1, Hirotada Gotou 1, Takehiko Yagi 1, Takayuki Ohba 1
  7 Detection of vacancies in electroplated Cu and PVD-Cu using monoenergetic positron beams Univ. of Tsukuba 1, Tohisba 2, AIST 3@*A. Uedono 1, K. Ito 1, K. Imamizu 2, T. Hachiya 2, H. Kamijo 2, M. Hasunuma 2, H. Kaneko 2, H. Toyoda 2, T. Ohdaira 3, R. Suzuki 3
  8 Development of a PALS system for industrial use and its application to pore analysis of LSI interconnect materials RIIF AIST 1, FUJI IMVAC 2@*Ohdaira Toshiyuki 1, Suzuki Ryoichi 1, Kobayashi Yoichi 2, Takanawa Masao 2
  9 Substrate temperature dependence of copper-filling in the H2O introdaction atomsphere Tokyo University of Science@*Jan Fonin, Nakano Hirofumi, Uhara Yoshio, Imamura Mutsumi, Hatakeyama Yoshinari, Kogushi Yoshiki, Saito Shigeru
  10 Effect of H2 on Cu film growth by SCFDiSupercritical Fluid Depositionj The Univ. of Tokyo 1@*Takeshi Momose 1, Masakazu Sugiyama 1, Yukihiro Shimogaki 1
  11 Formation of copper oxide thin films using supercritical fluid deposition Univ. of Tokyo 1, Univ. of Tokyo 2 @*Ohkubo Tomohiro 1, Uejima Takeshi 2, Sugiyama Masakazu 1, Shimogaki Yukihiro 1
  12 The kinetics of Cu2O - CVD process for ULSI - Cu interconnects The Univ. of Tokyo 1, Harvard Univ. 2@Yoshio Susa 1, Hoon Kim 1, Yukihiro Shimogaki 1
  13 gTopography-sensitiveh selective deposition using supercritical CO2 fluid chemical deposition Univ. Yamanashi@*E. Kondoh 1 , M. Hirose 1, E. Ukai 1, S. Aruga 2, and K. Nagano 2
  14 Study of ZrB2-ALD Technology using Zr(BH4)4 ULVAC,Inc.@Tsumagari Kanako 1, Hatanaka Masanobu 1, Ishikawa Michio 1, Udagawa Takashi 2, Kada Takeshi 2, Ishikawa Masato 2, Machida Hideaki 2
  15 Thermal stability of ZrN barrier formed by radical nitriding assisted by hot-wire method Kitami Inst.of Technol. 1@*Masaru Sato 1, Mayumi B. Takeyama 1, Atsushi Noya 1
  16 Preparation and barrier properties of ZrB2 thin film deposited at low temperature for Cu interconnects Kitami Inst.of Technol. 1, ULVAC Materials, Inc. 2, ULVAC, Inc. 3@* Mayumi B. Takeyama 1, Yasuo Nakadai 2, Shozo Kambara 2, Masanobu Hatanaka 3, Atsushi Noya 1
  17 Suppression of agglomeration of Ag thin films by introducing very thin Al layers Kitami Inst. of Tech.@*Inami Yuki, Kawamura Midori, Abe Yoshio, Sasaki Katsutaka
  18 Thickness uniformity of electroless Ni plating on I/O pads connected to pn junctions for under bump metallurgy. Kyushu Univ. ISEE 1, Yoshitama Surface Finishing Co.ltd. 2@*Ikeda Akihiro 1, Saeki Tsubasa 1, Sakamoto Atsushi 1, Sugimoto Yosuke 1, Kimiya Yasuhiro 2, Fukunaga Yoshiaki 2, Kuroki Yukinori 1
£ 19 A study of equipment's input parameters effecting to W volcano defect Technology 2 group (K1), sysem LSI Division, Samsung electronics@Jun Yoon*, insoo Cho, Illhwan Jeoun, Jinsung Chung
11.5 Si Process Technology
March 28 9:30`18:45
28a-SM-@/ II
  1 Improved Epitaxial Lateral Overgrowth for SOI fabrication HITACHI CRL@*Yoshinobu Kimura, Ryuta Tsuchiya, Yusuke Morita, Shin'ichiro Kimura
  2 Formation of SonoBa-SOI-MOSFET by SBSI (Separation by Bonding Silicon Islands) Technology Seiko Epson Corp. 1, Tokyo Tech. 2@Yusuke Matsuzawa 1, Toshiki Hara 1, Kei Kanemoto 1, Hirokazu Hisamatsu 1, Yoji Kitano 1, Hideaki Oka 1, Juri Kato 1, Masaki Hoshina 1, Shun-ichiro Ohmi 2
  3 Mechanism of Selective Etching of SiGe Layers in SiGe/Si Systems SEIKO EPSON Corp. 1, Tokyo Tech. 2@*Juri Kato 1, Hideaki Oka 1, Kei Kanemoto 1, Hirokazu Hisamatsu 1, Yusuke Matsuzawa 1, Yoji Kitano 1, Toshiki Hara 1, Masaki Hoshina 1, Shun-ichiro Ohmi 2
  4 Influence to MOS devices by Ge adsorbed on Si surface and Ge removal by wet cleaning SEIKO EPSON Corp. 1, Tokyo Tech. 2@Kei Kanemoto 1, Yusuke Matsuzawa 1, Toshiki Hara 1, Hirokazu Hisamatsu 1, Yoji Kitano 1, Hideaki Oka 1, Juri Kato 1, Masaki Hoshina 1, Shun-ichiro Ohmi 2
  5 A Study on Improvement of Uniformity for Double SOI/BOX Stacked-Layer Formation by SBSI Process Tokyo Tech 1, SEIKO EPSON Corp 2@*K. Notake 1, K. Yahashi 1, K. Kanemoto 2, J. Kato 2, S. Ohmi 1
  6 Improvement of uniformity for PtSi formed on heavily-doped SOI wafers Tokyo Institute of Technology 1@*S. Koh 1, K. Notake 1, Y. Nakano 1, and S. Ohmi 1
    Break 11:00`11:15
  7 Grazing incidence x-ray diffraction from strained SOI and SOI wafers NTT Basic Research Labs. 1, Hyougo univ. 2, CAST 3@*Omi Hiroo 1, Kawamura Tomoaki 1, Kobayashi Yoshihiro 1, Fujikawa Seiji 2, Tsusaka Yoshiyuki 2, Kagoshima Yasushi 2, Matsui Junji 3
  8 Formation of strained SiGe-on-insulator layers from SiGe layers on strained SOI substrates using Ge-condensation technique MIRAI-ASET 1,MIRAI-AIST 2,The University of Tokyo 3@*Tsutomu Tezuka 1,Norio Hirashita 1,Yoshihiko Moriyama 1,Shu Nakaharai 1,Naoharu Sugiyama 1,Shin-ichi Takagi 2,3
  9 Oxidation conditions for high-purity GOI layer formation by Ge-condensation technique MIRAI-ASET 1, Toshiba Ceramics 2, MIRAI-AIST 3, Univ. of Tokyo 4 @*Nakaharai Shu 1, Tezuka Tsutomu 1, Hirashita Norio 1, Toyoda Eiji 2, Moriyama Yoshihiko 1, Sugiyama Naoharu 1, Takagi Shin-ichi 3,4
  10 The Pressure Dependence Evaluation of In-situ P Doped Si Selective Epitaxial Growth Sony Corp. 1@*Ikuta Tetsuya 1,Miyanami Yuki 1,Fujita Shigeru 1,Iwamoto Hayato 1
  11 SiŠξ”γ‚Ι’ΌΪ¬’·‚³‚Ή‚½Ge”––Œ‚Μƒ‰ƒ}ƒ“•ͺŒυ Qunatum Beam Center, NIMS 1, Dept. of Mat. Eng., Univ. of Tokyo 2 @*Kenichiro KONO 1, Yasumasa ISHIKAWA 2, Kazumi WADA 2, Naoki KISHIMOTO 1
    Lunch 12:30`13:30
28p-SM-@/ II
  1 Selective growth of InP on Si(100) substrate Osaka Univ. ISIR 1@Araki Keisuke 1, Ozasa Motoki 1, Fujiwara Atsushi 1, *Hasegawa Shigehiko 1, Asahi Hajime 1
£ 2 A study of void formation during selective epitaxial growth by selective loss Advanced Process Integration Group, Semiconductor RND Center, Samsung Electronics San 24 Nongseo-Ri, Kiheung-Eup, Yongin-City, Kyungki-Do, Korea@*J. K. Lim, C. H. Lee, K. S. Lee, S. J. Park, J. J. Han, Y. W. Hyung, S. K. Kang, H. Kim, K. H. Nam, S. M, Park, Y. S. Jo, D. H . Kim, J. S. Jeon, J. L. Nam, H. D. Lee, J. T. Moon
’ 3 Improvement of NiSi Thermal Stability by Post Silicidation Metal Doping Method using Al layer Tokyo Tech. FCRC 1, Tokyo Tech. IGSSE 2@*Koji Nagahiro 1, Takashi Shiozawa 1, Parhat Ahmet 1, Kuniyuki Kakushima 2, Kazuo Tsutsui 2, Hiroshi Iwai 1
  4 Improvement of Thermal Stability of Ni silicide on N+-Si by using an Al interlayer Tokyo Tech.FCRC 1,Tokyo Tech.IGSSE 2@*Shiozawa Takashi 1,Nagahiro Koji 1,Ahmet Parhat 1,Kakushima Kuniyuki 2,Tsutsui Kazuo 2,Iwai Hiroshi 1
  5 Depth Profile Analysis of Nickel Silicide Films Using Time-of-Flight Secondary Ion Mass Spectrometry Tokai Univ. 1, Renesas Tech. 2@Kuwabara Hiroaki 1, Aoyagi Hitoshi 1, Maekawa Kazuyoshi 2, Kashihara Keiichiro 2, Yamaguchi Tadashi 2, Asai Koyu 2, Honda Kazuhito 2, Hirose Yukinori 2, *Kobayashi Kiyoteru 1
  6 Ni Silicide Schottky Barrier Height Measurement on Annealing Condition Tokyo Tech.FCRC 1,Tokyo Tech.IGSSE 2@*=Ohishi Yoshihisa 1,Kakushima Kuniyuki 2,Parhat Ahmet 1,Tutui Kazuo 2,Sugii Nobuyuki 2,Hattori Takeo 1,Iwai Hiroshi 1
  7 Effect of Thin Film Interference on Ultra-shallow Junction Formation in Ultra Thin Body SOI during Sub-millisecond Annealing Central Research Lab., Hitachi Ltd.@*A.Shima, T.Mine, R.Tsuchiya, K.Torii
  8 Analytical model for amorphous layer thickness formed by ion implantaton Fujitsu Lab. 1, Fujitsu 2, Nano Science 3, Evans 4, Nissin Ion 5@*K. Suzuki 1, Y. Tada 1, Y. Kataoka 1, K. Kawamura 2, S. Nagayama 3, C. Magee 4,T. Bueyuekmanli 4, T. Nagayama 5
  9 Acceleration voltage dependence of substrate silicon atomic mixing during arsenic ion-implantation Keio Univ. 1, Musashi Inst. Tech. 2, NTT-AT 3@*Yasuo Shimizu 1, Kohei M. Itoh 1, Toshiko Okui 2, Yasuhiro Shiraki 2, Akio Takano 3
    Break 15:45`16:00
  10 Ion-implantation Technology to Deep Trench Sidewall(3) Fuji Electric AT Co., Ltd. 1@*Takahashi Kouta 1, Yajima Ayako 1, Fujikake Shinji 1, Nakazawa Haruo 1
  11 Ge n+/p Junction Formation with Xe+ Preamorphization Implantation Research Center for Nanodevices and Systems, Hiroshima Univ. 1, Grad. School of ADSM, Hiroshima Univ. 2@*Tetuya Fukunaga 1,2, Takuji Hosoi 1, Kentaro Shibahara 1,2
  12 Evaluation of ultra shallow Ga and As Profiles by using SIMS Fujitsu Laboratories Ltd. 1@*Tada Yoko 1
  13 Non-destructive characterization of crystal quality in annealed ultra-shallow ion implanted silicon wafers Kyoto Inst. Tech. 1, WaferMasters 2@*M. Yoshimoto 1, H. Nishigaki 1, H. Harima 1, T. Isshiki 1, K. Kang 2 and W. Yoo 2
  14 In-situ Observation of Phase Transformation of a-Ge Films Induced by Semiconductor Diode Laser Irradiation Hiroshima Univ.@Sakaike Kohei, Higashi Seiichiro, Okada Tatsuya, Murakami Hideki, Miyazaki Seiichi
  15 Photoluminescent Properties of SiOx Films Treated by Thermal Plasma Jet Induced Ultrarapid Thermal Annealing Hiroshima Univ.@*Okada Tatsuya 1, Higashi Seiichiro 1, Kaku Hirotaka 1, Yorimoto Takuya 1, Murakami Hideki 1, Miyazaki Seiichi 1
  16 Study on bonding properties in direct Si-wafer bonding Toshiba Ceramics Co., Ltd. 1, Graduate School of Eng., Nagoya Univ. 2, ESI, Nagoya Univ. 3, CCRAST, Nagoya Univ. 4@*Eiji Toyoda 1,2, Hiromichi Isogai 1, Takeshi Senda 1, Koji Izunome 1, Osamu Nakatsuka 3, Akira Sakai 2, Masaki Ogawa 4, Shigeaki Zaima 1
  17 Effect of deposition temperature on Ni-imprint-induced crystallization of a-Ge films Kyushu Univ.1@*Toko Kaoru 1, Kenjo Atsushi 1, Sadoh Taizoh 1
  18 Effects of atmosphere on the growth of metal induced lateral crystallization. Univ. of Yamanashi 1, Musashi Inst. of Tech. 2, Nagoya Inst. of Tech. 3@*Tadashi Horie 1, Minoru Mitsui 1, Keisuke Arimoto 1, Junji Yamanaka 1, Kiyokazu Nakagawa 1, Kentarou Sawano 2, Yasuhiro Shiraki 2, Tomokazu Moritani 3, Minoru Doi 3
’ 19 Growth of the Silicon Nano-wires Using Hydrogen Radicals (1): Effect of the growth temperatures Tokyo Univ. of Agri. & Tech. 1@*Jeon Minsung 1, Kamisako Koichi 1
  20 Growth of the Silicon Nano-wires Using Hydrogen Radicals (2): Effect of the catalysts Tokyo Univ. of Agri. & Tech. 1@*Jeon Minsung 1, Kamisako Koichi 1
11.5 Si Process Technology
March 29 9:00`18:45
29a-SM-@/ II
’ 1 Study of diffusion process of molecular oxygen in@silicon dioxide film with molecular dynamics simulation II Waseda Univ. 1,Waseda Nano Inst. 2,PRESTO-JST 3@*Ohta Hiromichi 1, Watanabe Takanobu 1 2 3,Ohdomari Iwao 1 2
  2 Super Acceleration of Quantum Chemical Molecular Dynamics Method for Prediction of Leakage Current on Semiconductors using Large-Scale Model Grad. Sch. Eng., Tohoku Univ. 1, JST-PRESTO 2, NICHe, Tohoku Univ. 3@*Endou Akira 1, Onuma Hiroaki 1, Tsuboi Hideyuki 1, Koyama Michihisa 1, Hatakeyama Nozomu 1, Takaba Hiromitsu 1, Kubo Momoji 1,2, Carlos A. Del Carpio 1, Miyamoto Akira 1,3
  3 Microstructures and the crystallization mechanism for Ni-induced lateral crystallized Si0.6Ge0.4 thin films Kyushu Univ 1,Kyushu Univ 2,Kyushu Univ 3@*Itakura Masaru 1,Masumori Shunji 1,Kuwano Noriyuki 2,Kanno Hiroshi 3,Sadoh Taizoh 3,Miyao Masanobu 3
  4 Analyses of Ni-metal induced lateral crystallization mechanism in Ge thin film Kyushu Univ 1,Kyushu Univ 2,Kyushu Univ 3@*Itakura Masaru 1,Masumori Shunji 1,Kuwano Noriyuki 2,Kanno Hiroshi 3,Sadoh Taizoh 3,Miyao Masanobu 3
  5 Improvement of thermal stability of NiGe layers on Ge(001) substrates by incorporation of Pt Graduate School of Eng. 1, ESI 2, CCRAST 3, Nagoya Univ.@Atsushi Suzuki 1, *Osamu Nakatsuka 2, Akira Sakai 1, Masaki Ogawa 3, Shigeaki Zaima 1
    Break 10:15`10:30
  6 Proposal of amorphous metal alloy gate with work function tuning for hp 32nm-22nm generation ULSI AEMC NIMS 1,Tokyo Tech Frontier 2, Tokyo Tech P&I Lab. 3, Tokyo Tech, MSL. 4, Osaka Univ. 5, Waseda Nanotech 6@Chikyow toyohiro 1, Sakurai Jyunpei 3 , Hata Seiichi 2, Matsumoto Yuji 4,Ohmori Kenji 1, Yagyu Shinjiro 1, Yoshitake Michiko 1, Watanabe Heiji 5, Yamada Keisaku 6,Shimokohbe Akira 3,
  7 Crystalline and electrical properties of mictamict TiSiN gate MOS capacitors Graduate School of Engineering Nagoya Univ.1,CCRAST Nagoya Univ.2@Furumai Kouhei 1, *Kondo Hiroki 1, Sakai Akira 1, Ogawa Masaki 2, Zaima Shigeaki 1
  8 RTA-temperature dependence on the electrical characteristics of TiN gated MOSFETs Meiji Univ. 1, AIST 2.@T. hayashida 1, Y. X. Liu 2, T. Matsukawa 2, K. Endo 2, M. Masahara 2, S. Ouchi 2, K. Ishii 2, J. Tsukada 2, Y. Ishikawa 2, A. Ogura 1, E. Suzuki 2
’ 9 Workfunction Tuning of Pd2Si Fully-Silicided Gate by B or F doping Hiroshima Univ.@*Hosoi Takuji 1, Shiraishi Hiroyuki 1, Shibahara Kentaro 1
  10 Mo-Ta dual metal gate process for FinFET application AIST NeRI 1@*Matsukawa Takashi 1,Liu Yongxun 1,Masahara Meishoku 1,Endo Kazuhiko 1,Ishikawa Yuki 1,Tsukada Junichi 1,Yamauchi Hiromi 1,Ishii Kenichi 1,Suzuki Eiichi 1
  11 Development of TiN/Si selective oxidation by MMT plasma Hitachi Kokusai Electric Inc. 1@*Yamamoto Katsuhiko 1, Hirano Akito 1, Tsubota Yasutoshi 1, Terasaki Tadashi 1, Ogawa Unryu 1
’ 12 Effect of high pressure vapor annealing for low temperature poly-Si TFT flash memory with Si nano crystal dot NAIST 1, Nissin Electric Co.,Ltd 2@*Ichikawa Kazunori 1,Yano Hiroshi 1,Hatayama Tomoaki 1,Uraoka Yukiharu 1, Fuyuki Takashi 1, Tomyo atushi 2, Takahashi Eiji 2,Hayashi Tukasa 2,Ogata Kiyoshi 2
  13 Improvement in Al2O3/Si Interface by High Pressure Water Vapor Annealing NAIST 1@*Itoh Hiroki 1, Sugawara Yuta 1, Yano Hiroshi 1, Hatayama Tomoaki 1,Uraoka Yukiharu 1, Fuyuki Takashi 1
’ 14 High-Quality Epitaxial Si Films Grown at Low Temperatures by Atmospheric Pressure Plasma CVD Osaka Univ. 1@*Kirihata Yutaka 1,Tawara Naotaka 1,Ohmi Hiromasa 1,Kakiuchi Hiroaki 1,Watanabe Heiji 1,Yasutake Kiyoshi 1
  15 Formation of SiC/Si/SiC multilayer structures by hot filament CVD using CH3SiH3 Kyushu Univ. 1@*Okuyama Ryousuke 1, Ohtani Ryota 1, Ikoma Yoshifumi 1, Motooka Teruaki 1
    Lunch 13:00`14:00
29p-SM-@/ II
  1 Surface modification of plastic substrate by atomic hydrogen anneal and effect of AHA to film deposition Univ. of Hyogo@*Akira Heya, Masahiko Sato, Naoto Matsuo
  2 Effects of hydrogenation on chemical activity of defects in polycrystalline silicon thin films Shimane Univ. 1@*Ohashi Yasutaka 1,Matsumoto Shin 1,Moritani Akihiro 1,Kitahara Kuninori 1
  3 Study of activated boron depth profiles in ultra-shalow p+ layers formed by plasma-doping method Tokyo Tech. 1,2,Musashi Inst of Technol. 3,JASRI/SPring-8 4,UJT Lab. 5@*M.Watanabe 1,T.Matsuda 3,Y.Kobayashi 1,S.Sato 2,H.Nohira 3,E.Ikenaga 4, B.Mizuno 5,K.Tsutsui 1,T.Hattori 2,H.Iwai 2
  4 Activation of Dopants in Si films During Ultra rapid Thermal Annealing Induced by Thermal Plasma Jet Irradiation Grad. School of Advanced Science of Matter, Hiroshima Univ. 1@*Hirotaka Kaku 1, Seiichiro Higashi 1, Hirokazu Furukawa 1, Tatsuya Okada 1, Takuya Yorimoto 1, Hideki Murakami 1, Seiichi Miyazaki 1
  5 Activation of implanted dopant atoms at the low temperature Tokyo Univ. of A&T 1, Nissin Ion Equipment Co. LTD. 2@Shimokawa Mitsujiro 1, Andoh Nobuyuki 1, Sameshima Toshiyuki 1, Matsuda Yasuhiro 2, Andoh Yasunori 2
  6 Activation of Ion-Implanted Dopant Atoms by Infrared Semiconductor Laser Heating Tokyo A&T Univ1, Hightec Systems Co.LTD2, Nissin Ion Equipment Co. LTD3@*T. Sameshima1, M. Maki1, M. Takiuchi1, N. Andoh1, N. Sano2, Y.Matsuda3 and Y. Andoh3
  7 Characteristic analysis of Thin-film photodevice Ryukoku Univ. 1, Innovative Materials and Processing Res. Ctr. 2, Seiko Epson 3@Yamashita Takehiko 1, Shima Takehiro 1, Kimura Mutsumi 1,2, Hara Hiroyuki 3
  8 Fabrication of all sputter-deposited films high-quality polycrystalline Si Thin Film Transistors Osaka Univ. 1@*Tadashi Serikawa 1
  9 TFT Characterization of Silicon Film Prepared Using Double-Pulse Laser Scaning Kyushu Inst. Tech. 1,Kyushu Univ. 2,SHI 3@*K. Watanabe 1,M. Esaki 1,K. Akiyama 2,G. Nakagawa 2,T. Asano 2,T. Kudo 3
  10 Photo-induced Current of Low Temperature Poly-Si TFT Hitachi, Ltd. 1, Hitachi Dysplays, Ltd. 2@Tai Mitsuharu 1, Saito Teruaki 2, Nishitani Shigeyuki 2, Sato Hideo 2, Hatano Mutsuko 1
  11 Hot carrier immunity of the low-temperature poly-Si thin film transistor in low/high temperature ambient Hitachi CRL 1,Hitachi Displays 2@*Matsumura Mieko 1, Toyota Yoshiaki 1, Sakai Takeshi 2, Hatano Mutsuko 1
    Break 16:45`17:00
’ 12 Relationship between characteristics of poly-Si TFTs and disorder of Si films ALTEDEC 1@*Masahiro Mitani 1,Tomoya Katou 1,Takashi Okada 1,Shinzo Tsuboi 1,Genshiro Kawachi 1,Masakiyo Matsumura 1
  13 Characterization of stress distribution on low-temperature poly-Si TFTs using Raman spectroscopy Toray Research Center, Inc.@Keiko Matsuda 1, Keiko Inoue 1, Ryuichi Sugie 1, Naoki Muraki 1, Masanobu Yoshikawa 1
  14 Device simulation and experiment analysis of Hall effect of polycrystalline semiconductor Ryukoku Univ.@Yamaoka Toshifumi 1, Tani Satoshi 1, Kimura Mutsumi 1,2
’ 15 Simulation and Modeling of Transient Characteristics of Poly-Si TFTs Osaka Univ. 1, NAIST 2@*Kishida Yuji 1, Kuzuoka Tsuyoshi 1, Tsuji Hiroshi 1 , Kirihara Masaharu 1 , Kamakura Yoshinari 1 , Morifuji Masato 1 , Uraoka Yukiharu 2 , Taniguchi Kenji 1
  16 Potential and electric field dependency of poly-Si TFTs on source and drain impurity concentration Tokyo Polytechnic Univ. 1@Yamagata Masahiro 1, Hirata Seisiro 1, Satoh Toshifumi 1, *Hiroyuki Tango 1@
  17 Analysis of hot-carrier degradation in low temperature n-channel poly-Si LDD TFTs using 2-D device simulation Tokyo Polytechnic Univ. 1@Hirata Seishiro 1,Satoh Toshifumi 1,*Hiroyuki Tango 1
  18 Analysis of Device Degradation due to Pulse Stress in p-channel Low-Temperature poly-Silicon TFTs Central Research Lab. Hitachi 1, Advanced Research Lab. Hitachi 2, Hitachi Displays 3@Toyota Yoshiaki 1, Matsumura Mieko 1, Hatano Mutsuko 1, Shiba Takeo 2, Ohkura Makoto 3
11.5 Si Process Technology
March 30 9:00`15:00
30a-SM-@/ II
  1 Suppression of Two-Step Lateral Growth by Pulse-waveform Shaping ALTEDEC 1@*Shimoto Shigeyuki 1, Katou Tomoya 1, Endo Takahiko 1, Ohno Takashi 1, Taniguchi Yukio 1, Azuma Kazufumi 1, Matsumura Masakiyo 1
  2 Growth of Large Single-Grain Si Arrays ALTEDEC 1@*Endo Takahiko 1,Taniguchi Yukio 1,Katou Tomoya 1, Shimoto Shigeyuki 1, Ohno Takashi 1, Azuma Kazufumi 1, Matsumura Masakiyo 1
  3 Effects of Capping Layer on Phase-Modulated Excimer-Laser-Annealing Characteristics ALTEDEC 1@*Kato Tomoya 1,Shimoto Shigeyuki 1,Endo Takahiko 1,Oono Takashi 1,Azuma Kazufumi 1,Matsumura Masakiyo 1
  4 Dependency of CW Laser Beam Profile on Si Thin Film Recrystallization Tohoku Univ. 1@*Fujii Shuntaro 1, Kuroki Shin-Ichiro 1, Kotani Koji 1, Ito Takashi 1
’ 5 Evaluation of poly-Si thin film crystallized by solid green laser annealing using UV/Visible Raman spectroscopy Meiji Univ. 1,IHI 2@*Yasuto Kakemura 1,Kosuke Yamasaki 1,Daisuke Kosemura 1,Tetsuya Yoshida 1,Atsushi Ogura 1,Miyuki Masaki 2,Kenichiro Nishida 2,Ryusuke Kawakami 2,Naoya Yamamoto 1 2
  6 Influence of wavelength on laser crystallization of a-Si film Yamaguchi Univ. 1, Univ. of Hyogo 2@*Naoya KAWAMOTO 1, Hitoshi ISHIKAWA 1, Toshinori FUJIWARA 1, Kiyoshi UENO 1, Tadaki MIYOSHI 1, Naoto MATSUO 2, Akira HEYA 2
  7 Behavior of hydrogen in ELA of hydrogen modulation doped a-Si film Univ. of Hyogo 1, Osaka Univ. 2, Yamaguchi Univ. 3 @*Akira Heya 1, Kazumasa Oda 1, Tadashi Serikawa 2, Naoya Kawamoto 3, Naoto Matsuo 1
    Break 10:45`11:00
  8 Molecular-dynamics simulations of crystal growth of Si thin films by excimer laser annealingiIIIj Kyushu Univ. 1@ * Mitani Takanori 1, Ogata Tomohiko 1, Kishikawa Ryuzou 1, Kuranaga Takahide 1, Munetoh Shinji 1, Motooka Teruaki 1
  9 Process simulation for laser crystallization of double-layered Si thin film Ryukoku Univ. 1, NAIST 2@Ryusuke Saito 1, Shuji Tukamoto 1, Mutsumi Kimura 1, Yuta Sugawara 2, Yukiharu Uraoka 2
’ 10 Local Electrical Properties of Poly-Si Films after Laser Annealing by Conductive AFM Kochi National College of Tech.@*Machida Emi 1, Ikenoue Hiroshi 1
  11 Analysis of Crystalline Volume Ratio of Poly-Si Films Tokyo A&T Univ.1,Hightec Systems Co.LTD2@T.Sameshima1, N.Andoh1, N.Sano2
  12 Low-temperature formation of poly-Ge films by Al-induced crystallization Dept. Electronics Kyushu Univ. 1@*Tsumura Yoshitaka 1, Kanno Hiroshi 1, Kenjo Atsushi 1, Sadoh Taizoh 1, Miyao Masanobu 1
  13 Effect of catalyst on metal-induced lateral crystallization of amorphous Ge films Kyushu Univ. 1@Hagihara Takashi 1, *Kurosawa Masashi 1, Kanno Hiroshi 1, Kenjo Atsushi 1, Sadoh Taizoh 1, Miyao Masanobu 1
  14 Crystallization of Silicon Thin Films with Ni Nano Particles by Pulsed RTA NAIST 1, Matsushita Electric Industrial Co, Ltd. 2@*Ochi Masahiro 1, Nanjyo Yasuhiro 1, Sugawara Yuuta 1, Uraoka Yukiharu 1, Fuyuki Takashi 1, Okuda Mituhiro 2, Yamashita Ichiro 2
  15 Real time monitoring of the rapid crystallization of amorphous silicon utilizing a thermal plasma jet Saitama Univ. 1,RIKEN 2@*Ryo Min-A 1,Sakurai Yusuke 1,Haruta Kohji 1,Kobayashi Tomohiro 2,Shirai Hajime 1
    Lunch 13:00`14:00
30p-SM-@/ II
  1 Evaluation of Defect Density in Si Films Crystallized by Thermal Plasma Jet Irradiation Grad. School of Advanced Sciences of Matter, Hiroshima Univ. 1, National Institute of Advanced Industrial Science and Technology 2@*Yorimoto Takuya 1, Higashi Seiichiro1, Kaku Hirotaka 1, Okada Tatsuya 1, Murakami Hideki 1, Miyazaki Seiichi 1, Matsui Takuya 2, Masuda Atsushi 2, Kondo Michio 2
  2 Crystallization of Amorphous Silicon by Micro-wave Annealing Univ. of Yamanashi 1,Renkei 2,Musashi Inst. of Tech. 3@*Ashizawa Satoki 1,Mitsui Minoru 1,Horie Tadashi 1,Arimoto Keisuke 1,Yamanaka Junji 1,Nakagawa Kiyokazu 1,Arai Tetsuji 2,Takamatsu Toshiyuki 2,Sawano Kentaro 3, Shiraki Yasuhiro 3
’ 3 Low-temperature crystallization of a-Si film by laser-plasma x-ray irradiation followed by excimer laser annealing Dept. Mat. Sci. &chemi., Univ. Hyogo 1,LASTI Univ. Hyogo 2,NIPPON GIJUTSUCENTER CO.,LTD 3,MEISYO KIKO CO.,LTD 4@*Uejukkoku Kazuya 1,Heya Akira 1,Amano Sho 2,Takanashi Yasuyuki 1,Miyamoto Shuji 2,Takesako Ryouichi 3,Adachi Masashi 4,Matsuo Naoto 1,Mochizuki Takayasu 2
  4 Crystallization of silicon films by indirectly heating using a CW infrared laser Tokyo Univ. of A&T 1, Hightec Systems 2@Andoh Nobuyuki 1, Shimokawa Mitsujiro 1, Maki Masato 1, Sameshima Toshiyuki 1, Sano Naoki 2
11.6 Si Devices/Integration Technology
March 27 10:00`18:00
27a-SC-@/ II
  1 Investigation of Vth variation due to the gate edge variation of MOSFETs 1. The University of Tokyo 2. SELETE@Arifin Tamsir Putra 1, Akio Nishida 2, Shiro Kamohara 2, Toshiro Hiramoto 1,2
’ 2 (110) Ultra-thin GOI p-MOSFETs Fabricated by Ge Condensation Method The Univ. of Tokyo(Sch. of Eng.) 1,The Univ. of Tokyo(Grad. Sch. of Fr. Sci.) 2, Tokyo Institute of Technology(Dep. of Eelc. and Appl. Phys.) 3@*Dissanayake Sanjeewa 1, Kumagai Hiroshi 2, Yusuke Shuto 1, Sugahara Satoshi 3, Takagi Shinichi 1,2
  3 (110)-Surface Anisotropic Strained-Si p-MOS Technology: Concept and Drain Current Enhancement MIRAI-AIST 1, MIRAI-ASET 2, Kanagawa Univ. 3, Univ. Tokyo 4 @*T.Mizuno 1,3, T.Irisawa 2, Y.Moriyama 2, N.Hirashita 2, T.Numata 2, T.Tezuka 2, N.Sugiyama 2, S.Takagi 1,4
’ 4 Optimization of PFET with High-mobility-enhancement technology for low voltage operation Sony Corporation 1, Semiconductor Company Toshiba Corporation 2, NEC Electronics Corporation 3@*Moriya Mika 1, Ota Kazunobu 1, Sanuki Tomoya 2, Yamazaki Takashi 1, Yamaguchi Rie 2, Togo Mitsuhiro 3, Iwamoto Toshiyuki 3, Nii Hideaki 2, Ohno Keiichi 1, Ikeda Masahiro 3, Iwai Masaaki 2, Saito Masaki 1
  5 Conductance modulation due to a few acceptors in nano SOI MOSFETs NTT BRL 1, Shizuoka Univ. 2, Hokkaido Univ. 3@Yukinori Ono 1, Katsuhiko Nishiguchi 1, Akira Fujiwara 1, Hiroshi Yamaguchi 1, Hiroshi Inokawa 2, Yasuo Takahashi 3
    Break 11:15`11:30
  6 High Field Transport in Silicon -Ohm's Law and Velocity Saturation- Univ. of Tsukuba 1@*Natori Kenji 1
  7 Influence of Increase in Gate Insulator Dielectric Constant on Remote Coulomb Scattering due to Gate Impurities Toshiba RDC 1,Toshiba Semiconductor Co.@*Nakabayashi Yuio 1,Ishihara Takamitsu 1,Shimizu Takashi 2,Koga Junji 1
  8 Experimental Study on Mobility Universality in (100) Ultra Thin Body nMOSFET with SOI Thickness of 5nm IIS, Univ. of Tokyo 1@Ken Shimizu 1, Gen Tsutsui 1, Toshiro Hiramoto 1
  9 Energy relaxation of two-dimensional electrons in Si-MOSFETs(II)-scattering process and screening effect IIS/CINQIE Univ. of Tokyo 1, GSFS Univ. of Tokyo 2@*Park KyungHwa 1, Hirakawa Kazuhiko 1, Takagi Shinichi 2
’ 10 High field Drift velocity of Holes in GOI(Ge-On-Insulater)MOS channels School of Engineering The Univ. of Tokyo 1,Graduate School of Frontier Sciences The Univ. of Tokyo 2,Tokyo Inst of tech. 3@Tanabe Satoshi 1,Uehara Takashi 2,Nakane ryoushou 1,Sugahara Satoshi 3,Takagi Shinichi 1,2
  11 Comparison in current drive between III-V Semiconductor n-MOSFETs and Si/Ge n-MOSFETs Univ.Tokyo 1, 2, Tokyo. Inst. Technol. 3 @*Shinichi Takagi 1,2, Masakazu Sugiyama 2, Satoshi Sugahara 3
    Lunch 13:00`14:00
27p-SC-@/ II
  1 Proposal of the Characteristic Current for evaluating the performance of short channel transistors FUJITSU 1,FUJITSU LABORATORIES 2@*Miyamoto Masato 1,Yoshida Eiji 2,Momiyama Yoichi 2,Kojima Manabu 1
’ 2 3-D Simulation Results of Underlap Triple-Gate SOI MOSFET Kansai Univ. Grad. School Eng. 1@*Yoshioka Yoshimasa 1, Omura Yasuhisa 1
’ 3 Analytical Modeling of Cross-Current SOI (silicon-on-insulator) MOSFET Kansai Univ. Grad. School Eng. 1@*Azuma Yu 1, Yoshioka Yoshimasa 1, Omura Yasuhisa 1
  4 Measurements of Short Channel Variable Body Factor Fully-Depleted SOI MOSFETs IIS. Univ. Tokyo 1,Oki Electric Industry Co., Ltd. 1@*Tetsu Ohtou 1, Takuya Saraya 1, Kimiaki Shimokawa 2, Yasuhiro Doumae 2, Yoshiki Nagatomo 2, Jiro Ida 2, Toshiro Hiramoto 1
  5 Study of Back-Bias Effect in Bulk FinFETs IIS, Univ. of Tokyo 1@*Takahashi Keisuke 1, Ohtou Tetsu 1, Hiramoto Toshirou 1
  6 Threshold Voltage Fluctuation on FinFET due to Line Edge Roughness Keio Univ. 1@*Inoue Manami 1,Oishi Takashi 1,Nakano Nobuhiko 1
  7 Electrical Characteristics of FinFETs with Recessed Source and Drain Structure Corporate R&D Center, Toshiba 1@Thimo Sauter 1, Yukio Nakabayashi 1, Atsuhiro Kinoshita 1, *Junji Koga 1
    Break 15:45`16:00
  8 Effects of various shapes of spacer region on FinFETs characteristics Tokyo Inst. Tech. 1,2, Indian Inst. Tech. 3 @*Yusuke Kobayashi 1, Kazuo Tsutsui 1, Kuniyuki Kakushima 1, Venkanarayan Hariharan 3, V. Ramgopal Rao 3, Parhat Ahmet 2, Hiroshi Iwai 2
  9 TiN Metal Gate FinFET CMOS Technology AIST@Y. X. Liu, T. Matsukawa, K. Endo, M. Masahara, K. Ishii, S. Ouchi, H. Yamauchi, J. Tsukada, Y. Ishikawa, E. Suzuki
  10 Investigation of a CMOS Inverter using Four-Terminal FinFETs Nat. Inst. AIST@K. Endo, Y. Ishikawa, Y. Liu, T. Matsukawa, S. Ofuchi, M. Masahara, K. Ishii, J. Tsukada, H. Yamauchi and E. Suzuki
  11 Power Reduction of Logic Circuit Utilizing 4T-FinFET AIST@*Ofuchi Shin-ichi, Masahara Meishoku, Liu YongXun, Endo Kazuhiko, Matsukawa Takashi, Hioki Masakazu, Tsutsumi Toshiyuki, Sekigawa Toshihiro, Koike Hanpei, Suzuki Eiichi
  12 Investigation of the optimum gate workfunction for CMOS 4-terminal MUGFETs AIST 1, NXP 2, IMEC 3@*Masahara Meishoku 1, Surdeanu Radu 2, Witters Liesbeth 3, Doornbos Gerben 2, Nguyen Viet 2, van den Bosch Geert 3, Vrancken Christa 3, Jurczak Margorzata 3
  13 Demonstration of asymmetric gate oxide thickness 4-terminal FinFETs AIST 1, NXP 2, IMEC 3 @*Masahara Meishoku 1, Surdeanu Radu 2, Witters Liesbeth 3, Doornbos Gerben 2, Nguyen Viet 2, van den Bosch Geert 3, Vrancken Christa 3, Jurczak Margorzata 3
  14 Performance enhancement of Tri-Gate nMOSFETs by utilizing uniaxially-strained SOI channels MIRAI-ASET 1, MIRAI-AIST 2@*Toshifumi Irisawa 1, Tsutomu Tezuka 1, Naoharu Sugiyama 1, Shin-ichi Takagi 2
  15 Simulation of Double Gated Short Channel Ge-MISFET Considering Band-to-Band Tunneling MIRAI-ASET 1, MIRAI-ASRC AIST 2, Univ. of Tokyo 3@*Yamamoto Toyoji 1, Harada Masaomi 1, Taoka Noriyuki 2, Yamashita Yoshimi 1, Sugiyama Naoharu 1, Takagi Shinichi 2,3
11.6 Si Devices/Integration Technology
March 28 9:30`12:00
28a-ZQ-@/ II
  1 Effect of Arsenic Implantation on High-k pMISFET with High-Dosage Fluorine Implantation Renesas Technology Corp. 1@*Hayashi Takashi 1, Mizutani Masaharu 1, Inoue Masao 1, Yugami Jiro 1, Tsuchimoto Junichi 1, Nishida Yukio 1, Yamashita Tomohiro 1, Oda Hidekazu 1, Inoue Yasuo 1
  2 The relationship between gate work function and optimization of dopant distribution at the 32 nm technology node High Performance MOSFETs System LSI Div. I 1, CSRD 2, Semiconductor Com. Toshiba Corp.@*Awano Misa 1, Kusunoki Naoki 1, Fujii Osamu 1, Yoshimura Hisao 1, Miyashita Katsura 1, Nakayama Takeo 1, Adachi Kanna 2, Azuma Atsushi 2
  3 Effect of Stress from Silicon-nitride Liner in Fully-Silicided Gate Transistor Renesas Technology Corp. 1@*Nishida Yukio 1, Eikyu Katsumi 1, Miyagawa Yoshihoro 1, Hayashi Takashi 1, Yamashita Tomohiro 1, Yugami Jiro 1, Oda Hidekazu 1, Inoue Yasuo 1
  4 Improvement in Performance of Schottky Barrier S/D Transistors with High-k Gate Dielectrics by Adopting Recessed Channel and/or Buried S/D Structures Corporate R&D Center, Toshiba Corporation@Mizuki Ono 1, Masato Koyama 1, Akira Nishiyama 1
’ 5 Elevated Source/Drain Extension Structure for 32nm MOSFET System LSI DivisionI 1, Center for Semiconductor Research & Development 2, Process & Manufacturing Engineering Center 3 Toshiba Corporation Semiconductor Company@*Okamoto Shintaro 1, Yasutake Nobuaki 2, Miyashita Katsura 1, Itokawa Hiroshi 3, Mizushima Ichiro 3, Nishimura Hisashi 3, Awano Misa 1, Kusunoki Naoki 1, Nakayama Takeo 1
    Break 10:45`11:00
  6 Pinning level shift by disorder layer insertion at Metal/Ge interface The Univ. of Tokyo@Hamaishi Mitsuhiro 1, *Nishimura Tomonori 1, Kita Koji 1, Toriumi Akira 1
  7 Sulfur introduction effect on Fermi level pinning at Metal/Ge interface The Univ. of Tokyo 1@*Nishimura Tomonori 1, Kita Koji 1, Toriumi Akira 1
  8 1nm NiSi/Si Junction Design Based on First-Principles Calculation for Ultimately Low Contact Resistance Toshiba R&D Center 1@*Yamauchi Takashi 1, Kinoshita Atsuhiro 1, Tsuchiya Yoshinori 1, Koga Junji 1, Kato Koichi 1
’ 9 Improvement of Si/Ge/SOI structure Metal S/D pMOSFETs by atomic hydrogen annealing Dept. of frontier infomatics, Univ. of Tokyo 1, Dept. of Electronic Eng., Univ of Tokyo 2, Tokyo Inst. of Tech. 3@*Takashi Uehara 1, Satoshi Tanabe 2, Hiroshi Matsubara 1,Ryosho Nakane 2, Satoshi Sugahara 3, Shinichi Takagi 1,2
11.6 Si Devices/Integration Technology
March 29 9:30`17:45
29a-ZQ-@/ II
£ 1 Investigation of Sub 40nm Cell Contact using DPT (Double-Patterning Technology) for a Nand Flash memory Samsung Electronics Memory Division Advanced Process Integration Group@*Hyun-Seok Jang, Hyun Park, Sang-Wook Shin, Chang-Sup Kim, Song-Yi Yang, Ji-Young Min, Young-Hoo Kim, Jin-Wook Yang, Jang-Hwan Jung,Won-Jin Kim, Byung-Hong Chung, Jeong-Lim Nam and Joo-Tae Moon
  2 Measurements of DRAM Retention Characteristics using Voltage Contrast Images produced by SEM Inspection CRL, Hitachi Ltd. 1@*Takahiro Odaka 1, Yoshihiro Anan 1, Masanari Koguchi 1
£ 3 A Shallow Trench Isolation using P-SOG for Sub-70nm DRAM Device Advanced Process Integration Group, Semiconductor R&D Center, Samsung Electronics@*Dong-Chan Lim, Soo-Ik Jang, Tae-Gon Kim, Kwan-Heum Lee, Hee-Don Hwang, Oh-Seong Kwon, Chan-Won Kim, Ho-Jun Kwon, Byeong-Yun Nam, Jeong-Lim Nam and Joo-Tae Moon
  4 Optimization of contact formation process for 45nm technology node Ultra High Density SRAM System LSI Division I, Semiconductor Company, Toshiba Corporation. 1,Semiconductor Technology Development Division, Semiconductor Business Group, Sony Corporation. 2,NEC Electronics Corporation. 3@*Kimura Taiki 1, Okayama Yasunori 1,Watanabe Ryuuta 1,Nii Hideaki 1,Sogo Yasunori 2,Morimoto Rui 2,Ooshima Kyousuke 2,Maeda Hidenori 2,Hirai Tomohiro 3,Watanabe Susumu 3,Sunouchi Masakazu 1,Saito Masaki 2,Iwai Hideaki 1,Tougou Hiromitsu 3,Ikeda Masahiro 3
’ 5 Process integration of 0.248um2 SRAM Cell for 45nm Generation Semiconductor Business Group, Sony CorporationASemiconductor Company, Toshiba CorporationANEC Electronics Corporation@*Maeda Hidenori 1,Sogo Tasunori 1,Morimoto Rui 1,Okayama Yasunori 2,Kimura Taiki 2,Watanabe Ryuta 2,Hirai Tomohiro 3,Nii Hideaki 2,Togo Mituhiro 3,Ohno Keiichi 1,Sunouchi Kazumasa 2,Ikeda Masahiro 3,Iwai Masaaki 2,Saito Masaki 1
£ 6 Analysis of the distribution of cell currents in S3(Stacked Single-crystalline Si) SRAM Advanced Process Integration Group, Semiconductor RND Center, Samsung ElectronicsSan 24 Nongseo-Ri, Kiheung-Eup, Yongin-City, Kyungki-Do, Korea@*E.G. Chung, H. Lim, K.C. Kim, K.H. Kwak, J.S. Ahn, S.C. Bang, J. Kim, J.H. Kim, J.L.Nam and J.T. Moon
    Break 11:00`11:15
  7 Fast and accurate estimation of single event transient pulses for soft-error tolerant logic circuits: 1 principle ISAS 1, Sokendai 2, Univ. Tokyo 3@*Daisuke Kobayashi 1,2, Hirobumi Saito 1,3, Kazuyuki Hirose 1,2
’ 8 The mechanism of NBTI degradation induced by stress liner SiN film for 45nm-node PMOSFET Semiconductor Business Group Sony Corporation 1, Semiconductor Company Toshiba Corporation 2, NEC Electronics Corporation 3 @*Iwata Toshihiko 1, Fukasaku Katsuhiko 1, Tojima Yukari 1, Hachimine Kiyota 1, Eiho Ayumi 2, Togo Mitsuhiro 3, Idaka Toshiaki 2, Miyajima Hideshi 2, Usami Tatsuya 3, Sato Naoyuki 1, Inokuma Hidemichi 2, Ohta Kazunobu 1, Sanuki Tomoya 2, Muramatsu Satoru 3, Iwasa Seiichi 2, Nagaoka Kojiro 1, Iwamoto Toshiyuki 3, Nii Hideaki 2, Ohno Keiichi 1, Ikeda Masahiro 3, Iwai Masaaki 2, Saito Masaki 1
  9 TDDB characteristics and nitrogen-implantation effects on the Laser Annealed nMOSFETs with heavily doped poly-Si gates NEC 1,NEC Electronics 2@Koichi Yako 1,Toshiyuki Iwamoto 1,Mitsuru Narihiro 1,Masayasu Tanaka 1,Mitsuhiro Togo 2,Masami Hane 1
  10 Failure Analysis using IR-OBIRCH Method for 65nm Node CMOS Transistor after TDDB FUJITSU LABORATORIES 1,FUJITSU 2@Nishigaya Keita 1,Sakoda Tunehisa 1,Morisaki Yusuke 1,Xiao shiqin 1,Minakata Hiroshi 1,Ikeda Kazuto 1,Kase Masataka 2
’ 11 A First Principles Study on Gate Tunneling Current through Si/SiO2/Si Structures Kobe Univ. 1@*Yamada Yoshihiro 1, Tsuchiya Hideaki 1, Miyoshi Tanroku 1
    Lunch 12:30`13:30
29p-ZQ-@/ II
£ 1 Time-controlled single-gate single-electron transfer in random multiple-tunnel-junctions Research Inst. of Electronics, Shizuoka Univ. 1, NTT Basic Research Labs. 2@*Moraru Daniel 1, Ono Yukinori 2, Inokawa Hiroshi 1, Yokoi Kiyohito 1, Ratno Nuryadi 1, Ikeda Hiroya 1, Tabe Michiharu 1
£ 2 Single-acceptor ionization observed using single-hole-tunneling transistor Research Inst. of Electronics, Shizuoka Univ. 1@*Z.A. Burhanudin 1, R. Nuryadi 1, M. Tabe 1
  3 Potential response on channel surface of multidot FET under AC bias operation Shizuoka Univ. 1@*Ikeda Hiroya 1, Yamamoto Ryuta 1, Asai Kiyosumi 1, Tabe Michiharu 1
  4 Characterization of MultiStep Electron Charging to Silicon-Quantum-Dot Floating Gate by Applying Pulsed Gate Biases Adsm, Hiroshima Univ. 1@* Matsumoto Ryuji 1,Ikeda Mitsuhisa 1,Higashi Seiichro 1,Miyazaki Seiich
  5 Evaluation of electrical properties dependence on the channel orientation for nanowire FETs Waseda Univ. 1, Waseda Nano Inst. 2, Waseda Zaiken 3@*Seike Aya1, Tange Tomoyuki1, Sano Itsutaku1, Sugiura Yuuki1, and Ohdomari Iwao1,2,3
£ 6 Low Temperature Synthesis of Silicon Nanowires QNERC & Dept. of Physical Electronics, Tokyo Tech. 1, SORST-JST 2@Akhtar Saeed 1, Tanaka Atsushi 1, Tsuchiya Yoshishige 1,2, Usami Kouichi 1, Mizuta Hiroshi 1,2, Oda Shunri 1,2
  7 A Study on Charge Pumping Operation by Three-Gate Wire MOSFET Shizuoka Univ. 1, NTT Basic Research Labs. 2@*Inokawa Hiroshi 1, Nakakita Yosuke 1, Nishiguchi Katsuhiko 2, Ono Yukinori 2, Fujiwara Akira 2
  8 Infrared detection with silicon nano-transistors NTT Basic Research Labs. 1, Shizuoka Univ. 2, Hokkaido Univ. 3@*Nishiguchi Katsuhiko 1, Fujiwara Akira 1, Ono Yukinori 1, Yamaguchi Hiroshi 1, Inokawa Hiroshi 2, Takahashi Yasuo 3
    Break 15:30`15:45
’ 9 Simulating Uuantum Transport in Nano-Scale Transistors Grad. School of Science1,@Kobe Univ.2@Hiroshi Imago1, Atsushi Mizutani1, Takayuki Shimizu1, Helmy Fitriawan1, Satofumi Souma2, Matsuto Ogawa2, Tanroku Miyosi2
  10 Role of Elastic and Inelastic Scattering in A Quasi-Ballistic MOSFET Kobe Univ. 1, Univ. of Tokyo 2, MIRAI-AIST 3@*Tsuchiya Hideaki 1, Takagi Shinnich 2,3, Miyoshi Tanroku 1
  11 Phosphorus freeze-out effect of SOI-MOSFETs with thin top Si layer Shizuoka Univ. 1@*Nagata Daisuke 1, Ebisawa Kazuhito 1, Daniel Moraru 1, Tabe Michiharu 1
  12 Low temperature KFM measurements of an ultrathin SOI-FET channel surface Research Inst. of Electronics, Shizuoka Univ. 1, Faculty of Mechatronics, Warsaw Univ. of Tech. 2@*Ligowski Maciej 1,2 , Ichiraku Akihiro 1, Fan Youjun 1, Ratno Nuryadi 1, Ikeda Hiroya 1, Jablonski Ryszard 2, Tabe Michiharu 1
  13 Temperature Dependence of SOI-MOSFETs Embedding Artificial Dislocation Network RIE Shizuoka Univ.@*Yuki Kasai 1, Toshiya Ishino 1, Naoto Kato 1, Ryuichi Yamano 1, Nuryadi Ratno 1, Michiharu Tabe 1
’ 14 High-rate Random Number Generator using Si-rich SiN MOSFET Corporate R&D Center,Toshiba Corporation 1@@*M.Matsumoto,R.Ohba,S.Yasuda,T.Tanamoto,K.Uchida,S.Fujita
  15 Evaluation of Channel Impurity Pile-up using Inverse Modeling System Devices Research Lab., NEC 1, NEC Electronics 2@*Nagumo Toshiharu 1, Takeuchi Kiyoshi 1, Akiyama Yutaka 2, Hane Masami 1
  16 Planner structure RTD fabricated with a Si1-xGexquadruple-layer Strain-Relief buffer Graduate School of Eng., Tokyo Univ. of Agric. and Technol., 1@Maekawa Hirotaka 1,Sano Yoshihiro 1,Suda Yoshiyuki 1
11.6 Si Devices/Integration Technology
March 30 10:00`12:45
30a-SC-@/ II
  1 A Monitoring Method of RF Characteristics Variations for Sub-0.1ƒΚm MOSFETs System Devices Res. Labs, NEC Corp. 1@Akira Tanabe 1, Ken'ichiro Hijioka 1, and Yoshihiro Hayashi 1
’ 2 Radiation efficiency for Si on-chip integrated antennas Research Center for Nanodevices and Systems, Hiroshima Univ. 1 @*Kimoto Kentaro 1, Sasaki Nobuo 1, Masashi Fukuda 1, Nitta Masakazu 1, Kikkawa Takamaro1
’ 3 UWB Transmission Characteristics of Bow-tie Antenna on Si chip Research Center for Nanodevices and Systems, Hiroshima Univ. 1@*Kubota Shinichi 1, Xia Xiao 1, Kimoto Kentaro 1, Kikkawa Takamaro 1
’ 4 Fusion of RF MEMS and RF CMOS Technologies NTT MI Labs. 1, NTT-AT 2@*Kuwabara Kei 1, Sato Norio 1, Shimamura Toshishige 1, Morimura Hiroki 1, Kodate Junichi 1, Shigematsu Satoshi 1, Nakanishi Mamoru 1, Kamei Toshikazu 2, Machida Katsuyuki 2, Ishii Hiromu 1
  5 Study on low-actuation-voltage RF MEMS switch for RF CMOS-MEMS technology Nagaoka Univ. of Technology 1,NTT MI Labs. 2,NTT-AT 3@*Kusayama Yusuke 1,Kuwabara Kei 2,Sato Norio 2,Morimura Hiroki 2,Sakata Tomomi 2,Kudou Kazuhisa 3,Yano Masaki 3,Machida Katsuyuki 3,Ishihara Yasutoshi 1,Ishii Hiromu 2
    Break 11:15`11:30
  6 Simplified micro electro mechanical system fabrication process using bonding thin single crystalline silicon film and glass substrate College of Science and Technology Nihon Univ 1,Research Center for Micro-Functional Devices 2@*Nara Takuyuki 1,Oku Kouki 1,Fukai Hirofumi 2,Hatagouchi Hideki 1,Nishioka Yasushiro 1.2
  7 Structural Function of Cone Bump Investigated Using Active-Matrix Connection-Test Circuit Kyushu Inst. Tech. 1,Kumamoto Technology and Industry Foundation 2,Kyushu Univ. 3@*Iwasaki Yutaka 1,Watanabe Naoya 2,Asano Tanemasa 3
  8 Electrical Characteristics of MOS transistors with Nanograting Channels Tohoku Univ.1@*Zhu Xiaoli 1, Kuroki Shin-Ichiro 1, Kotani Koji 1, Ito Takashi 1
  9 High temperature operation test of LDMOS using polysilicon Heater TOYOTA Central R&D Labs. 1,DENSO CORP. 2@*Yukihiko Watanabe 1,Akira Tai 2,Mitsutaka Katada 2
  10 High temperature test of EPROM data retention using polysilicon heater DENSO CORP. 1,TOYOTA Central R&D Labs. 2@*Akira Tai 1,Mitsutaka Katada 1,Yukihiko Watanabe 2
11.7 Simulation
March 28 9:30`16:00
28a-G-@/ II
  1 Optimization Scheme of High Voltage MOSFET using Technology-CAD Semiconductor R&D Division Oki Electric Industry Co., Ltd.@*Shinichirou Amemiya 1, Hirokazu Hayashi 1, Marie Mochizuki 1, Kouichi Fukuda 1
  2 Threshold Voltage Fluctuation in MOSFETs Due to the Discrete Dopant and Process Variations in a Wafer Keio Univ. 1@*Oishi Takashi 1,Inoue Manami 1,Nakano Nobuhiko 1
  3 Threshold Voltage Modulation of MOSFETs by Workfunction Engineering in Gate Electrode Univ. of Tsukuba, Inst. of Appl. Phys 1, Semiconductor Leading Edge Technologies, Inc. 2@*Yamada Tatsuya 1,Mise Nobuyuki 2,Matsuki Takeo 2,Eimori Takanao 2,Nara Yasuo 2,Sano Nobuyuki 1
  4 Localized Impurity Model on Electron Transport Simulation Tsukuba Univ. Appl. Phys. Inst. 1@*Takayuki Fukui 1, Tadayoshi Uechi 1, Nobuyuki Sano 1
’ 5 Stress Engineering of eSiGe Source/Drain for 45nm-node Sony Corporation 1, Semiconductor Company Toshiba Corporation 2, NEC Electronics Corporation 3@*Kawano Hiroyuki 1, Takahashi Seiji 1, Yamazaki Takashi 1, Ohta Kazunobu 1, Sanuki Tomoya 2, Sawada Tatsurou 2, Sengoku Mitsuhiro 2, Kusunoki Naoki 2, Fujii Osamu 2, Akiyama Yutaka 3, Iwamoto Toshiyuki 3, Nii Hideaki 2, Ohno Keiichi 1, Yoshimura Hisao 2, Ansai Hisahiro 1, Ikeda Masahiro 3, Iwai Masaaki 2, Saito Masaki 1
    Break 10:45`11:00
  6 A simple 20nmMOSFET model including the gate voltage dependence of the drain conductance Kyoto Inst. of Tech. 1@Yamate Akihiro 1, Hiroki Akira 1, Yamada Masayoshi 1
  7 Novel parameter extraction method for low field drain current of nano-scaled MOSFETs Fujitsu@Takuji Tanaka 1
  8 Double Gate MOSFET Device Model Construction and the Application for SRAM Circuits Keio Univ. 1@*Yamazaki Hirotaka 1, Nakano Nobuhiko 1
£ 9 Voltage-limitation-free compact SET model incorporating the effects of spin-degenerate discrete energy states QNERC & Dept. of Physical Electronics, Tokyo Tech. 1 and SORST- JST 2@*Pruvost Benjamin 1,Mizuta Hiroshi 1,2,Oda Shunri 1,2
£ 10 The atomic and electronic structure of silicon nanoflowers and nanowire junctions: the theoretical prediction of a new class of nanoobjects JAEA/ASRC 1, Kyoto Univ. 2@Pavel Avramov 1, Yoshihito Maeda 1,2
    Lunch 12:15`13:45
28p-G-@/ II
  1 Quatum Transport Analysis of Relaxation Processes in Nanoscale Devices with NEGF Method Tsukuba Univ. 1@*Sato Suguru 1,Kusaka Hiroyuki 1,Sano Nobuyuki 1
£ 2 Modeling of Quantum Electron Transport in Strained Double-Gate MOSFETs Grad. School of Science and Technology Kobe Univ. 1, Fac. of Eng. Kobe Univ. 2@*Helmy Fitriawan 1, Matsuto Ogawa 2, Satofumi Souma 2, Tanroku Miyoshi 2
  3 Two-dimensional quantum transport simulation in DGMOSFETs using the sp3s* tight-binding method Osaka Univ. 1@Minari Hideki 1, Mori Nobuya 1
  4 Fully 3D Quantum-Correted Monte Carlo Simulation for Multi-Gate MOSFETs Kobe Univ. 1@*Fujii kazuya 1,@Okuda Kyousuke 1, Tsuchiya Hideaki 1, Miyoshi Tanroku 1
’ 5 Theoretical Investigation of Confined Phonon States and Electron-phonon Interactions in a Free-standing Si Nanowire Nagoya Univ. 1, SORST JST 2, Osaka Univ. 3@*Hattori Junichi 1, Uno Shigeyasu 1,2, Mori Nobuya 3, Nakazato Kazuo 1,2
    Break 15:00`15:15
  6 Investigation of Ballistic conductivity in an MOSFET parameter by an RT model FCRC1, Tokyo Tech2, Thukuba 3@Yasuhiro Morozumi 1, Yusuke Kobayashi2, Kenji Natori3, Kuniaki Kakushima1, Parhat Ahmet 1, Kazuo Tsutsui 2, Takeo Hattori 1, Nobuyuki Sugii 1 , Hiroshi Iwai1
’ 7 Quantum-Corrected Monte Carlo Simulation of Ge and GaAs Channel MOSFETs Kobe Univ. 1@*Mori Takashi 1, Azuma Yuusuke 1, Tsuchiya Hideaki 1, Miyoshi Tanroku 1
£’ 8 Simulation of the Band Gap and Electrical Conductivity of Semiconductor Temperature Sensor Materials by Molecular Dynamics and Tight-Binding Quantum Chemistry Theory Methods Dept. Appl. Chem., Tohoku Univ. 1,JST-PRESTO@2, NICHe, Tohoku Univ. 3@ ›Zhigang Zhu1, Chutia Arunabhiram1, Hideyuki Tsuboi1, Michihisa Koyama1, Nozomu Hatakeyama1, Akira Endou1, Hiromitsu Takaba1, Momoji Kubo1, 2, Carlos A. Del Carpio1, Akira Miyamoto1, 3