11 Semiconductors A (Silicon)
Review Lectures and Geneal Sessions: Which Technologies will Achieve a breakthrough for Future ULSI Interconnect
September 6 10:00〜17:00
6a-ZQ-　/ II
	1	Introductory talk
	2	Reliability Issues for Scaled Interconnects	Shibaura Inst. Tech. 1, Tokyo Inst. Tech. 2　Ueno Kazuyoshi 1, Matsuzawa Akira 2
	3	Self-Formed Barrier Technology using CuMn Alloy Seed for Copper Dual-Damascene Interconnect with porous-SiOC/ porous-PAr Hybrid Dielectric	Center for Semiconductor Research & Development 1Process & Manufacturing Engineering Center 2Semiconductor Company, Toshiba Corp.　* Tadayoshi Watanabe 1, Hayato Nasu 1, Takamasa Usui 1, Gaku Minamihaba 2, Nobuyuki Kurashima 2, Akifumi Gawase 2, Miyoko Shimada 2, Yasuhito Yoshimizu 2, Yoshihiro Uozumi 2 , Hideki Shibata 1
	4	Highly-oriented PVD Ruthenium Liner for Low-resistance Direct-plated Cu Interconnects	Device Platforms Research Labs, NEC Corp. 1　*Makoto Ueki 1, Munehiro Tada 1, Takahiro Onodera 1, Naoya Furutake 1, Shinsaku Saito 1, Yoshihiro Hayashi 1
		Lunch 12:10〜13:15
6p-ZQ-　/ II
	1	Metallurgical approach to form a barrier layer in reduction of the dimensions of the Cu interconnects	Kyoto Univ.1, Ritsumeikan Univ.2　*kazuhiro Ito1, Susumu Tsukimoto1, Masanori Murakami2
	2	The Size Effect of Resistivity and RC Delay in Copper Interconnects	Fujitsu Laboratories LTD.　*Hideki Kitada 1, Takashi Suzuki 1, Tomoji Nakamura 1
	3	Electromigration of Scaled-down Cu interconnects: Trade-off between Reliability and Resistivity	NEC Electronics Corp. 1　*Shinji Yokogawa 1
	4	Effects of Via Layout on SIV Reliability of Cu Interconnects	Renesas NAKA 1,Renesas KITAITAMI 2,Renesas MUSASHI 3　*Shibata Ryuji 1,Fujisawa Masahiko 2,Nagayama Satoshi 3,Fujii Takako 3,Murakami Eiichi 1,Tsunokuni Kazuyuki 1,Maegawa Shigeto 1,Kubota Katsuhiko 1
		Break 15:15〜15:30
	5	Electrical Properties of Carbon Nanotube Via Interconnects Fabricated by Novel Damascene Process	MIRAI-Selete　*Mizuhisa Nihei 1, Takashi Hyakushima 1, Shintaro Sato 1, Tatsuhiro Nozue 1, Masaaki Norimatsu 1, Miho Mishima 1, Tomo Murakami 1, Daiyu Kondo 1, Akio Kawabata 1, Mari Ohfuti 1, Yuji Awano 1
	6	Through Silicon Via Interconnection between Stacked Chips Using Room Temperature Bonding	Hitachi, Ltd. Mechanical Engineering Research Laboratiry 1,Renesas Technology Corp. 2　*Tanaka Naotaka 1, Yoshimura Yasuhiro 1, Kawashita Michihiro 1,Naito Tahahiro 2, Akazawa Takashi 2
	7	Global interconnects: On-chip transmission line interconnect technologies	Tokyo Tech P&I Lab. 1, Tokyo Tech IRI 2　Hiroyuki Ito 1, Kenichi Okada 2, Kazuya Masu 2
11.1 Fundamental Materials Characterization and Evaluation
September 5 9:30〜18:00
5a-ZF-　/ II
	1	Behavior of nano size water mark on spin dry and its prevention	SEZ Japan Inc Marketing & process developement　 Hidehazu Yayashi, * Kosaku Matsuno, Koichi Tasaka, Masaki,Takanao, Satomi Mashimoto
	2	Selective adsorption of organic molecules along Cu nanowire on Si(111) surface in liquid phase	Graduate School of Engineering, Osaka Univ.　*Yoshimatsu Akina 1, Shigetoshi Takushi 1, Morita Mizuho 1, Arima Kenta 1
	3	Anodic Etching Characteristics of n-Type Silicon in Aqueous HF/KIO3 Solution	Gunma Univ. 1,Gunma Univ. 2　Tamura Tomoyuki 1,Adachi Sadao 2
	4	Raman scattering study of electrically active impurities in in-situ B-doped Si nanowires	Kobe Univ.1, Matsushita Electric Industrial Co.,Ltd.2　*Imamura Go 1, Kawashima Takahiro 2, Saitoh Tohru 2, Fujii Minoru 1, Hayashi Shinji1
▲	5	Conduction of size controlled silicon nanocrystals film	QNERC, Tokyo Tech1, Southampton Univ. and Tokyo tech2, SORST-JST3　*Zhou Xin 1, Cheong Hea-Jeong 1, Tsuchiya Yoshishige 1,3, Mizuta Hiroshi 2,3, and Oda Shunri 1, 3
	6	Charge retention characteristics in Si-nanocrystal dispersed films	Graduate School of Natural Sci. and Tech.,Kanazawa Univ. 1,Faculty of Eng.,Kanazawa Univ. 2　*Takeshita Tohru 1,Kurata Yoshihiro 2,Inokuma Takao 1
		Break 11:00〜11:15
	7	Formation of nc-Si in SiO2 substrate by laser irradiation	Inst. of Appl. Phys. Univ. of Tsukuba 1, AIST-ASRC 2, NIMS 3　*Kintou Hiroshi 1, Okami Tsuyoshi 1, Utida Noriyuki 2, Fukata Naoki 3, Murakami Kouichi 1
	8	Effects of P+ Implantation into Si Nanocrystals embedded in SiO2 matrix	Inst.of Appl.Phys.,Univ.of Tsukuba 1,S.R.P NanoScience 2,NIMS 3,AIST 4　*Shirakawa Ryota 1,Tsujimura Masatoshi 1,Uchida Noriyuki 2.4,Fukata Naoki 2.3,Kishimoto Naoki 3,Hishita Syunichi 3,Murakami Kouichi 1.2
	9	Effect of hydrogen atom treatment in P doped silicon nanocrystals	Inst.of.Appl.Phys.,Univ.of Tsukuba 1, S.R.P Nano Science 2, AIST 3, NIMS 4, Kobe University 5　Masatoshi Tsujimura 1, Ryota Shirakawa 1, Noriyuki Uchida 2,3, Naoki Fukata 2,4, Minoru Fujii 5, Shinnji Hayashi 5, Kouiti Murakami 1,2
	10	P and B codoping in Si nanowires	Inst.of Appl.Phys.,Univ.ofTsukuba 1, NIMS 2, S.R.P NanoScience 3, Inst.For Mat Research, Tohoku Univ. 4　*Seoka Masanori 1, Fukata Naoki 2.3 , Matsusita Satoshi 1, Jin chen 2, Sekiguchi Takashi 2, Tsurui Takao 4, Murakami Kouiti 1.3
	11	Electron spin resonance studies of P and B doped Si nanocrystals	Graduate School of Sci. and Tec. Kobe Univ. 1,Graduate School of Eng. Kobe Univ. 2,Molecular Photosci. Kobe Univ. 3,Dep. Fron. Res. Tech. Kobe Univ. 4　*Fujio Kazuyoshi1,Fujii Minoru2,Hayashi Shinji2,Ohta Hitoshi3,4,Fujisawa Masashi4
		Lunch 12:30〜13:30
5p-ZF-　/ II
	1	Young Scientist Award for the Presentation of an Excellent Paper Analysis of bonding state of heavy elements in advanced gate stacks by means of TEM-EELS with high spatial resolution	Corporate Research & Development Center, Toshiba Corporation　Tanaka Hiroki 1, Ichihara Reika 1, Tsuchiya Yoshinori 1, Koyama Masato 1, Takeno Shiro 1
	2	Direct observation of the pileup position of impurities in metal gate electrodes by high resolution STEM imaging	Toray Research Center Inc. 1　*Naohiko Kawasaki 1, Naoyuki Sugiyama 1, Yuji Otsuka 1
	3	Three-Dimensional Observation of Edge Roughness in ArF Photoresist by Scanning Transmission Electron Microscope	Semiconductor Leading Edge Technologies Inc.(Selete) 1,Hitachi High-Technologies Corp.2　*Miyuki Takahashi 1, Nobuyuki Mise 1, Takahisa Eimori 1, Mitsuo Ogasawara 2,Michiyo Miyakawa 2, Hiroshi Kakibayashi 2,
	4	Electron Spin Resonance of Boron in Isotopically Controlled Silicon	Keio Univ. 1　*Hiroyuki Tezuka 1, Tojo Shinichi 1, Kohei M. Itoh 1
	5	Study of metal-insulator transition in Si:P	Waseda Univ. 1, ASMeW 2, Waseda Nano Inst. 3, Waseda Zaiken 4 　* Itsutaku Sano 1, A. Seike 1, T. Shinada 2, I. Ohdomari 1,2,3,4
	6	Characterizations of high pressure induced metastable Si crystalline phase	NISSAN ARC Ltd, Research Department　Tadashi Awatani, Satoshi Shimizu, Toshimitsu. Numata, Takeo Okamura, Koji Yoneda, Jiping Ye
	7	Fracture testing of Silicon membrane structure	Kumamoto Univ. 1　*Soh Yuki 1, Miyamoto Yasuo 1, Kubota Hiroshi 1
	8	High spatial resolution UV Raman study of stress in Si STI structures using polarization dependence	MIRAI-ASRC, AIST　*Tetsuya Tada, Vradimir Poborchii, Toshihiko Kanayama
	9	Stress Components Evaluation Method in Single Crystal Silicon Microstructure by Raman Spectroscopy using Multivariate Analysis	HORIBA, Ltd. 1, Univ. of HYOGO 2　*S. Kashiwagi 1, N. Naka 1, Y. Nagai 2, T. Namazu 2, S. Inoue 2, K. Ohtsuki 1
		Break 15:45〜16:00
△	10	Evaluation of strain distribution in SOI induced by SiN film after patterning	Meiji Univ. 1, STARC 2　*Kosemura Daisuke 1, Kakemura Yasuto 1, Yoshida Tetsuya 1, Ogura Atsushi 1, Uchida Hidetsugu 2, Hattori Nobuyoshi 2, Yoshimaru Masaki 2
△	11	Behaviors of ultra thin SiGe layer by annealing	Meiji Univ. 1,RIKEN 2,SUMCO TECHXIVE Corp. 3　*Yamamoto　Yu 1,2, Kambayashi Hirokazu　1,2, Imai　Masato　2,3, Miyamura Yoshiji　2,3, Kobayashi Takane 2, Ogura Atsushi 1
△	12	Measurement of strain in ultra thin SiGe layer by XRD	Meiji Univ. 1,Riken 2,SUMCO TECHXIV Corp. 3　*Kambayashi Hirokazu 1,2,Yamamoto Yu 1,2,Imai Masato 2,3,Miyamura Yoshiji 2,3, Ogura Atsushi 1,Kobayashi Takane 2
	13	Heavy-ion induced gate current in MOSFET	Nihon Univ. 1, JAEA 2 　*Fugane Masaru 1,2 , Takahashi Yoshihiro 1, Nakajima Yasuhito 1, Nagasawa Takaharu 1, Imagawa Ryou 1, Nomoto Keisuke 1, Ohnishi Kazunori 1, Hirao Toshio 2, Onoda Shinobu 2, Ohshima Takeshi 2
	14	Characterization of carrier transport across grain boundaries in poly crystalline Si	Yamagata　Univ.　1, Tohoku Univ. RIEC　2, Tohoku Univ.　3, JST-CREST　4　Fumihiko Hirose 1,4,Hengshim　Teh 1, Kazuhiro Takahashi 1, Yasuo Kimura 2,4, Michio Niwano 2,4, Kingo Itaya 3,4
	15	Evaluation of Barrier Metal by current-voltage characteristic of thermal characteristic	Graduate School of Science and Technology, Kumamoto University　Syun-ichirou Komura, Takayuki Mizogami, Fumito Imura and Hiroshi Kubota
	16	Evaluation of Barrier Metal of Cu wiring pn junction by SIMS analysis	Graduate School of Science and Technology Kumamoto Univ. 1, Kumamoto Univ. 2　*Mizogami Takayuki 1, Komura Syun-ichirou 1, Shiotsu Keisuke 2, Kubota Hiroshi 1
	17	Au Agglomerates Observed in Annealing Process of Supersaturated High-Temperature Substitutional Au in Si	Fukuoka Inst. Tech. 1　*Morooka Masami 1
11.2 Surface
September 6 9:30〜17:50
6a-ZF-　/ II
	1	Theoretical Proposal of the Mechanism of Multi-electron Injection into Quantum Dots Floating Gates embedded in Insulator	Graduate School of Pure and Applied Physics, Univ. of Tsukuba 1, CREST-JST 2　*Takada Yukihiro 1, Muraguchi Masakazu 1, Shiraishi Kenji 1,2
	2	Direct observation of macroscopic mechanics caused by atomic scale chemistry on Si surfaces	IMS 1, Trinity College Dublin 2　*Tetsuya Narushima 1,2, Niall T. Kinahan 2, John J. Boland 2
	3	Wet-Oxidation of Silicon surface with the Gas-Dissolved Water and UV Irradiation	Mitsubishi Gas Chemical　*Sotoaka Ryuji,Tanaka Keiichi,Tomoyuki Azuma,Kimura Yoshiya
	4	Photoassisted STM/STS study for nano-scale structures in thin hafnium oxide film on silicon	AIST-NeRI 1, Musashi Inst. 2　Noriyuki Miyata 1,2
	5	Simulation of enhanced Si self-diffusion in SiO2 during Si thermal oxidation	Keio Univ. 1　*Uematsu Masashi 1, Ibano Kenzo 1, Itoh Kohei 1
	6	An analysis of thermal oxidation rate measured by real-time XPS in the Torr pressure range	Hirosaki Univ. 1, LBNL 2, UCD 3　*Enta Yoshiharu 1, Bongjin S. Mun2, Maximilliano Rossi2, Charles S. Fadley2,3
	7	Experimental verification of the unified Si oxidation reaction model (2): O2 pressure dependence of interfacial oxidation rate	Tohoku Univ. 1, JAEA 2, Akita Nat. Col. Tech. 3　Ogawa Shuichi 1, Yoshigoe Akitaka 2, Ishidzuka Shinji 3, Teraoka Yuden 2, Takakuwa Yuji 1
▲	8	Improving the Si/SiO2 interface: an ab-initio study of silicon oxidation by ozone	Univ. of Cambridge　Christian K. Fink, Stephen J. Jenkins, David A. King
	9	Behavior of Au and Growth of Thermal Oxide Film on the Au-Contaminated Si(100) Surface	Nihon Univ. 1　*Ikeda Masanori 1,Wakashima Hiroya 1,Ishikawa Takuma 1,Shimizu Hirofumi 1
	10	Stress dependence of interfacial reaction process during Si thermal oxidation	Mie Univ. 1, NTT Basic Research Labs. 2, Keio Univ. 3　*Akiyama Toru 1, Kageshima Hiroyuki 2, Uematsu Masashi 3, Ito Tomonori 1
△	11	Analysis of void distribution around the SiO2/Si interface with molecular dynamics simulation	Waseda Univ. 1, Waseda Nano Inst. 2, Waseda Zaiken 3,　*Ohta Hiromichi 1, Watanabe Takanobu 1 2, Ohdomari Iwao 1 2 3
		Lunch 12:15〜13:15
6p-ZF-　/ II
	1	JJAP Young Scientist Award Rate-Limiting Reactions of Growth and Decomposition Kinetics of Very Thin Oxides on Si(001) Surfaces Studied by Reflection High-Energy Electron Diffraction Combined with Auger Electron Spectroscopy	Tohoku University　Shuichi Ogawa
	2	Removal　of　high　dose　Ion-Implanted　photoresists　with　SPMless　cleaning（1）	Fujitsu Ltd Aizuwakamatsu Plant. 1,Aqua Science Corp. 2　*Toshiya Sato 1,Tamotsu Suzuki 1,Akihiko Tsukahara 1,Masao Yamase 2,Teruo Saito 2,Kyota Morihira 2
	3	Removal　of　high　dose　Ion-Implanted　photoresists　with　SPMless　cleaning（2）	Fujitsu Ltd Aizuwakamatsu Plant. 1,Aqua Science Corp. 2　*Toshiya Sato 1,Tamotsu Suzuki 1,Tsukahara Akihiko 1,2,Masao Yamase 2,Teruo Saito 2,Kyota Morihira 2
	4	Study on effects of Sulfuric Acid Concentration on Resist Removal Efficiency in SPM	KURITA WATER INDUSTRIES LTD.　*Nagai Tatsuo, Uchida Minoru, Ikemiya Norihito, Otsu Toru, Yamakawa Haruyoshi, Kanamori Shunichi
△	5	Resist Stripping by using steam-water mixture spray	Shizuoka Univ. 1, AIST 2, Kyushu Univ. 3, Aqua Sci. Co. 4　*Sanada Toshiyuki 1, Saito Takayuki 1, Shirota Minori 2, Watanabe Masao 3, Morita Yoshihisa 4, Yamase Masao 4
△	6	Compensation of film thickness distribution at wafer level by single spin wafer wet etching	Renesas Technology　*Oinoue Takashi 1,Tanaka Hiroshi 1,Ochi Hironori 1,Homma Takuro 1,Kato Takeshi 1
	7	Study of High-speed Wet-etching of Silicon in Alkaline Solution	Mitubisi Gas Chemical　*Kenji Yamada,Kazuyoshi Yaguchi,Ryuji Sotoaka,Tomoyuki Azuma
	8	Change of oxide film etching rate by single wafer BHF treatment	Renesas Technology 1　*Hirota Yusaku 1,Kanno Itaru 1
	9	Suppression of galvanic Corrosion of metal gate using organic based HF solution	Osaka Univ.1,　Daisuke Watanabe, Hidemitsu Aoki, Chiharu Kimura and Takashi Sugino
		Break 15:35〜15:50
	10	Edge cleaning of a glass substrate by over-heated steam jet	Mitsubishi Electric Corp. 1,SPC Electronics 2　*Seiji Noda 1, Takafumi Nakai 1, Yasuhiro Tanimura 1, Tatsuo Kataoka 2
	11	Development of Bevel Brush Scrubbing Process (II)	Sony Corporation　*Uemura Takayuki, Hagimoto Yoshiya, Iwamoto Hayato
	12	The Study of next generation beveling process / The optimization for beveling by using high viscosity solution	SEZ Japan Inc.　*Kosaku Matsuno 1,Toshitaka Hiraga 1, Jin Hongjie 1, Kesuke Sato 1, Daisuke Kanazawa 1, Masaki Takano 1
	13	Effect of Mega-Sonic Wave on Water Flow in a Batch-Type Silicon Wafer Wet Cleaner	Yokohama National Univ. 1, Pre-tech 2　*Yuta Okada 1, Hirofumi Yoshii 1,Hitoshi Habuka 1, Masayuki Kato 2
	14	Development of Stepchemical Process	Dainippon Screen Mfg.Co.,Ltd. 1,Mitsubishi Gas Chemical Company,Inc. 2　Kentaro Tokuri 1,Takashi Higuchi 1,Hiroyuki Araki 1,Keiichi Tanaka 2,Ryuji Sotoaka 2,Tomoyuki Azuma 2
	15	Particle Measurement in Supercritical Caron Dioxide with Light Scattering Particle Counter	Organo Corp. 1, AIST 2, The Kansai Electric Power Co., Inc. 3, Rion Co., Ltd. 4, Suzuki Shoko Co., Ltd. 5　*Hiroshi Sugawara 1, Takashi Futatsuki 1, Akira Suzuki 2, Masahiko Tatsumi 3, Kouki Ogura 3, Kaoru Kondo 4, Junichi Watanabe 5
	16	Study on Electrolytic Generation of Peroxodisulfuric Acid and its Self-decomposition	KURITA WATER INDUSTRIES LTD. 　*Yamakawa Haruyoshi, Otsu Toru, Nagai Tatsuo, Uchida Minoru, Ikemiya Norihito, Kanamori Shunichi
	17	Proof of Ashingless Removal of φ300mm Wafers Using Electrolyzed Sulfuric Acid Solution	KURITA WATER INDUSTRIES LTD. 1,DAINIPPON SCREEN MFG.CO.,LTD. 2　Toru Otsu 1,Tatsuo Nagai 1,Haruyoshi Yamakawa 1,Syunichi Kanamori 1,Minoru Uchida 1,Norihito Ikemiya 1,Hiroaki Uchida 2,Hiroaki Takahashi 2,Tomomi Hirashita 2
11.2 Surface
September 8 9:00〜12:15
8a-ZF-　/ II
	1	Low Energy Electron Diffraction of Ge surface dipped into HCl solutions	Graduate School of Osaka Univ. 1　Yoneda Kzufumi 1,Uchikoshi junichi 1,Morita Mizuho 1,Arima Kenta 1
	2	Smooth Si surface obtained by using chemical etching in a NH4F solution and atomic lithography with an STM	Tohoku Univ 1, Ryukyu Univ 2　*Kitano Takeshi 1, Kinjo Mitsunaga 2, Sato Shigeo 1, Nakajima Koji 1
	3	Formation of periodic wavelike structures on Si(100) with the metal-cluster-complex ion beam of Ir4(CO)7+	AIST 1,Toshiba 2　*Fujiwara Yukio 1, Kondou Kouji 1, Watanabe Kouji 1, Nonaka Hidehiko 1, Saito Naoki 1, Hiroshi Ito 1, Fujimoto Toshiyuki 1, Kurokawa Akira 1, Ichimura Shingo 1, Tomita Mitsuhiro 2
	4	Control of bare Si surfaces using defect passivation etchless cleaning solutions	ISIR Osaka Univ. 1, CREST-JST 2　*Takahashi Masao 1 2, Liu Yueh-Ling 1 2, Shishido Takeru 1 2, Kobayashi Hikaru 1 2
	5	Oxidation Process Dependence of Strain Field under the SiO2/Si Interface Revealed by the Phase-Sensitive X-ray Diffraction Technique	Univ. Tokyo 1, NIMS 2, JASRI 3, Musashi Inst. Technol. 4, NICHe 5 　*Wataru Yashiro 1, Shuji Kusano 2, Yoshitaka Yoda 3, Kensuke Takahashi 4, Masashi Yamamoto 5 and Takeo Hattori 5, Kazushi Miki 2
	6	Oxidation of SiC Surface in High Pressure and High Temperature Water	Organo Corp. 1, Osaka Univ. 2　*Oe Taro 1, Futatsuki Takashi 1, Aoki Hidemitsu 2, Komatsu Naoyoshi 2Kimura Chiharu 2, Sugino Takashi 2
	7	Damage on boron-doped electrodes during destruction of organic compounds in solutions	KURITA WATER INDUSTRIES LTD.　Norihito Ikemiya, Haruyoshi Yamakawa, Hideki kobayashi, Minoru Uchida
	8	In-situ STM observation of Si surface modified by low-energy dopant-ion beam	Waseda Univ. 1, Waseda ZAIKEN 2, ASMEW 3　*Kamioka Takefumi 1,2, Kou Sato 1, Iwao Ohdomari 1,2,3
▲	9	Improvement of the electrical properties in ferroelectric capacitors by using a wet cleaning process	Samsung Electronics Co. 1　*Son Yoonho 1, Lee Mongsup 1, Lee Sangho 1, Shim Woogwan 1, Lee Kuntack 1, Hong Changki 1, Kang Chanjin 1, Moon Jootae 1
	10	Estimation of DBP Adsorption Rate to Si Wafer Surface by Molecular Simulation	Shin Nippon Air Technologies 1, Tohoku Univ. 2　Takatsuka Takeshi 1, Miyamoto Akira 2, Kubo Momoji 2, Endou Akira 2, Koyama Michihisa 2, Gohdo Masazumi 1, Miura Kunio 1
	11	Amount of Adsorbed Diethylphthalate and Isopropyl Alcohol on Silicon Surface (3)	Yokohama National Univ.　Daisuke Yamaya 1,*Norihiro Kawahara 1, Hitoshi Habuka 1
	12	Control of particle re-adhesion with hydrogen-dissolved water(2)	Hitachi,LTD. 1,Hitachi High-Technologies Corp. 2　*Hara Koji 1,Hamano Megumi 1,Takahara Yoichi 1,Moriguchi Yoshihiro 2
	13	Removal of Hydroxy Peroxide in an Ultra Pure Water System	KURITA WATER INDUSTRIES LTD. 1,NIPPON SHEET GLASS CO., LTD. 2　Hideki Kobayashi 1,Katsunobu Kitami 1,Takeo Fukui 1,Ryohei Ogawa 2,Kiyoshi Miyashita 2, Masamichi Kezuka 2
11.3 Gate Insulator Technology
September 4 9:45〜17:00
4a-ZM-　/ II
	1	Theoretical Study of Hydrogen in Amorphous Al2O3	NIMS 1, Tsukuba Univ. 2, IIS Univ. Tokyo 3　Asari Yusuke 1, Momida Hiroyoshi 1, Fujimoto Yoshitaka 2, Nara Jun 1,3, Ohno Takahisa 1,3
	2	Optical and Transport Characteristics of Al-rich Al-O Thin Films	NTT Microsystem Integraton Labs. 1, Grad. School of Natural Sci. & Tech., Kanazawa Univ. 2　*Nakata Shunji 1, Nagai Singo 2, 　Kumeda Minoru 2, Kawae Takeshi 2, Morimoto Akiharu 2, Katagiri Yoshitada 1, Shimizu Tatsuo
	3	Characteristics of nonvolatile Al-rich Al-O memory after annealing	Grad. School of Natural Sci. & Tech., Kanazawa Univ.　1, NTT Microsystem Integration Labs.　2, Prof.Emeritus, Kanazawa Univ　3　*Nagai Shingo 1, Terada Kyohei 1, Kawae Takeshi 1, Morimoto Akiharu 1, Kumeda Minoru 1, Nakata Shunji 2, Shimizu Tatsuo 3
	4	Step Coverage Deposition by Using ECR Plasma Sputtering Technique for Fabrication of MEMS Accelerometer Sensor	Hirosaki Univ. 1, NTT MI Labs. 2　*Toyota Hiroshi 1, Kato Koji 1, Jin Yoshito 2 and Ono Toshiro 1
	5	Penetration of an H2O molecule and an OH- ion into SiC, Si3N4 films	Mitsubishi Electric Corp. 1　*Oku Tomoki 1, Totsuka Masahiro 1, Ishikawa Takahide 1
	6	Evaluation of gate dielectric reliability by Pulse-Photoconductivity Method	Graduate School of Science and Technology Kumamoto Univ. 1　Junichi Nasu 1, Yuya Nishi 1, Atsushi Goto 1, Hiroshi Kubota 1
		Break 11:15〜11:30
	7	Formation of silicon oxynitrides with rare-gas diluted N2 plasma	National Defense Academy 1　*Kitajima Takeshi 1, Kubota Akihiro 1, Nakano Toshiki 1
	8	Evaluation of N profile on thin SiON films by Angle-Resolved Soft X-ray Photoelectron Spectroscopy.	Toshiba Nanoanalysis Corp. 1, Advanced LSI Technology Laboratory Toshiba Corp. 2, Semiconductor Company Toshiba Corp. 3　*Nobutaka Satou 1, Mamoru Takahashi 1, Masahiko Yoshiki 2, Takashi Shimizu 3
	9	Formation of oxinitride film with the nitrogen double peak by high temperature plasma nitridation	Hitachi Kokusai Electric Inc.　*Nakayama Masanori 1,Yamamoto Katsuhiko 1,Michita Noriaki 1,Terasaki Tadashi 1,Ogawa Unryu 1
	10	Electronic structure of SiO_2 thin films sandwiched between Si	NIMS 1, IIS, Tokyo Univ. 2, Fujitus Lab. 3　Nara Jun 1,2, Yamasaki Takahiro 2,3, Kondo Hisahi 2,1, Ohno Takahisa 1,2
	11	Relationship between Pb center and Dit	Advanced LSI Technology Laboratory 1　Matsushita Daisuke 1, Kato Koichi 1, Muraoka Koichi 1, Mitani Yuuichiro 1
	12	SiO2/Si interface structure evolution through oxidation and annealing - Theoretical prediction	Toshiba R&D Cent. 1　*Kato Koichi 1, Matsushita Daisuke 1, Ishihara Takamitsu 1
		Lunch 13:00〜14:00
4p-ZM-　/ II
	1	Probing of defects in gate dielectrics introduced by metal gate film deposition using monoenergetic positron beams	Tsukuba Univ. 1,Selete 2,Waseda Univ. 3　*Narumi Takamitsu 1,Uedono Akira 1,Sometani Mitsuru 1,Sugimura Soutaro 1,Yamabe Kikuo 1,Matsuki Takeo 2,Watanabe Toshinari 2,Miura Takayoshi 2,Eimori Takahisa 2,Yamada Keisaku 3
	2	Positron Annihilation Spectroscopy for Analysis of Influence of TiN-sputtering on Interfacial Reaction of TiN/SiO2 in High-temperature Annealing	Selete 1, Waseda Univ. 2, University of Tsukuba 3　* Matsuki Takeo 1, Watanabe Toshinari 1, Miura Takayoshi 1, Eimori Takahisa 1, Yamada Keisaku 2, Uedono Akira 3
	3	TDDB Characteristics of thin silicon dioxide films formed by the oxidation furnace with the load lock system	PHENITEC SEMICONDUCTOR Corp.　*Minami Masashi
	4	TDDB Characteristics of thin silicon dioxide films formed by　dry and wet oxidation	PHENITEC SEMICONDUCTOR Corp.　Minami Masashi 1,Shiraga Yoichi 1,Kawata Kohei 1
	5	Thermodynamics of silicon dioxide 2	PHENITEC SEMICONDUCTOR Corp. 1,The Graduate School of Science and Technology OKAYAMA Univ. 2　*Masashi Minami 1,Yoichi Shiraga 1,Ishiyama Takeshi 2,Yoichi Kamiura 2
	6	Dielectric characteristics of SiO2 film formed by using radical oxygen	Tsukuba Univ 1,TEL AT 2　*Okamoto Shinichi 1,Hasunuma Ryu 1,Kabe Yoshiro 2,Hirota Yoshihiro 2,Yamabe Kikuo 1
		Break 15:30〜15:45
△	7	Investigation of SiO2 dielectric breakdown mechanism using FUSI and poly-Si electrode	Corporate R&D Center, Toshiba Corp. 1, Toshiba Corp. Semiconductor Company 2　*Fukatsu Shigeto 1, Hirano Izumi 1, Mitani Yuichiro 1, Inumiya Seiji 2, Saito Tomohiro 2, Nakajima Kazuaki 2, Aoyama Tomonori 2
	8	Effects of strain on gate oxide reliability (1) -TDDB characteristics-	MIRAI-ASET 1, MIRAI-AIST 2, Covalent Materials 3　Irisawa Toshifumi 1, Numata Toshinori 1, Toyoda Eiji3, Hirashita Norio 1, Tezuka Tsutomu 1, Sugiyama Naoharu 1, Takagi Shin-ichi 2
	9	Effects of strain on gate oxide reliability (2): -NBTI characteristics-	MIRAI-ASET 1, MIRAI-AIST 2, Covalent Materials 3　Irisawa Toshifumi 1, Numata Toshinori 1, Toyoda Eiji3, Hirashita Norio 1, Tezuka Tsutomu 1, Sugiyama Naoharu 1, Takagi Shin-ichi 2
	10	Improvement of NBTI in Low Temperature SiN Stack Gate Dielectrics for 45nm LSTP Devices	Fujitsu Labs. Ltd. 1, Fujitsu Ltd. 2　*Morisaki Yusuke 1, Tsunehisa Sakoda 1, Nishigaya Keita 1, Minakata Hiroshi 1, Xiao Shiqin 1, Kase Masataka 2, Ikeda Kazuto 1
△	11	Behaviors of O atoms in pulse-modulated Ar/O2 surface wave plasmas	Nagoya Univ. 1, Tokyo Electron AT Ltd. 2, Tokyo Electron Ltd. 3　Keigo Takeda 1, Takashima Seigo 1, Kabe Yoshiro 2, Kitagawa Junichi 2, Nakanishi Toshio 2, Itoh Hitoshi 3, Hori Masaru 1
11.3 Gate Insulator Technology
September 5 9:30〜12:00
5a-ZQ-　/ II
△	1	IRAS study of atomic layer deposition of HfO2 on Si by using tetrakis(ethylmethylamino)hafnium (TEMAH) and ozone	Yamagata Univ. 1, Hitachi Kokusai Electric 2, Shin-Etsu Chemical 3, Tohoku Univ. nanospin 4　Kinoshita Yuta 1, Hirose Fumihiko 1, Miya Hironobu 2, Hirahara Kazuhiro 3, Kimura Yasuo 4, Niwano Michio 4
	2	Study of Thermal Stability of high-k Films by Metal Deposition Followed by O2 Annealing	Tokyo Univ.ofAgri.&Tech. 1　*Iwazaki Yoshitaka 1,Takagi Tomomi 1,Hasumi Masahiko 1,Ueno Tomoo 1,Kuroiwa Kouichi 1
	3	Fabrication and Characterization of HfO2 Films by Metal Deposition +ECR Kr/O2 Plasma Oxidation	Tokyo Univ. of Agri. & Tech.　*Oniki Yusuke 1, Koike Junichiro 1, Nagasato Yoshitaka 1, Iwazaki Yoshitaka 1, Hasumi Masahiko 1, Ueno Tomo 1, Kuroiwa Koichi 1
	4	Fabrication of HfO2/Al2O3/Si stacked structure by metal deposition followed by O2 annealing	Tokyo Univ. of Agri. & Tech.　*Hayase Yukihide 1, Kishiwada Jun 1, Nagasato Yoshitaka 1, Iwazaki Yoshitaka 1, Hasumi Masahiko 1, Ueno Tomo 1, Kuroiwa Koichi
	5	Oxidation temperature dependence of HfOxNy Thin Films followed by O2 annealing	Tokyo Univ. of Agri.&Tech.　1　*Shimomura Masaki 1,Huynh Tung Thanh 1,Hasumi Masahiko 1,Iwasaki Yoshitaka 1,Ueno Tomoo 1,Kuroiwa Kouichi 1
		Break 10:45〜11:00
△	6	Selective Oxidation of HfO2/SiO2/Si Gate Stack by ALD with Neutral Beam	Tohoku Univ. 1　*Ikoma Toru 1, Samukawa Seiji 1
△	7	Formation of high-k gate dielectrics using plasma oxidation and PDA of Hf/SiO2/Si structure	kyushu Univ. 1, Epson corp. 2　*Suehiro Yuusaku 1, Sugimoto Youhei 2, Kajiwara Masanari 1, Wan Don 1, Nakashima Hiroshi 1
△	8	Influence of Ti Diffusion on Interface Properties of HfTiSiO High-k Gate Insulators	Osaka Univ.1, Canon ANELVA 2, AIST 3　*Arimura Hiroaki 1, Kitano Naomu 1,2, Naitou Yuuichi 1,3, Minami Takashi 2, Kosuda Motomu 2, Hosoi Takuji 1, Shimura Takayoshi 1, Watanabe Heiji 1
△	9	Dielectric Dispersion and Acceleration of Crystallization in HfO2 film deposited by Substrate Heated Sputtering	The univ. of Tokyo 1　Kazuyuki Tomida, Koji Kita, Akira Toriumi
11.3 Gate Insulator Technology
September 6 10:15〜18:30
6a-ZM-　/ II
	1	Growth Delay Time on fabricating thin ZrO2 film by Limited Reaction Sputtering	Grad. School of Natural Sci. & Tech. of Kanazawa Univ.　Kojima Nobuo 1. Zhou Ying 1. Sasaki Kimihiro 1
	2	The effect of post nitridation annealing on the electrical properties of HfSiON films	Univ. of Tsukuba 1,Tokyo Electron Ltd 2,TIMS Univ.of Tsukuba 3 　*Hayashi Tomohiro 1,Tamura Chihiro 1,Nakamura Genji 2,Akasaka Yasushi 2,Hasunuma Ryu 3,Yamabe Kikuo 3
	3	Study on PDA process of HfOxNy gate insulator utilizing ECR plasma process	Tokyo Tech 1　*Nakano Yusuke 1,Ohmi Shun-ichiro 1
	4	Effect of Fluorine implantation on HfSiON observed by EUV excited photoelectron spectroscopy system EUPS2	ASRC-AIST 1, Renesas Technology 2　Iwazumi Hiromi 1, Kasai Takeshi 1, Tomie Toshihisa 1,Katayama Toshiharu 2, Inoue Masao 2, and Asayama Kyouichirou 2
		Break 11:15〜11:30
	5	Analysis of high-k gate dielectric films interface by High-resolution Rutherford Backscattering.	Kobelco Research Inst.　Fujikawa Kazuhisa 1,Ysuno Satoshi 1,Sasakawa Kaoru 1
	6	Electrical Characterization of High-k Film/Si Interface by Scanning Capacitance Microscopy	Univ. of Hyogo 1, Renes as Technology Corp. 2　Shingo Kuge 1, Takashi Arai 1, Haruhiko Yoshida 1, Masao Inoue 2, Hidenobu Mori 1, Shinichi Satoh 1
	7	0.6nm-EOT high-k gate stacks with HfSiOx interfacial layer grown by solid-phase reaction	MIRAI-ASET 1,MIRAI-ASRC,AIST 2,The Univ. of Tokyo 3　*Arito.Ogawa1, Kunihiko.Iwamoto1, Hiroyuki.Ota2, Toshihide.Nabatame1, Akira.Toriumi2,3
	8	Electrical Characterization of HfSiO Film/poly-Si Interface	Univ. of Hyogo 1,Renesas Technology Corp. 2　*Arai Takashi 1,Kuge Shingo 1,Yoshida Haruhiko 1,Inoue Masao 2,Mori Hidenobu 1,Satoh Sinichi 1
	9	Enhanced Performance of pMISFET with TiN/HfSiON Gate Stacks Fabricated by PVD-based In-situ Method	Osaka Univ.1, Renesas Technology, Canon ANELVA　*Watanabe Heiji 1, Horie Shinya 1, Shimura Takayoshi 1, Kawahara Takaaki 2, Sakashita Shinsuke 2, Nishida Yukio 2, Yugami Jiro 2, Kitano Naomu 1,3, Minami Takushi 3, Kosuda Motomu 3
	10	The effect of introduction of Al2O3 layer on PMOSFET with the stacked HfO2/Al2O3 high-k gate dielectrics	MIRAI-ASET 1, MIRAI-AIST 2, The University of Tokyo 3,　Iwamoto Kunihiko 1, Kamimuta Yuuichi 1, Ogawa Atrito 1, Hirano Akihito 1, Watanabe Yukimune 1, Migita Shinji 2, Mizuhayashi Wataru 2, Ota Hiyoyuki 2, Nabatame Toshihide 1, Toriumi Akira 2,3
		Lunch 13:00〜14:00
6p-ZM-　/ II
	1	JJAP Paper Award Modified Oxygen Vacancy Induced Fermi Level Pinning Model Extendable to P-Metal Pinning	Selete1，University of Tsukuba2，National Institute for Materials Science3, CREST4, Osaka University5　Yasushi Akasaka1,2, Genji Nakamura1, Kenji Shiraishi2,3,4, Naoto Umezawa3, Kikuo Yamabe2,3, Osamu Ogawa1, Myoungbum Lee1, Heiji Watanabe5, Toyohiro Chikyow3, Fumio Ootsuka1, Yasuo Nara1 and Kunio Nakamura1
△	2	Effective work function of TaN metal gate on HfO2 and SiO2 after post-metallization anneal	Kyushu Univ. 1,EPSON Corp. 2　*Kajiwara Masanari 1,Suehiro Yuusaku 1,Sugimoto Youhei 2,Wang Dong 1,Nakashima Hiroshi 1
△	3	Effects of Interface Structures on Effective Work Function of Metal/High-k Gate Stacks	Osaka univ. 1, Tsukuba Univ. 2, SELETE 3, Waseda Univ. 4　*Kita Yuki 1, Yoshida Shinichi 1, Hosoi Takuji 1, Shimura Takayoshi 1, Watanabe Heiji 1, Shiraishi Kenji 2, Kadoshima Masaru 3, Nara Yasuo 3, Yamada Keisaku 4
	4	Permittivity Enhancement of HfO2 Film by Post Gate-Electrode-Deposition Annealing (PGA) and Influence of Gate Electrode Film	MIRAI-ASET 1, MIRAI-ASRC AIST 2, The Univ. of Tokyo 3　*Watanabe Yukimune 1, Yuuichi Kamimuta 1, Migita Shinji 2, Ogawa Arito 1, Iwamoto Kunihiko 1, Ito Hiromi 1, Ota Hiroyuki 2, Nabatame Toshihide 1, Akira Toriumi 2,3
	5	Stability of Threshold Voltage induced by Thermal Annealing	Inst. of Appl. Phys, Univ. of Tsukuba 1, Semiconductor Leading Edge Technologies 2, TIMS, Univ. of Tsukuba 3　*C. Tamura 1, T. Hayashi 1, M. Sato 2, R. Hasunuma 1,3, K. Yamabe 1,3
	6	Suppression of VFB roll-off in thin EOT region of Metal/HfO2/SiO2 stack	MIRAI-ASET 1,MIRAI-AIST 2,The University of Tokyo　Koji Akiyama 1,Wenwu Wang 2,Wataru Mizubayashi 2, Minoru Ikeda 1, Hiroyuki Ota 2, Toshihide Nabatame 1, Akira Toriumi 2,3
	7	Evaluation of Effective Work Function in Ru/HfSiON/SiO2 Stack Structures - Thickness Dependence in Bottom SiO2 Layer	Grad. School of AdSM, Hiroshima Univ. 1, selete. 2　*Yoshinaga Hiromichi 1, Ohta Akio 2, Murakami Hideki 3, Higashi Seiichiro 4, Miyazaki Seiichi 5, Kadoshima Masaru 6, Nara Yasuo 7
	8	Flatband voltage shift of Pt/High-k gate stacks by annealing in reduction ambient	Shibaura Inst. of Tech. 1,MIRAI-ASET 2, MIRAI-ASRC,AIST 3,The Univ. of Tokyo 4　*Nunoshige Yu 1,Nabatame Toshihide 2,Iwamoto Kunihiko 2,Kamimuta Yuichi 2,Ogawa Arito 2,Hirano Akito 2,Ota Hiroyuki 3,Toriumi Akira 3,4,Ohishi Tomoji 1
		Break 16:15〜16:30
▲	9	Photoemission Study of Ru/HfSiON Gate Stack　-Work Function Change by Low Temperature Anneal	Hiroshima Univ. 1, Selete 2,　Akio Ohta 1, Hiromichi Yoshinaga 1, Hideki Murakami 1, Seiichiro Higashi 1, Seiichi Miyazaki 1, Masaru Kadoshima 2, Yasuo Nara 2
	10	Effective Work Function of Si-based Gate Electrode on Y2O3	MIRAI-ASET 1,MIRAI-ASRC, AIST 2,The Univ. of Tokyo 3　*Kamimuta Yuuichi 1,Iwamoto Kunihiko 1,Ogawa Arito 1,Hirano Akito 1,Itoh Hiromi 1,Watanabe Yukimune 1,Migita Shinji 2,Ohta Hiroyuki 2,Nabatame Toshihide 1,Toriumi Akira 2,3
	11	Dopant segregation effect on effective work function at Ni-FUSI/LaHfO interface	RDC, Toshiba Corp. 1　*Ito Toshihide 1, Tsuchiya Yoshinori 1, Suzuki Masamichi 1, Nishino Hirotaka 1, Koyama Masato 1
	12	Influence of tunnnel current on TDDB in thin HfSiON	Toshiba R&D Center 1, Toshiba Semiconductor Company 2　*Hirano Izumi 1,Yamaguchi Takeshi 1,Fukatsu Shigeto 1,Sekine Katsuyuki 2,Mitani Yuichiro 1
	13	Difference of TDDB characteristics of nMOS in inversion states between Poly-Si and Metal gate electrode	Semiconductor Leading Edge Technologies Inc. 1　Motoyuki Sato 1, Takashi Onizawa 1, Takayuki Aoyama 1, Yasuo Nara 1 and Yuzuru Ohji 1
	14	Trap generation by defects in SiO2 and HfO2	FUJITSU Labs. 1　*Chioko Kaneta 1,Takahiro Yamasaki 1
	15	Reliability degradation via defect formation in High-k gate dielectrics – influence of charge trapping on structural changes in HfSiO4 -	Toshiba Corp. R&D Center 1　*Nakasaki Yasushi 1, Hirano Izumi 1, Kato Koichi 1, Mitani Yuichiro 1
	16	Theoretical analysis of band alignment of metal/HfO2/SiO2/Si system using first-principles calculations	MIRAI-ASET 1,Univ.of Vienna 2, MIRAI-AIST-ASRC 3,Univ. of Tokyo 4　*Minoru Ikeda 1,Georg Kresse 2,Toshihide Nabatame 1,Akira Toriumi 3,4
11.3 Gate Insulator Technology
September 7 9:30〜18:00
7a-ZM-　/ II
	1	Effects of nitrogen incorporation of lanthanum oxynitride dielectrics deposited onto silicon substrates	Seikei Univ. 1　*Ito Masahiko 1, Sato Ryota 1, Saito Yoji 1
	2	Analysis of Leakage Current through Sc2O3 Gate Dielectric Film	Tokyo Tech. FCRC 1,Tokyo Tech. IGSSE 2　*Kouda Miyuki 1,Kawanago Takamasa 1,Kakushima Kuniyuki 2,Parhat Ahmet 1,Tsutsui Kazuo 2,Sugii Nobuyuki 2,Hattori Kazuo 1,Iwai Hiroshi 1
	3	Flat Band Voltage Shift Caused by Incorporation of Sc2O3 at HfO2/SiO2 Interface	Tokyo Tech. FCRC 1,Tokyo Tech.IGSSE 2　*Kamimura Hideyuki 1,Adachi Manabu 1,Kakushima Kuniyuki 2,Parhat Ahmet 1,Tsutsui Kazuo 2,Sugii Nobuyuki 2,Hattori Takeo 1,Iwai Hiroshi 1
	4	Change in electrical characteristics caused by incorporation of La2O3 sub-monolayer at HfO2/Si interface	Tokyo Tech, FCRC, IGSSE　*Okamoto Koichi 1, Adachi Manabu 1, Kakushima Kuniyuki 2, Perhat Ahmet 1, Sugii Nobuyuki 1, Tsutsui Kazuo 2, Hattori Takeo 1, Iwai Hiroshi 1
	5	Interfacial reactions of LaAlO3/SiO2/Si gate stack structures studied by synchrotron radiation photoemission spectroscopy	The Univ. of Tokyo 1, JST-CREST 2, STARC 3　Yasuhara Ryutaro 1, Yoshimatsu Kohei 1, Toyoda Satoshi 1, Kumigashira Hiroshi 1,2, Oshima Masaharu 1,2 Guo-Lin Liu 3, Ziyuan Liu 3, Ikeda Kazuto 3
	6	Electrical Characteristics of Si-MOSFETs with HfO2/La2O3 Gate Dielectric	Tokyo Tech FCRC 1,Musashi Inst Technol. 2,Tokyo Tech IGSSE 3 　*Masafumi Hino 1, Kuniyuki Kakushima 1,ParHat Ahmet 1,Kazuo Tsutsui 1,Nobuyuki Sugii 3,Takeo Hattori 2,Hiroshi Iwai 1
		Break 11:00〜11:15
	7	Electrical characteristics of W/La2O3/Si MOS structure with Al capping layer	Tokyo Tech.FCRC 1,Tokyo Tech.IGSSE 2　*Fujisawa Hiroki 1,Tachi Kiichi 1,Kakusima Kuniyuki 2,Parhat Ahmet 1,TsuTsui Kazuo 2,Sugii Nobuyuki 2,Hattori Takeo 1,Iwai Hirosi 1
△	8	Photoluminescence Induced by Ultraviolet Photons in LaAlO3 Single Crystals	Waseda Univ. 1　*Kanai Kotaro 1,Ohki Yoshimichi 1
△	9	Effects of thermal SiO2 underlayer on electrical properties of Pr-based gate dielectrics grown by MOCVD	QNERC, Tokyo Tech 1, Dept. of E&E Eng., Mi-Tech 2, and ARL, Mi-Tech 3　*Furukawa Ryousuke 1,2, Tsuchiya Yoshishige 1, Nohira Hiroshi 2, Maruizumi Takuya 2, Shiraki Yasuhiro 3, and Oda Syunri 1
	10	The Impact of Post Deposition NH3-Anneal on La Oxide Films Formed by MOCVD Using La(DPM)3	Graduate school of AdSM,Hiroshima Univ. 1.　*Yougauchi Ryo 1. Ohta Akio 1. Munetaka Yuki 1. Murakami Hideki 1. Higashi seiichiro 1. Miyazaki Seiichi 1.
	11	Photoemission Study of Chemical Bonding Features of HfLaxOy films	Hiroshima Univ.　Akio Ohta 1, Ryo Yougauchi 1, Hideki Murakami 1, Seiichiro Higashi 1, Seiichi Miyazaki 1
	12	La concentration dependence of interfacial structure in HfLaOx/SiO2/Si Substrate Stack	Toray Research Center 1, Tokyo University 2　Takashi Yamamoto 1, Hirofumi Seki 1, Takashi Miyamoto 1, Junichi Tsuij 1, Naoyuki Sugiyama 1, Koji Kita 2
		Lunch 12:45〜14:00
7p-ZM-　/ II
	1	Thermal stability of HfO2/Ge structures fabricated by high vacuum EB deposition technique	Musashi Inst. Technol. 1, AIST-NeRI 2　*Abe Yasuhiro 1, Miyata Noriyuki 1,2, Yasuda Tetsuji 2
△	2	Stability against air exposure of Ge3N4 thin layers formed by plasma nitridation	Osaka Univ. 1　Kutsuki Katsuhiro 1, Okamoto Gaku 1, Hosoi Takuji 1, Shimura Takayoshi 1, Watanabe Heiji 1
△	3	In-situ Characterization of Chemical Bonding States and Thermal Decomposition of Ge3N4 Film by SR-XPS	Osaka Univ. 1, JAEA 2　*Hosoi Takuji 1, Kutsuki Katsuhiro 1, Okamoto Gaku 1, Harada Makoto 1, Yoshigoe Akitaka 2, Teraoka Yuden 2, Shimura Takayoshi 1, Watanabe Heiji 1
	4	Effects of initial surface reconstruction on the high-k/III-V interface structure	AIST-NeRI 1, NIMS-QDR 2　Noriyuki Miyata 1, Akihiro Ohtake 2, Tetsuji Yasuda 1
	5	Preparation and photoreflectance characterization of HfO2 thin film on Ge substrate by Photo-MOCVD	Osaka Univ. 1　Yuya Mori 1, Hyun Lee 1, Takeshi Kanashima 1, Masanori Okuyama 1
△	6	Fabrication and Characterization of High-k/Ge Gate Stacks with AlON Dielectrics	Osaka Univ. 1　*Okamoto Gaku 1,Kutsuki Katsuhiro 1,Arimura Hiroaki 1,Harada Makoto 1,Hosoi Takuji 1,Shimura Takayoshi 1,Watanabe Heiji 1
△	7	Evaluation of density in SiN stressor for high mobility LSI	Meiji Univ. 1,JASRI 2,TEL 3　H.Saito 1,D.Kosemura 1,Y.Kakemura 1,H.Kurozaki 1,T.Yoshida 1,M.Takei 1,A.Ogura 1,T.Koganezawa 2,I.Hirosawa 2,M.Kohno 3,T.Nishita 3,T.Nakanisi 3
		Break 15:45〜16:00
	8	Surface Treatment of Ge(001) Surface by Radical Nitridation	Graduate School of Engineering, Nagoya Univ. 1, EcoTopia Science Inst., Nagoya Univ. 2　Hiroki Kondo 1, Misato Fujita 1, Akira Sakai 1, Masaki Ogawa 2, Shigeaki Zaima 1
	9	Experimental Evidence of Coexistence of Ge MIS Interface Traps Interacting with Majority and Minority Carriers	MIRAI-ASRC 1, MIRAI-ASET 2, The Univ. of Tokyo 3　Taoka Noriyuki 1, Yamashita Yoshimi 2, Harada Masaomi 2, Ikeda Keiji 2, Yamamoto Toyoji 2, Sugiyama Naoharu 2, Takagi Shin-ichi 1,3
	10	Effect of MIS interface formation techniques on energy distribution of interface state density in GeO2/Ge MIS structures	Tokyo Univ 1,2　*Matsubara Hiroshi 1, Sasada Takashi 2, Takenaka Mitsuru 2, Takagi Shin-ichi 1,2
	11	Defect control in High-k gate dielectrics - on the germanium-induced defects in HfO2 : characteristics of Ge-interstitial related defects -	Toshiba Corp. R&D Center 1　*Nakasaki Yasushi 1, Kamata Yoshiki 1, Kato Koichi 1, Koyama Masato 1
	12	Characterizations of n-Ge MIS capacitor prepared by ECR plasma irradiation and sputtering	Tokyo Univ. of Science, Suwa 1, Hirosaki Univ. 2, Tokyo Univ. of Agri. & Tech. 3　*Yukio Fukuda 1, Yohei Otani 1, Koji Kato 2, Hiroshi Toyota 2, Toshiro Ono 2, Yoshitaka Nagasato 3, Tomo Ueno 3
	13	The effect of ultrathin interfacial Si layer insertion on electrical characteristics of La2O3/Ge MIS structure	Tokyo Tech. FCRC 1,Tokyo Tech. IGSSE 2　*Song JaeYeol 1, Kakushima Kuniyuki 2, Ahmet Parhat 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1
	14	ARXPS evaluation of Pr-oxide gate dielectrics deposited on Ge substrates	Graduate School of Engineering, Nagoya Univ. 1, Graduate School of Engineering Science, Osaka Univ. 2, EcoTopia Sci. Inst., Nagoya Univ. 3　*Mitsuo Sakashita 1, Nobuyuki Kito 1, Akira Sakai 2, Masaki Ogawa 3, Shigeaki Zaima 1
	15	Influence of Postannealing on Ge-MIS Structures with ECR-derived Insulator Layers	Tokyo Univ. of Science, Suwa 1, Hirosaki Univ. 2　*Yohei Otani 1, Yukio Fukuda 1, Koji Kato 2, Hiroshi Toyota 2, Toshiro Ono 2
11.3 Gate Insulator Technology
September 8 9:15〜12:30
8a-ZM-　/ II
	1	Deposition characteristics of SiNx films by atmospheric pressure plasma CVD using cylindrical rotary electrode	Osaka Univ. 1　*Daisuke Ishimoto 1, Kei Nakamura 1, Yoshihito Yamaguchi 1, Hiromasa Ohmi 1, Hiroaki Kakiuchi 1, Kiyoshi Yasutake 1
	2	Impurity Measurement in Si Oxide Film Formed by Silicone Oil and Ozone Gas at 200C	JAIST Materials 1　*Horita Susumu,Toriyabe Koichi, Nishioka Kensuke
	3	Low temperature fabrication of the high-quality SiOx film by evaporation of SiO nanopowders	Univ. of Electro-Communs 1,Univ. of Electro-Communs 2,Univ. of Electro-Communs 3,Univ. of Electro-Communs 4,Univ. of Electro-Communs 5　*Narisawa Masahiro 1,Kimura Seiji 2,Ono Hiroshi 3,Uchida Kazuo 4,Nozaki Shinji 5
	4	Evaluation of Polysilazane Films Oxidized by Oxygen Radical Treatment	Tokyo University of Agricalture and Technology　*Yuji Urabe 1, Megumu Takiuchi 1, Mitsujiro Shimokawa 1, Toshiyuki Sameshima 1
	5	Analysis of reaction between ozone and hexamethyldisilazane during a photo-CVD process by IR and mass spectrometry	AIST 1, Meidensha Corporation 2　Kameda Naoto 1,2,Nishiguchi Tetsuya 1,2,Nonaka Hidehiko 1, *Nakamura Ken 1, Ichimura Shingo 1
	6	Characteristics of SiO2 Insulator Thin Film Fabricated by Low-temperature Printing Process	Nat. Inst. Adv. Indust. Sci. Tech. 1　*Kodzasa Takehito 1,Uemura Sei 1,Suemori Kouji 1,Yoshida Manabu 1,Hoshino Satoshi 1,Takada Noriyuki 1,Kamata Toshihide 1
		Break 10:45〜11:00
	7	Improvement of property of CVD-SiO2 film using ozone treatment	Mitsubishi Electric Corp. 1　Kazumasa Kawase 1, Seiji Noda 1, Takafumi Nakai 1, Yasushi Uehara 1
	8	Mechanism of Si oxidation at low temperature by using UV-light excited ozone	AIST 1, Meidensha Corp. 2　*Nonaka Hidehiko1 , Tosaka Aki 1, Kameda Naoto 1,2, Nishiguchi Tetsuya 2, Morikawa Yoshiki 2, Kekura Mitsuru 2, Ichimura Shingo 1
	9	Optimizations of UV irradiate condition for Enhancement of SiO2 film growth rate at low temperature by UV light excited ozone.	Meidensha Corporation 1, AIST 2　*Naoto Kameda 1, 2, Tetsuya Nishiguchi 1, 2, Yoshiki Morikawa 1, Mitsuru Kekura 1, Hidehiko Nonaka 2, Singo Ichimura 2
	10	Synthesis of Si insulator film at 200C by UV-light-excited ozone CVD method	Meidensha Corp. 1, AIST 2　*Nishiguchi Tetsuya 1, Kameda Naoto 1,2, Morikawa Yoshiki 1, Kekura Mitsuru 1, Nonaka Hidehiko 2, Ichimura Shingo 2
	11	Oxidation of poly-crystalline Si at 120 C and a decrease in ridge height by use of nitric acid oxidation method	ISIR Osaka Univ. 1　Uragou Masahide 1, Imamura Kentaro 1, Matsumoto Taketoshi 1, Takahashi Masao 1, Kobayashi Hikaru 1
	12	Properties of ~10nm-SiO2/Si structure formed by use of nitric acid oxidation method at 120 C	ISIR, Osaka Univ. 1　Asuha 1, Imamura Kentarou 1, Matsumoto Taketoshi 1, Takahashi Masao 1, Kobayashi Hikaru 1
11.4 Interconnect Technology
September 4 10:00〜18:00
4a-B-　/ II
	1	JJAP Paper Award Carbon Nanotube Growth Technologies Using Tantalum Barrier Layer for Future ULSIs with Cu/Low-k Interconnect Processes	Fujitsu Limited1, Fujitsu Laboratories Ltd2,3　Masahiro Horibe1,2, Mizuhisa Nihei1,3, Daiyu Kondo1,3, Akio Kawabata1,3 and Yuji Awano1,3
	2	Correlation between silicidation reaction and grain size of Ni films in Ni/Si system	Kitami Inst.of Technol　Tetsuya NAKMURA ,Mayumi B.TAKEYAMA ,Atsushi NOYA
	3	The control of Metal-Oxide film removal rate by polishing pad surface	Fujitsu LTD. 1　*Sakamoto Manabu 1, Shirasu Tetsuya 1, Idani Naoki 1, Kase Masataka 1, Miyajima Motoshu 1
	4	Investigation of inhibitor for high removal rate planarization of thick Cu circuit	Kochi Univ. of Technology　*Yoshiyuki Matsumura, Takashi Hirao,
	5	Possibility as copper high removal rate slurry with using etching solution in CMP	kochi Univ. 1　*Nitta Hiroshi 1, Hirao Takashi 1
	6	The property of Cu passivation layer in the slurry with Ammonium PerSulfate	Fujitsu Labs. LTD. 1, Fujitsu LTD. 2　Kanki Tsuyoshi 1, Shirasu Tetsuya 2, Takesako Satoshi 2, Kimura Takahiro 1, Nakamura Tomoji 1, Miyajima Motoshu 2
▲	7	W CMP Planarity observation with different W selectivity	Samsung Electronics 1　*Kim Chaelyoung 1, Kwon B.H 1, Kim J.Y 1, Shin S.H 1, Yoon B.U 1, Hong C.K 1
		Lunch 12:00〜13:00
4p-B-　/ II
	1	Galvanic corrosion of Ru barrier metal CMP for Porous Low-k/Cu interconnects	Semiconductor Leading Edge Technologies 1　*Maruyama Koji 1, Shiohara Morio 1, Yamada Koji 1, Kondo Seiichi 1, Saito Shuichi 1
	2	Evaluation of the corrosion to Cu	Mitsubishi Chem. Co. Semiconductor Materials Lab.　*Ito Atsushi 1, Tokuno Yoshichika 1, Hosokawa Fumio 1, Kawase Yasuhiro 1
	3	Cu Surface Passivation Property after CMP and in-situ Electrochemical Evaluation	Ebara Corp. Precision Machinery 1　*Shohei Shima 1,Akira Fukunaga 1,Manabu Tsujimura 1
△	4	Atomic hydrogen cleaning for Cu surface by HW method using dilution hydrogen	Kyushu Inst. tech. 1　*Abe Kazuki 1,Kagata Satoru 1,Miyazaki Yasuo 1,Izumi Akira 1
	5	Development and Evaluation of Cleaning Equipment for Cu Surface in atmospheric environment	Ebara Corp. 1　Tateishi Hideki 1,Susaki Akira 1,Nakada Tsutomu 1
△	6	Influence of dissolved oxygen to Cu contact cleaning	Process & Manufacturing Engineering Center 1　Yoshimizu Yoshimizu 1, Yoshihiro Uozumi 1, Tsuyoshi Matsumura 1, Hiroshi Tomita 1
	7	Supercritical Cleaning using Fluoro Compounds	NTT Advanced Technology Co. 1, Asahi Glass Co. 2, Hitachi High-Technologies Co. 3　*Hideo Namatsu 1, Kazuhito Sakuma 1, Hidekazu Okamoto 2, Hisayuki Takasu 3
		Break 14:45〜15:00
△	8	Preparation of Low-k Materials Oxidizing of Anodized Si	Univ. of the Ryukyus 1　*Uehara Kazuhiro 1,Sonegawa Tomihiro 1,Maehama Takehiro 1,
△	9	Electrical Reliability of Highly Cross Linked Porous Silica Films	Hiroshima Univ. 1, Mitsui Chemicals Inc. 2　*Kayaba Yasuhisa 1, Kohmura Kazuo 2, Kikkawa Takamaro 1
△	10	Dependence of Electrical Properties of Porous Zeolite Silica Film on Zeolite Content	Hiroshima Univ. RCNS 1, ASRC-AIST 2　*Toshiki Seo 1, Takenobu Yoshino 2, Nobuyoshi Ohnuki 2, Yutaka Seino 2, Nobuhiro Hata 2 and Takamaro Kikkawa 1, 2
	11	Synthesis of porous silica low-k films by hydrothermal and vapor phase transport method	Hiroshima Univ. 1, Mitsui Chem. 2　*Cho Yoshinori 1, Seo Toshiki 1, Kohmura Kazuo 2, Kikkawa Takamaro 1
	12	Quantitative analysis of methyl group in porous organosilica low-k film	ASRC-AIST　Syozo Takada 1, Nobuhiro Hata 1
	13	Development of in-situ ellipsometry of supercritical CO2-Analysis of cleaning process of porous low-k thin films	Yamanashi Univ 1　Aruga Shosaku 1, Ukai Eiiti 1, Kondoh Eiiti 1
	14	Improvement of UV Curing for Porous SiOC (k<2.4) PE-CVD Process in Cu Multilevel Interconnects	Semiconductor Leading Edge Technologies, Inc.1, ASM Japan K.K.2　Junya Nakahira1, Kazuhiro Tomioka1, Eiich Soda1, Manabu Kato2, Shinich Nakao1, Kiyohiro Matsushita2, Keizo Kinoshita1
	15	Effect of plasma exposure on SiOCH film stress and mechanical strength.	Sony Corp. 1　*Masanaga Fukasawa 1,Yukinobu Hashimoto 1, Masahisa Taguchi 1, Kazuhiro Nagahata 1, Tetsuya Tatsumi 1, Yukihiro Kamide 1
	16	Characterization of the Low-k damage in Cu/Low-k line-and-space structures.	Toray Research center Inc.　*Seki Hirofumi1,Shimizu Yumiko1,Inoue Keiko1,Otsuka Yuji1,Hashimoto Hideki1
	17	Evaluation of Adhesion between UV cured SiOC films and Si substrate with Nano indentation method	Toray Research Center Inc. 1　*Masaaki Takeda 1,Yumiko Shimizu 1,Nobuhiro Matoba 1,Manabu Oishi 1,Hideki Hashimoto 1
▲	18	Development of Lateral Interconnection Technology with High Step Coverage Extending Over Chip	Advanced Bio-Nano Devices Lab., Division of Mechanical Engineering, Tohoku University 1, The New Energy and Industrial Technology Development Organization 2　JI Shiyang 1 2,Kino Hisashi 1, Fukushima Takafumi 1, Tanaka Tetsu 1, Koyanagi Mitsumasa 1
	19	Surface Treratment of Gold Electrodes in MEMS Devices for Anti-sticking Film Formation by Electrodeposition	NTT Microsystem Integration Labs. 1, NTT-AT 2　*Sakata Tomomi 1, Okabe Yuichi 1, Kuwabara Kei 1, Ono Kazuyoshi 1, Sato Norio 1, Kudou Kazuhisa 2, Machida Katsuyuki 2, Ishii Hiromu 1
11.4 Interconnect Technology
September 5 9:00〜12:00
5a-B-　/ II
△	1	Electrical properties of CNT vias planarized by chemical mechanical polishing	Waseda Univ. 1,MIRAI-Selete 2　*Ishimaru Kentaro 1,Yokoyama Daisuke 1,Iwasaki Takayuki 1,Sato Shintaro 2,Hyakushima Takashi 2,Nihei Mizuhisa 2,Awano Yuji 2,Kawarada Hiroshi 1
△	2	Realization of intermixing free ZrN barrier in Cu/ZrN/SiOC/Si system	Kitami Inst. of Technol 1, Tohoku Univ. IMR 2　*Masaru Sato 1, Mayumi B. Takeyama 1, Eiji Aoyagi 2, Atsushi Noya 1
	3	Barrier properties of TiNx by new deposition method with radical nitriding	Kitami Inst. of Technol. 1, Tohoku Univ. IMR 2　*Mayumi B. Takeyama 1, Masaru Sato 1, Eiji Aoyagi 2, Atsushi Noya 1
	4	Dependency of PE-ALD Ru films growth on PVD-TaN on Ru precursor and growth temperatures	Semiconductor Leading Edge Technologies, Inc. 1,ASM Japan K.K. 2　*Namba Kunitoshi 1,Hosoi Nobuki 1,Tarumi Nobuaki 1,Shinriki Hiroshi 2,Ogawa Shinichi 1
△	5	Reduction kinetics of Mn content from Cu-Mn alloy layer for self-forming barrier process	Tohoku Univ. 1, JST 2　*Iijima Jun 1,2, Fujii Yoshito 1, Neishi Koji 1, Koike Junichi 1
	6	Correlation Between Cu Orientation and Pd Deposition	Ebara Co.　*Yasuda Shingo 1, Shima Shohei 1, Owatari Akira 1
		Break 10:30〜10:45
	7	Evaluation of Atomic defects in Cu Thin Films using Positron Beam Method	Toray Research Center 1, AIST 2　*Hosomi Hiroyuki 1, Yamane Tsuneyuki 1, Ohdaira Toshiyuki 2, Suzuki Ryoichi 2
	8	Evaluation of interface adhesion strength of Cu line using　nanoscratch test	Tohoku Univ. 1　*Shishido Yuichiro 1, Koike Jun-ichi 1
	9	Effects of Material and Structure of 45nm-Interconnect and PBGA/QFP on Packaging Reliabilities	NEC 1, Sumitomo bakelite 2 　Naoya Inoue 1,Masayoshi Tagami 1, Fuminori Ito 1, Tsuneo Takeuchi 1, Shinobu Saito 1, Naoya Furutake 1, Makoto Ueki 1, Ttatsu Suzuki 2, Yoshihiro Hayashi 1
	10	Evaluation of time dependence dielectric breakdown for LSI Cu interconnects	Tohoku Univ. 1　*Neishi Koji 1, Tadano Satoshi 1, Iijima Jun 1, Koike Junichi 1
	11	Improvement of SIV resistance of barrier-free interconnects	CASMAT 1, Sumitomo Bakelite 2　*Maeda Nobuhide 1, Takimoto Yoshio 1, Sakamoto Yoshinori 1, Tada Masahiro 1, Nakajima Michio 2, Funatsu Keisuke 1
11.5 Si Process Technology
September 4
4a-P2-　/ II
		Poster Session 4a-P2-1〜25　9:30〜11:30
	1	DOF expansion of laser crystallization characteristics by off-axis illumination	Advanced LCD Technologies Development Center Co.,Ltd.　*Taniguchi Yukio,Endo Takahiko,Azuma Kazufumi,Matsumura Masakiyo
	2	Novel Characterization Method of Nucleation and Growth Dynamics of Si Using Excimer Laser Crystallization	ALTEDEC 1　*Kato Tomoya 1, Endo Takahiko 1, Shimoto Shigeyuki 1, Taniguchi Yukio 1, Azuma Kazufumi 1, Matsumura Masakiyo 1
	3	Dramatic Enlargement of Excimer-Laser Crystallized Grains	ALTEDEC　Shimoto Shigeyuki 1, Kato Tomoya 1, Endo Takahiko 1, Ohno Takashi 1, Taniguchi Yukio 1, Azuma Kazufumi 1, Matsumura Masakiyo 1
	4	Characterization of two-dimensional large grain of Si growing from a single nucleus	ALTEDEC 1　*Endo Takahiko 1, Katou Tomoya 1, Shimoto Shigeyuki 1, Taniguchi Yukio 1, Ohno Takashi 1, Azuma Kazufumi 1, Matsumura Masakiyo 1
	5	Formation of Poly-Si Film with High Crystalline Fraction by ELA of a-Si Film with Hydrogen Modulation-Doped Layer	Univ. of Hyogo1, Osaka Univ.2　Yamaguchi Univ.3 　*Akira Heya1, Tadashi. Serikawa2, Naoya Kawamoto3, Naoto Matsuo1
	6	Formation of crystallized Si film by ELA on plastic substrate	Univ. of Hyogo 1,JAIST 2,Yamaguchi Univ. 3　*Akitsu Shogo 1,Heya Akira 1,Kawamoto Naoya 3,Nishizaki Shogo 2,Ohdaira Keisuke 2,Matsumura Hideki 2,Naoto Matsuo 1
	7	Influence of laser-plasma x-ray irradiation on crystallization of a-si film by excimer laser annealing	Univ.Hyogo 1,LASTI Univ.Hyogo 2,NIPPON GIJUTSUCENTER 3,MEISYO KIKO 4 　*Takanashi Yasuyuki 1,Heya Akira 1,Amano Syou 2,Uejyukkoku Kazuya 1,Miyamoto Syuji 2,Takesako Ryoichi 3,Adachi Masashi 4,Matsuo Naoto 1,Mochizuki Takayasu 2
△	8	Evaluation of poly-Si thin film crystallized by solid green laser annealing using UV/Visible Raman spectroscopy (2)	Meiji Univ. 1, IHI corp. 2　Yasuto Kakemura 1, Daisuke Kosemura 1, Hiroyuki Saito 1, Tetsuya Yoshida 1, Atsushi Ogura 1, Miyuki Masaki 2, Kenichirou Nishida 2, Ryusuke Kawakami 2, Naoya Yamamoto 1 2
	9	Ion channeling effect and solid phase crystallization on lateral recrystallized Si thin films	Tohoku Univ. 1　*Fujii Shuntaro 1, Kuroki Shin-Ichiro 1, Kotani Koji 1, Takashi Ito 1
	10	Characterization of chemical mechanical polishing on CW laser recrystallized Si thin films	Tohoku Univ. 1　*Numata Masayuki 1, Kuroki Shin-Ichiro 1, Kotani Koji 1, Ito Takashi 1
	11	Evaluation of Defect Density in Si Films Crystallized by Thermal Plasma Jet Irradiation (II)	Grad. School of Advanced Sciences of Matter, Hiroshima Univ. 1　*Yorimoto Takuya 1, Higashi Seiichiro 1, Kaku Hirotaka 1, Okada Tatsuya 1, Murakami Hideki 1, Miyazaki Seiichi 1,
	12	Atmosphere Dependence of Silicon Crystallization by Microwave Annealing	Univ. of Yamanashi 1,Renkei 2,Musashi Inst. of Tech. 3　*Ashizawa Satoki 1,Mitsui Minoru 1,Arimoto Keisuke 1,Yamanaka Junji 1,NakagawaKiyokazu 1,Arai Tetsuji 2,Takamatsu Toshiyuki 2,Sawano Kentaro 3, Shiraki Yasuhiro 3
▲	13	Rapid crystallization of a-Si films using RF thermal plasma torch	Saitama Univ. 1, RIKEN　2　*Haruta Koji 1, Yeo MinA 1, Takemura Yuichiro 1, Kobayashi Tomohiro 2,Shirai Hajime 1
	14	Noncontact Measurement of Si Wafer Surface Temperature in Millisecond Thermal Annealing	Graduate School of AdSM, Hiroshima Univ.　*Furukawa Hirokazu 1, Higashi seiichirou 1, Okada Tatsuya 1, Kaku Hirotaka 1, Murakami Hideki 1, Miyazaki Seiichi 1
	15	Investigation of crystallinity of depth of poly-Si thin films formed by flash lamp annealing	Jpn. Adv. Inst. Sci. & Tech.　*Tomoko Fujiwara ,Yohei Endo ,Shogo Nishizaki ,Keisuke Ohdaira ,Hideki Matsumura
	16	High pressure water vapor annealing of poly-Si thin film formed by flash lamp annealing	Jpn. Adv. Inst. Sci. & Tech.　*Yohei Endo,Tomoko Fujiwara,Shogo Nishizaki,Keisuke Ohdaira,Hideki Matsumura
△	17	Development of bottom-gate poly-Si TFT by Flash Lamp Annealing (2)	Jpn. Adv. Inst. Sci. & Tech (JAIST)　*Nishizaki Shogo 1,Endo Yohei 1, Fujiwara Tomoko 1, Ohdaira Keisuke 1, Matsumura Hideki 1
	18	Poly-Si thin film fabrication by positioned crystalline nucleus using patterned Ni-Ferritin	NAIST 1, Matsushita Electric Industrial Co, Ltd.　*Ochi Masahiro, Sugawara Yuuta, Miura Atushi, Uraoka Yukiharu, Fuyuki Takashi, Nishio Kazuaki, Yamashita Ichiro
△	19	Low temperature poly-Si TFT flash memory with bio nano dot	NAIST　1, ATRL, Matsushita Electric Co. Ltd.　2,　K. Ichikawa　1, H.Yano　1, T.Hatayama　1, Y. Uraoka　1, T. Fuyuki　1 and I.Yamashita　1, 2
	20	Deep-UV Raman Scattering Analysis of Re-Crystallization in Ultra-Shallow Junction Implanted Si under Various Annealing Conditions	Kyoto Inst. Tech. 1, Wakayama Univ. 2, WaferMasters,Inc. 3　*Sasaki Takashi 1, Minami Hiroaki 1, Hasuike Noriyuki 1, Harima Hiroshi 1, Kisoda Kenji 2, Isshiki Toshiyuki 1, Yoshimoto Masahiro 1, Woo Sik Yoo 3
	21	UV-VIS Raman characterization of ultra-shallow implanted Si before and after excessive annealing	Kyoto Inst. of Tech. 1,Wakayama Univ. 2,Wafer Masters,Inc. 3 　*Minami Hiroaki 1, Sasaki Takashi 1, Hasuike Noriyuki 1, Harima Hiroshi 1, Kisoda Kenji 2, Yoshimoto Masahiro 1, Woosik Yoo 3
	22	Fabrication of Tunneling Dielectric TFT with Very Thin SiNx Films	Univ. of Hyogo 1, Hiroshima Univ. 2　*Fukushima Atsushi 1,Heya Akira 1,Ohkura Kensaku 2,Yokoyama Shin 2,Matsuo Naoto 1
	23	SOI, UTB	KwangWoon Univ.　Kim KwanSoo 1, Jung MyungHo 2, Cho WonJu 3
	24	A Study on Variability in Laterally Grown poly-Si TFTs	Kyushu Univ. 1　*Watanabe Kazunori 1, Akiyama Koji 1, Nakagawa Gou 1, Asano Tanemasa 1
	25	Relationship between substrate current and hot-carrier degradation in low temperature short-channel poly-Si TFTs	Tokyo Polytech. Univ. 1　Hirata Seishiro 1,Takashiba Noriyoshi 1,Satoh Toshifumi 1,*Tango Hiroyuki 1
11.5 Si Process Technology
September 5
5a-P6-　/ II
		Poster Session 5a-P6-1〜15　Poster Session 9:30〜11:30
	1	Dopant boron activation in tapered Si surface by laser annealing	Fuji Electric Device Technology Co. Ltd. 1　*Yasuhisa Souma 1, Kazuo Shimoyama 1, Satie Fujioka 1,and Haruo Nakazawa 1
	2	Impurity Doping using Doped-SOG by Continuous Wave Green Laser	Tohoku Univ.　*Yingdong Jiang 1, Shin-Ichiro Kuroki 1, Koji Kotani 1, Takashi Ito 1
	3	Drastic Activation of Boron in Si film using ELA for High-Performance TFT	Univ. of the Ryukyus 1, SEN Corp. an SHI and Axcelis Company 2　T. Noguchi 1, K. Kawai 1, J. Kakazu 1, E. Kinjo 1, R. Nakamura 1, T. Miyahira 1, T. Suzuki 2, M. Satou 2,
	4	Characterization of Boron/Phosphorus layer by Cold/Heat Ion Implantation(IV)	Fuji Electric Device Technology Co.,Ltd　Nakazawa Haruo 1,Souma Yasuhisa 1,Kirisawa Mitsuaki 1
	5	Dopant Activation in Si films in Millisecond Rapid Thermal Annealing Induced by Thermal Plasma Jet Irradiation	Grad. School of Advanced Sciences of Matter, Hiroshima Univ. 1 　*Hirotaka Kaku 1, Seiichiro Higashi 1, Hirokazu Furukawa 1, Tatsuya Okada 1, Takuya Yorimoto 1, Hideki Murakami 1, Seiichi Miyazaki 1
△	6	Study of Hole mobility depth profiles in ultra shallow boron doped layers	Tokyo Tech. 1 2, Musashi Inst. of Tech. 3, JASRI/Spring-8 4, UJT Lab. 5　*M. Watanabe 1, T. Matsuda 3, Y. Kobayashi 1, S. Sato 2, H. Nohira 3, E. Ikenaga 4, C. G. Jin 5, K. Okashita 5, Y. Sasaki 5, P. Ahmit 2, K. Kakushima 1, B. Mizuno 5, T. Hattori 2, K. Tsutsui 1, H. Iwai 2
	7	Effect of implantation dose on dopant activation of boron implanted poly-Si films.	Kochi Univ. of Tech.　Mamoru Furuta, Takashi Hirao
△	8	The Effects of Flash Lamp Annealing on the Performance of Metal/High-k Gate Stacks.	Selete　*Onizawa Takashi 1, Kato Shinich 1, Aoyama Takayuki 1, Nara Yasuo 1
	9	Study of the Dopant Activation Characteristics of Ultra-shallow Junctions Formed by Flash Lamp Annealing	Semiconductor Leading Edge Technologies, Inc.　*Shinichi Kato 1, Takashi Onizawa 1, Takayuki Aoyama 1, Yasuo Nara 1,Yuzuru Ohji 1
	10	Direct observation of silicon enhanced self-diffusion in silicon-implanted and annealed silicon isotope superlattices	Keio Univ. 1, NTT-AT 2　Yasuo Shimizu 1, Akio Takano 2, Masashi Uematsu 1, Kohei M. Itoh 1
	11	The Influence of SiO60 Films on B Diffusion in Si Substrates	Keio Univ. 1,Selete 2　*Kawamura Yoko 1,Naganawa Miki 1,Shimizu Yasuo 1,Uematsu Masashi 1,Itoh Kohei 1,Ito Hiroyuki 2,Nakamura Mitsutoshi 2,Ishikawa Hideaki 2,Oji Yuzuru 2
	12	Ordered impurity atom arrays using nano-scale hole array mask	Waseda Univ 1, ASMeW 2, Waseda INN 3,Waseda ZAIKEN 4 　○T. Kurosawa 1,T. Shinada 2,M.hori 1,N. Shimamoto 3,I.Ohdomari 1,2,3,4
	13	Effect of Oxygen atoms on Carrier concentration of Si wafer irradiated with He ions	Fuji Electric Dev. Tech. Co, Ltd. 1　*Michio Nemoto 1, Haruo Nakazawa 1
	14	Characterization of Defects Induced in n-Type Silicon by Hydrogen Implantation	Aichi Institute of Technology 1　Terashima Hiroshi 1,Nagae Yoichi 1,*Tokuda Yutaka 1
	15	Development of Surface Hall Potentiometry on Semiconductor Materials	Graduate School of Engineering, Osaka Univ. 1　*Yuji Hidaka 1,Junichi Uchikoshi 1,Mizuho Morita 1,Kenta Arima 1
11.5 Si Process Technology
September 6
6a-P10-　/ II
		Poster Session 6a-P10-1〜38　9:30〜11:30
△	1	Development of Numerically Controlled Sacrificed Oxidation Using Atmospheric Pressure Plasma	Osaka Univ. 1.　Masuda Takaya 1. Sano Yasuhisa 1. Mimura Hidekazu 1. Yamauchi Kazuto 1.
△	2	Evaluation of SSOI on BPSG structure fabricated by strain introduction with stressor on Si thin film	Meiji Univ. 1,UCLA 2　*Kurozaki Hirotaka 1,Kosemura Daisuke 1,Ogura Atsushi1,Ya-Hong Xie 2,Jeehwan Kim 2
△	3	Evaluation of super-critical thickness strained-Si on insulator (sc-SSOI) substrate.	Meiji University 1,Osaka University 2,JASRI 3　*Yoshida Tetsuya 1,Kosemura Daisuke 1,Kakemura Yasuto 1,Takei Munehisa 1,Saito Hiroyuki 1,Ogura Atsushi 1,Simura Takayoshi 2, Koganezawa Tomoyuki 3,Hirosawa Ichiro 3
	4	Characterization of Carrier Lifetime for Semiconductor by Contactless Capacitance-Frequency Method	Univ. of Hyogo 1　Yamazaki Motohiro 1, Kawabata Makoto 1, Yoshida Haruhiko 1, Mori Hidenobu 1, Satoh Shinichi 1
	5	A Study on Uniform Ultrathin SOI/BOX Layer Formation by SBSI Process	Tokyo Tech 1, SEIKO EPSON Corp 2　K Notake 1, K Kanemoto 2, J Kato 2, S Ohmi 1
	6	Gas Flow in a Single-Wafer High-Speed Rotation Silicon Epitaxial Reactor	Yokohama National Univ. 1, New Flare Tech. 2　*Yusuke Takai 1, Hitoshi Habuka 1, Hironobu Hirata 2, Shin-ichi Mitani 2
	7	Quartz Glass Etching Using ClF3 Gas	Yokohama Nat. Univ. 1, Kanto Denka Kogyo 2　*Yu Kasahara 1, Hitoshi Habuka 1, Yuan Gao 2, Katsuya Fukae 2
	8	Temperature Evaluation through SOI Wafer during Flash Lamp Annealing	Yokohama National Univ.　Akiko Hara 1, *Hitoshi Habuka 1 , Yu Kasahara 1
	9	Process-induced shift of Vfb-EOT in TaSiN/HfSiON gate stack and its suppression	Semiconductor Leading Edge Technologies, Inc.　*Morooka Tetsu 1, Mise Nobuyuki 1, Eimori Takahisa 1, Nara Yasuo 1
	10	Application of CVD TaSixNy Gate Electrode to High-k Dielectric MOSFET with Gate First Process	Semiconductor Leading Edge Technologies Inc.　*Sugita Yoshihiro, Aoyama Takayuki, Nara Yasuo
△	11	Nitrogen Gas Flow Ratio Dependence on the Electrical Characteristics of Sputtered TiN Metal Gate MOSFETs	Meiji Univ. 1, AIST 2　*Hayashida Tetsuro 1, Liu Yongxun 2, Matsukawa Takashi 2, Endo Kazuhiko 2, Ouchi Shinichi 2, Sakamoto Kunihiro 2, Masahara Meishoku 2, Ishii Kenichi 2, Tsukada Junichi 2, Ishikawa Yuki 2, Yamauchi Hiromi 2, Ogura Atsushi 1, Suzuki Eiichi 2
	12	Interface Structures and Workfunctions of Doped Pd2Si FUSI gates	RCNS, Hiroshima Univ. 1, ADSM, Hiroshima Univ. 2　*Hosoi Takuji 1, Ohta Akio 2, Shiraishi Hiroyuki 1,2, Miyazaki Seiichi 2, Shibahara Kentaro 1,2
	13	Control on Crystal Structures of Metal Gate Materials by C-Incorporation	Waseda Univ. 1, Osaka Univ. 2, NIMS 3 　*Kenji Ohmori 1, Takuji Hosoi 2, Heiji Watanabe 2, Keisaku Yamada 1, Toyohiro Chikyow 3
	14	Fabrication of NiSi FUSI MOS Structure Using Ni-rich Silicide	Research Center for Nanodevices and Systems 1, and Grad. School of ADSM 2, Hiroshima Univ.　Masafumi Tanaka 1,2Kentaro Shibahara 1,2
	15	Evaluation of Ru film by new Ru complex as CVD precursor	Ube Industries, Ltd.　*Kadota Takumi 1, Hasegawa chihiro 2, Kanato Hiroki 3, Nihei Hiroshi 4
	16	Ruthenium film deposition by metal chloride reduction plasma CVD	PhyzChemix 1, Osaka Univ. 2, Yamagata Univ. 3　*Tomita Yugo 1, Mitake Yoshihiko 1, Sakamoto Hitoshi 1, Watanabe Heiji 2, Hirose Fumihiko 3
	17	Low-temperature nickel silicide formation on SiO2 films with a Cl plasma containing NiCl	Yamagata　Univ.　1, PhyzChemix　2　Fumihiko Hirose 1, Naoto Fujiwara 1, Yugo Tomita 2, Hitoshi Sakamoto 2
△	18	Chemical Vapor Deposition of Ni-Pt thin film using Pt(PF3)4 and Ni(PF3)4.	Meiji Univ. 1, Tri Chemical Lab Inc. 2, Toyota Tech. Inst. 3　*Imai Satoshi 1, Ogura Atushi 1,Ishikawa Masato 2,Muramoto Ikuyo 2,Machida Hideaki 2,Ohshita Yoshio 3
	19	NiSi2 phase formation at low temperature with Co insertion	Toray Research Center Inc. 1　*Masahiro Saito 1, Kazuyuki Okada 1, Takashi Yamamoto 1, Naoyuki Sugiyama 1
	20	Annealing-Temperature Dependence of NiSi/p-Si Shottky Barrier Height with Thin Er Interlayer	Tokyo Tech.FCRC 1,Tokyo Tech.IGSSE 2　*Noguchi Kohei 1,Yoshihisa Ohishi 1,Kakushima Kuniyuki 2,Parhat Ahmet 1,Tsutsui Kazuo 2,Sugii Nobuyuki 2,Hattori Takeo 1,Iwai Hiroshi 1
	21	Fabrication of bi-axially oriented silicon thin films on glass substrates	Kagoshima Univ. 1　*Toshiya Doi 1, Asuka Kaneda 1, Shota Hamazaki 1, Koshiro Nakagawa 1, Yoshinori Hakuraku 1
▲	22	Etching Profile Characteristics of ICP Pre-etched Micro Cavities on (111) Silicon Wafer	Nagoya University　1, Wakayama University　2, Tohoku University　3　Ju Hui 1, Ohta Takayuki 2, Ito Masafumi 2,Sasaki Minoru 3,Hane Kazuhiro 3, Hori Masaru 1
	23	Fabrication of Back-illuminated photodiode using Anodization of Si	Kyushu Univ. 1,Kumamoto Technology and Industry Foundation 2　*Yutaka Iwasaki 1,Naoya Watanabe 2,Tanemasa Asano 1
	24	Investigation On The Fabrication Of Bistable Prestressed Curved-Beam	Kyushu Univ.　*I.Z. Pane, Tanemasa Asano
△	25	Highly accurate chip transfer method for LCD (MAT - LCD) performing pixel control by micron-sized chips	JAIST1.LINTEC Corp2.　*Takayuki Shuto1.Tatsuo Fukuda2.Ryohei Ishizuka1.Keisuke Ohdaira1. Hideki Matsumura1.
△	26	Formation of Polycrystalline Si Thin Films Using Nanocrystalline Ge Nuclei (II)	Osaka Univ. 1　*Yoshimoto Chiaki 1,Minami Kousuke 1,Ohmi Hiromasa 1,Shimura Takayoshi 1,Kakiuchi Hiroaki 1,Watanabe Heiji 1,Yasutake Kiyoshi 1
	27	Ge n+/p Junction Formation by low dose Xe+ Preamorphization Implantation	Research Center for Nanodevices and Systems 1, and Grad. School of ADSM 2, Hiroshima Univ.　Tetuya Fukunaga 1,2, Kentaro Shibahara 1,2
	28	Al-induced crystallization of SiGe on insulator substrate	Dept. Electronics Kyushu Univ. 1　*Tsumura Yoshitaka 1, Nakao Isakane 1, Kenjo Atsushi 1, Sadoh Taizoh 1, Miyao Masanobu 1
	29	In-situ Observation of Milisecond Phase Transformation of Amorphous Ge:H Films Induced by Semiconductor Diode Laer Irradiation	Graduate School of AdSM, Hiroshima univ.　*Sugakawa Kenji 1, Higashi Seiichirou 1, Kaku Hirotaka 1, Okada Tatuya 1, Murakami Hideki 1, Miyazaki Seiichi 1
	30	Towards fabrication of large-area Poly-SiGe thin films by Reactive Thermal CVD	Imaging Science and Engineering Lab., Tokyo Institute of Technology　Yoshiki Shimodaira 1, Jun-ichi Hanna 2
	31	Fabrication of poly-SiGe by Reactive Thermal CVD from Si2H6 and GeF4 　at high temperatures	Imaging Science and Engineering Lab., Tokyo Institute of Technology　Hosoi Tsutomu 1,Hanna Junichi 1
	32	SiGe, TFT, mobility	KwangWoon Univ. 1　Jung MyungHo 1, Kim KwanSoo 2, Cho WonJu3
	33	Surface roughness dependence on B concentration on epitaxially grown B-doped SiGe	Nagaoka Univ. 1,Toshiba Corp. Semiconductor Co. 2　*Tsuchida Ryutaro 1,Uchitomi Naotaka 1,Mori Shinji 2,Sato Tsutomu 2,Mizushima Ichiro 2
	34	Mechanism of Stress Enhancement of High Tensile PECVD SiN film	Fujitsu Ltd. 1　*Sugimoto Ken 1, Owada Tamotsu 1, Ohara Naoki 1, Watatani Hirofumi 1, Yanai Kenichi 1, Nakaishi Masafumi 1
	35	Photoluminescence of SiOx Films Annealed by Thermal Plasma Jet Induced Ulotrarapid Annealing	Hiroshima Univ. 1　*Okada Tatsuya 1, Higashi Seiichiro 1, Kaku Hirotaka 1, Yorimoto Takuya 1, Murakami Hideki 1, Miyazaki Seiichi 1
	36	Effect of Ar Excimer Light Irradiation on Silicon Oxide Thin Film Formed by Reaction of Spin Coated Organosilicon Polymer and Low Concentration Ozone Gas at Low Temperature	Jpn. Adv. Inst. of Sci. and Tech. 1　*Kensuke Nishioka 1, Susumu Horita 1
	37	Size control of In catalyst using hydrogen radicals for fabricating silicon nanowires	Tokyo Univ of Agri. & Tech. 1 ,Nippon Inst of Tech. 2　*Yoshihiro Tomitsuka 1,Tasuku Suzuki 1,Ryouta Takeuchi 1,M.S.Jeon 1,Minoru Aoyagi 2,Kouichi Kamisako 1
	38	Fabrication and Evaluation of Silicon Nanowires Using Hydrogen Radicals	Tokyo University of Agri. & Tech. 1　*Takeuchi Ryota 1,Suzuki Tasuku 1,Tomituka Yoshihiro 1,Zenn Minson 1,Kamisako Kouichi 1
11.6 Si Devices/Integration Technology
September 5 13:30〜17:30
5p-ZE-　/ II
	1	Transfer Current Measurement for Extracting Capacitive Parameters in Nanometer-Scale MOSFET	Shizuoka Univ. 1, NTT Basic Research Labs. 2　*Inokawa Hiroshi 1, Fujiwara Akira 2, Nishiguchi Katsuhiko 2, OnoYukinori 2, Satoh Hiroaki 1
	2	Fabrication of beam structure and characterization of the pull-in operation for Suspended-Gate MOSFET application	QNERC, Tokyo Tech 1, CRL, Hitachi Ltd. 2, Southampton Univ. and Tokyo Tech 3, SORST-JST 4　*Shibamura Junpei 1, Benjamin Pruvost1, Tsuchiya Yoshishige1,4, Usami Kouichi1, Saito Shinichi2,4, Mizuta Hiroshi3,4, Oda Shunri1,4
▲	3	Study and Comparison of Movable Gate Single-Electron Transistors	QNERC, Tokyo Tech 1, Southampton Univ. and Tokyo tech 2, SORST-JST 3　*Pruvost Benjamin 1, Hamre Sverre 1, Mizuta Hiroshi 2,3, Oda Shunri 1,3
▲	4	Single Crystal Small Diameter Silicon Nanowire Synthesis from Si2H6 at Low Temperature	QNERC, Tokyo Tech. 1, Southampton Univ. and Tokyo Tech. 2, SORST-JST 3　○ Saeed Akhtar 1, A. Tanaka 1, K. Usami 1, Y. Tsuchiya 1,3, H. Mizuta 2,3, and S. Oda 1,3
	5	Transconductance enhancement of nanowire FETS by built-up stress during thermal oxidation (1)	Waseda Univ. 1, Waseda nano Inst. 2, Waseda Zaiken 3, Meiji Univ. 4　Aya Seike 1, Tomoyuki Tange 1, Itsutaku Sano 1, Yuuki Sugiura 1, Daisuke Kosemura 4, Atsushi Ogura 4, and Iwao Ohdomari 1,2,3
△	6	Transconductance enhancement of nanowire FETs by built-up stress during thermal oxidation.	Waseda Univ. 1, Waseda Zaiken 2 　Tomoyuki Tange 1, Yuuki Sugiura 1, Ikushin Tsuchida 1, Itsutaku Sano 1, Aya Seike 1, Iwao Ohdomari 1,2
	7	Ge wire MOSFET fabricated by three-dimentional Ge condensation technique	MIRAI-ASET 1, MIRAI-AIST 2　Irisawa Toshifumi 1, Numata Toshinori 1, Hirashita Norio 1, Moriyama Yoshihiko 1, Nakaharai Shu 1, Tezuka Tsutomu 1, Sugiyama Naoharu 1, Takagi Shin-ichi 2
		Break 15:15〜15:30
	8	Simulation on the electric conduction of semiconductor with arrayed dopant	Waseda Univ. 1, Waseda Nano Inst. 2, ASMeW 3, Osaka Univ. 4, Waseda Zaiken 5　T.Terunuma 1,T.Watanabe 123,T.Shinada 3,Y.Kamakura 4,K.Taniguchi 4, I.Ohdomari 1235
	9	Source/Drain Electrodes for Ballistic Transport Devices	Univ. Tsukuba 1　*Natori Kenji 1
	10	Analysis of transmission probability through potential barrier of the gated shottokey junction	Univ. of Tsukuba,Inst. of Appl. Phys.　*ohya Atsushi 1,Natori Kenji 1
	11	Low-energy electron emission from an inversion layer of a Si/SiO2/Si structure	NTT Basic Research Labs., 　*Nishiguchi Katsuhiko 1, Nagase Masao 1, Yamaguchi Toru 1, Fujiwara Akira 1, Yamaguchi Hiroshi 1
△	12	Fabrication of Si MOSFET on SOI substrate with SiC	Kyoto Institute of Technology 1　*Hiroshi Shinohara 1, Masahiro Yoshimoto 1
	13	Low on-resistance power MOS for automotive intelligent power IC	Denso Corp.　*Okuno takuya 1, Takahasi Shigeki 1, Nakayama Yoshiaki 1
	14	Technology Trend of Soft Errors in Latches	Fujitsu Lab. 1, Osaka Univ. 2　Taiki Uemura 1, Yoshiharu Tosaka 1, Shigeo Satoh 1, Keiji Takahisa 2, Kichiji Hatanaka 2
△	15	Ab-initio phonon analysis for ultra thin silicon films	QNERC, Tokyo Tech. 1 , Nagoya Univ. 2 , Mechanical Research Lab., Hitachi Ltd. 3, Southampton Univ. and Tokyo Tech 4　*Shunichiroh Sawai 1, Satoshi Higashijima 1, Shigeyasu Uno 2, Masakuni Okamoto 3, Yoshishige Tsuchiya 1, Hiroshi Mizuta 4, Shunri Oda 1
11.6 Si Devices/Integration Technology
September 6 9:15〜12:00
6a-ZE-　/ II
	1	Characterization of point defects in fluorine implanted DRAM cells by electrically detected magnetic resonance	Univ. of Tsukuba 1, Elpida Memory 2　Junichi Osaki 1, Takahide Umeda 1, Kensuke Okonogi 2, Kiyonori Ohyu 2
	2	Endurance Property with Sub-100uA-Reset Current Operation Using 1Tr-1R Memory Cell of NiO-ReRAM	FUJITSU LAB. LTD.　*Yoshihiro SATO, Koji TSUNODA, Kentaro KINOSHITA, Hideyuki NOSHIRO, Masaki AOKI and Yoshihiro SUGIYAMA
	3	Memory Characteristics of MOS capacitor with tungsten nano-dot floating gate	International Advanced Research and Education Organization, Tohoku Univ.1, Department of Bioengineering and Robotics, Tohoku Univ.2　Pei Yanli1, Fukushima Takafumi2, Tanaka Tetsu2, and Koyanagi Mitsu2
	4	Charge Injection Characteristics of NiSi-Dot/ Silicon-Quantum-Dot Stacked Floating Gate in MOS Capacitors	Grad. School of ADSM, Hiroshima Univ.,　*Matsumoto Ryuji 1, Ikeda Mitsuhisa 1, Makihara Katsunori 1, Okada Tatsuya 1, Shimanoe Kazuhiro 1, Higashi Seiichiro and Miyazaki Seiichi
	5	Fabrication and characterization of macroscopic polarized stack diode including double floating gates	QNERC, Tokyo Tech 1, Southampton Univ. and Tokyo Tech 2　*Tomoyuki Kurihara 1, Hiroki Niikura 1, Yoshishige Tsuchiya 1, Hiroshi Mizuta 2, Shunri Oda 1
		Break 10:30〜10:45
	6	Investigation of the MONOS structure on BiCS (Bit Cost Scalable) flash memory	TOSHIBA Corporation Semiconductor Company 1, TOSHIBA Information Systems (JAPAN) Corporation 2　Matsuoka Yasuyuki 1, Kito Masaru 1, Nagata Yuzo 2, Katsumata Ryota 1, Fukuzumi Yoshiaki 1, Kido Masaru 1, Tanaka Hiroyasu 1, Aochi Hideaki 1, Nitayama Akihiro 1
△	7	Lead-Free Interconnections for 3D Chip Stacking	IBM Japan, Tokyo Research Laboratory1, Waseda University2　○Katsuyuki Sakuma1, Jun Mizuno2, and Shuichi Shoji2
	8	Study for Sensitivity of Capacitive Fingerprint Sensor LSI	NTT 1, NTT-AT 2　*Shimamura Toshishige 1,Morimura Hiroki 1, Shigematsu Satoshi 1, Machida Katsuyuki 2, Nakanishi Mamoru 1
	9	Study of Surface and Inner Hardness by Scratch Test for a Capacitive Fingerprint Sensor LSI (Part I)	NTT 1, NEL 2, NTT-AT 3　*Shigematsu Satoshi 1, Shimoyama Nobuhiro 1, Morimura Hiroki 1, Shimamura Toshishige 1, Kumazaki Toshihiko 2, Nakanishi Mamoru 1, Ishii Hiromu 1, Machida Katsuyuki 3
	10	Study of Surface and Inner Hardness by Scratch Test for a Capacitive Fingerprint Sensor LSI(PartII)	NTT 1,NEL 2, NTT-AT 3　*Shimoyama Nobuhiro 1, Shigematsu Satoshi 1, Morimura Hiroki 1,Shimamura Toshishige 1,Kumazaki Toshihiko 2, Nakanishi Mamoru 1, Ishii Hiromu 1, Machida Katsuyuki 3
11.6 Si Devices/Integration Technology
September 7 10:00〜19:00
7a-ZL-　/ II
	1	Suppresion of fluctuation in threshold voltage by amorphous gate	Fujitsu Lab. 1, Fujitsu 2　*Fukutome Hidenobu 1, Momiyama Youichi 1, Kubo Tomohiro 2, Yoshida Eiji 1, Morioka Hiroshi 2, Tajima Mitsugu 2, Aoyama Takayuki 1
▲△	2	Location and Interaction of Individual Boron Dopants in SOI Nano Field−Effect Transistors	NTT Basic Research Laboratories 1　Mohammed Kharafalla 1, Yukinori Ono 1, Katsuhiko Nishiguchi 1, Akira Fujiwara 1
	3	Characterization of the Impurity Ion Distribution in the Pair Transistors by the Electron Holography Observation	MIRAI-Selete 1, IIS, Univ. of Tokyo 2　*Tsunomura Takaaki 1, Yano Fumiko 1, Putra Arifin Tamsir 2, Nishida Akio 1, Kamohara Shiro 1, Hiramoto Toshiro 2
△	4	Comparison of device characteristics variation due to structure variation on double-gate MOSFETs and planer type MOSFETs	Tokyo Tech. 1 2, Indean Inst. Tech. Bombay 3　*Yusuke kobayashi 1, Kuniyuki Kakushima 1, Parhat Ahmet 2, V. Ramgopal Rao 3, Kazuo Tsutsui 1, Hiroshi Iawi 2
	5	MOSFET characteristic by Gate shape for 65nm logic technology	TOSHIBA Semiconductor Company 1,TOSHIBA Information Systems Corp. 2,TOSHIBA I.S. Corp. 3　*Ishiduka Tatsuji 1,Utsumi Kuniaki 1,Aota Shoji 1,Hirayu Tsuyoshi 1,Uchimura Sadaharu 1,Yabuuchi Takao 2,Sengoku Mitsuhiro 3,Yshimura Hisao 1,Nakayama Takeo 1,Iwai Masaaki 1
		Break 11:15〜11:30
	6	New experimental evidence of the conduction band warping in <110> uniaxial strained Si nMOSFETs	Univ.Tokyo　Olivier Weber, Shin-ichi Takagi
△	7	Enhancementof Coulomb Scattering Limited Mobility in p-FETs by Uniaxial Stress	RDC Toshiba Co. 1　*Kobayashi Shigeki 1,Saitoh Masumi 1,Nakabayashi Yukio 1,Uchida Ken 1
	8	High-field transport in a system dominated by elastic scattering	Univ. of Tsukuba, Inst. of Appl. Phys. 1　*Morozumi Naohito 1, Natori Kenji 1
▲	9	Freeze-out effect investigation based on SOI-FET surface potential measurements by KFM	Research Inst. of Electronics, Shizuoka Univ. 1, Faculty of Mechatronics, Warsaw Univ. of Tech. 2　*Ligowski Maciej 1,2, Ratno Nuryadi 1, Ichiraku Akihiro 1, Miftahul Anwar 1, Ikeda Hiroya 1, Jablonski Ryszard 2, Tabe Michiharu 1
△	10	Potential observation of Si-channel surface on multidot FET during transistor operation	Shizuoka Univ. 1　*Asai Kiyosumi 1, Ikeda Hiroya 1, Tabe Michiharu 1
	11	Single-electron TransPort Characteristics of SOI-MOSFETs with lateral periodic stress	RIE, Shizuoka Univ.　*Kasai Yuki 1, Ishino Toshiya 1, Ratno Nuryadi 1, Tabe Michiharu 1
		Lunch 13:00〜14:00
7p-ZL-　/ II
	1
	2	Young Scientist Award for the Presentation of an Excellent Paper (110) surface Ultra-thin GOI p-MOSFETs Fabricated by Ge Condensation Method	The Univ. of Tokyo(Sch. of Eng.) 1,The Univ. of Tokyo(Grad. Sch. of Fr. Sci.) 2, Tokyo Institute of Technology(Dep. of Eelc. and Appl. Phys.) 3　*Dissanayake Sanjeewa 1, Kumagai Hiroshi 2, Shuto Yusuke 1, Sugahara Satoshi 3 , Takagi Shinichi 1,2
	3	Effect s of Annealing on (110) GOI Layers Fabricated by Ge Condensation Method	The Univ. of Tokyo(Sch. of Eng.) 1,Tokyo Institute of Technology(Dep. of Eelc. and Appl. Phys.) 2　*Dissanayake Sanjeewa 1, Shuto Yusuke 1, Sugahara Satoshi 2 , Takenaka Mitsuura 1, Takagi Shinichi 1
	4	Drive Current of Ultrathin Ge-on-Insulator n-Channel MOSFETs	Kobe Univ. 1　Azuma Yusuke 1, Mori Takashi 1, Tsuchiya Hideaki 1
	5	Physical Mechanism for Hole Mobility Enhancement in (110)-Surface Anisotropic Strained-Si/SiGe Layers	MIRAI-AIST1, MIRAI-ASET2, Kanagawa Univ.3, Univ. Tokyo4　*T.Mizuno1,3, T.Irisawa2, Y.Moriyama2, N.Hirashita2, T.Tezuka2, N.Sugiyama2,and S.Takagi1,4
	6	High mobility Ge channel metal source/drain pMOSFETs with nickel fully silicided gate	MIRAI-ASET 1,MIRAI-ASRC 2,The Univ. of Tokyo 3　*Ikeda keiji 1,Noriyuki Taoka 2,Yamashita Yoshimi 1,Harada Masatomi 1,Suzuki Kunihiro 1,Yamamoto Toyoji 1,Sugiyama Naoharu 1,Takagi Shin-ichi 2,3
	7	Effect of Generation-Recombination Current on Gate/Channel Capacitance Characteristics	MIRAI-ASET 1, MIRAI-ASRC AIST 2, Univ. of Tokyo 3　*Yamamoto Toyoji 1, Harada Masatomi 1, Yamashita Yoshimi 1, Taoka Noriyuki 2, Sugiyama Naoharu 1, Takagi Shin-ichi 2,3
	8	Extraction of Ge pMISFET Mobility Considering Leakage Current	MIRAI-ASET 1, MIRAI-ASRC 2, Univ. of Tokyo 3　*Masatomi Harada 1, Toyoji Yamamoto 1, Yoshimi Yamashita 1, Noriyuki Taoka 2, Osamu Kiso 2, Keiji Ikeda 1, Naoharu Sugiyama 1, Shinichi Takagi 2,3
▲	9	Investigation of Acoustic Phonon Mobility Degradation in（100）UTB MOSFETs in Additional Eeff Model	IIS Univ. of Tokyo 1, CINQIE Univ. of Tokyo 2　*Jiezhi Chen 1, K. Shimizu 1 2, G. Tsutsui 1, T. Hiramoto 1 2
	10	Mobility Degradation in (110)-Oriented Ultra-thin Body Double-Gate MOSFETs with SOI Thickness of less than 5nm	IIS Univ. of Tokyo 1, CINQIE Univ. of Tokyo 2　*Ken Shimizu 1 2, Toshiro Hiramoto 1 2
		Break 16:45〜17:00
	11	Young Scientist Award for the Presentation of an Excellent Paper RF CMOS-MEMS Technology for Single-Chip RF LSIs	NTT MI Labs. 1, NTT AT 2　*Kuwabara Kei 1, Sato Norio 1, Shimamura Toshishige 1, Morimura Hiroki 1, Kodate Junichi 1, Shigematsu Satoshi 1, Nakanishi Mamoru 1, Kamei Toshikazu 2, Machida Katsuyuki 2,　Ishii Hiromu 1
	12	A High-Q Inductor for RF CMOS-MEMS	NTT MI Labs. 1, NTT-AT 2　Kodate Junichi 1, Kuwabara Kei 1, Sato Norio 1, Morimura Hiroki 1, Kudou Kazuhisa 2, Machida Katsuyuki 2, Ishii Hiromu 1
	13	Integrated PowerMEMS (2): Evaluation of dynamic characteristics of MEMS vibrational devices for energy harvesting	NTT MI Labs. 1, NTT-AT 2　*Norio Sato 1, Kazuyoshi Ono 1, Hiroki Morimura 1, Junichi Kodate 1, Kei Kuwabara 1, Tomomi Sakata 1, Toshikazu Kamei 2, Kazuhisa Kudou 2, Katsuyuki Machida 2, Hiromu Ishii 1
△	14	Millimeter-wave Transmission Line through Silicon Substrate for MEMS Device Package	Mitsubishi Electric Corporation Advanced Technology R&D Center1, Information Technology R&D Center2, 　*Shimpei Ogawa1, Yoshio Fujii1, Yoshinori Yokoyama1, Hiroshi Fukumoto1, Takeshi Yuasa2, Yukihiro Tahara2, Hideyuki Oh-hashi2
	15	A Simple Analysis Method for Losses of On-chip Inductor	NEC Corp.　Nagase Hirokazu 1,Tanabe Akira 1,Hayashi Yoshihiro 1
	16	Characteristics of Bow-tie Antenna on a Si chip	Research Center for Nanodevices and Systems, Hiroshima Univ. 1　*Shinichi Kubota 1, Xia Xiao 1, Kentaro Kimoto 1, Takamaro Kikkawa 1
▲	17	UWB Imaging for Breast Cancer Detection with Consideration of Medium Dispersion	Hiroshima Univ. 1　*Xia Xiao 1, Takamro Kikkawa 1
△	18	Si Integrated Multi-band Dipole Antennas using Multilevel Interconnection	Research Center for Nanodevices and Systems, Hiroshima Univ. 1 　*Kimoto Kentaro 1, Kubota Shin-ichi 1, Kikkawa Takamaro 1
11.6 Si Devices/Integration Technology
September 8 9:00〜15:00
8a-ZL-　/ II
	1	CMOSFET Characteristics using Silicon nitride Cap-STI	Fujitsu Laboratories 1, Fujitsu 2　*Hiroyuki Ohta 1, Yousuke Shimamune 1, Akiyoshi Hatada 2, Kazuo Kawamura 2, Hiroshi Morioka 2, Takashi Watanabe 2, Mitugu Tajima 2, Naoyoshi Tamura 1
	2	Optimization of channel impurity profile in PFET with Boron doped SiGe Source/Drain	System LSI Division, Semiconductor Company, Toshiba Corporation 1,Semiconductor Business Group, Sony Corporation 2,NEC Electronics Corporation 3　*Rie Yamaguchi 1, Tomoya Sanuki 1, Tatsuro Sawada 1, Kazumobu Ohta 2, Mitsuhiro Togo 3, Toshiyuki Iwamoto 3, Hideaki Nii 1, Keiichi Ohno 2, Masahiro Ikeda 3, Masaki Saito 2, Masaaki Iwai 1, Fumitomo Matsuoka 1
	3	Main effect parameters extraction and optimizations of 45nm-node MOSFET junction scaling	Semiconductor Company Toshiba Corporation 1　*Taiki Komoda 1, Yoichi Takegawa 1, Masaaki Iwai 1, Fumitomo Matsuoka 1
△	4	Shallow Junction Formation Using Combination of LSA and Spike-RTA	Renesas Technology Corp. 1　Endo Seiichi 1, Maruyama Yoshiki 1, Kawasaki Yoji 1, Yamashita Tomohiro 1, Oda Hidekazu 1, Inoue Yasuo 1
	5	Reduction of Junction Leakage by B18H22　Cluster Ion Implantation and Laser Annealing	NEC Corp. 1,NEC Electronics Corp. 2　Koichi Yako 1,Kazuya Uejima 1,Masayasu Tanaka 1,Akira Mineji 2,Mitsuru Narihiro 1,Seiichi Shishiguchi 2,Masami Hane 1
	6	Simulation analysis of junction leakage on the 65nm node LSTP-MOSFET	Toshiba I.S. Corp.1, Toshiba Semiconductor Company2, Toshiba I.S. Center3　*Mitsuhiro Sengoku 1, Kuniaki Utsumi 2, Shoji Aota 2, Tatsuji Ishiduka 2, Tsuyoshi Hirayu 2, Osamu Fujii 2, Yoshinori Yabuuchi 3, Hisao Yoshimura 2
	7	Evaluation of Junction Degradation Induced by Plasma Charging based on The Capacitance Change	Kyoto Univ.1,MIRAI-ASET2　○M. Kamei1,K. Eriguchi1,K. Okada2,K. Ono1
		Break 10:45〜11:00
△	8	Moderation of Fermi Level Pinning at Metal/Ge Interface by Ultra-thin GeOx Insertion	The Univ. of Tokyo 1　*Nishimura Tomonori 1, Kita Koji 1, Toriumi Akira 1
	9	Low Vth of FinFETs Obtained by Ta/Mo Stack Metal Gate Technology	AIST NeRI 1　*Matsukawa Takashi 1,Liu Yongxun 1,Endo Kazuhiko 1,Masahara Meishoku 1,O'uchi Shin-ichi 1,Ishikawa Yuki 1,Yamauchi Hiromi 1,Tsukada Junichi 1,Ishii Kenichi 1,Sakamoto Kunihiro 1,Suzuki Eiichi 1
	10	Characterization of FinFET CMOS with the Nitrogen Gas Flow Ratio Controlled PVD TiN Metal Gates	AIST1, Meiji Univ.2　Liu Yongxun1, Hyashida Tetsuro2, Masukawa Takashi1, Endo Kzuhiko1, Ouchi Shinichi1, Sakamoto Kunihiro1, Masahara Meishoku1, Ishii Kenichi1, Tsukada Jyunichi1, Ishikawa Yuki1, Yamauchi Hiromi1, Ogura Atsushi2,Suzuki Eiichi1
	11	Evaluation of the impurity introduction into vertical ultra-tin channels for the double-gate MOSFET	National Institute of AIST　Kazuhiko Endo, Yuki Ishikawa, Yongxun Liu, Takashi Matsukawa, Shin-ichi O’uchi, Meishoku Masahara, Ken-ichi Ishii, Jun-ichi Tsukada, Hiromi Yamauchi, and Eiichi Suzuki
		Lunch 12:00〜13:00
8p-ZL-　/ II
	1	KFM study of charge-injected 2D Silicon nanodots layer toward the NEMS memory device	QNERC Tokyo Tech 1, CRL Hitachi Ltd. 2, Southampton Univ. and Tokyo Tech 3, SORST-JST 4　*Shinnosuke Matsuda 1, Tasuku Nagami 1, Yoshishige Tsuchiya 1 4, Shinichi Saito 2 4, Tadashi Arai 2 4, Toshikazu Shimada2,4, Hiroshi Mizuta 3 4, Shunri Oda 1 4
▲	2	Novel characteristics of Long-Range-Extended Coulomb Blockade Effects in Room Temperature-Operating Si Single Hole Transistor	IIS 1, CINQIE 2, University of Tokyo　　Sejoon Lee 1,2. Kousuke Miyaji 1,2. Toshiro Hiramoto 1,2
△	3	Evaluation of electron transport in Si nanobridge transistor on which quantum dot cavities are built.	QNERC, Tokyo Tech 1, Southampton Univ. and Tokyo Tech 2, and SORST-JST 3　*J. Ogi 1,3 , Y. Tsuchiya 1,3, H. Mizuta 2,3 and S. Oda 1,3
△	4	Control of electrostatic coupling observed for Si double quantum dot structures	QNERC, Tokyo Tech. 1, Southampton Univ. and Tokyo Tech. 2, SORST-JST 3 　Yamahata Gento 1, Tsuchiya Yoshishige 1,3, Mizuta Hiroshi 2,3, Oda Shunri 1,3
▲	5	Formation of strongly-coupled multiple-dot in the dual recess structured silicon channel	QNERC, Tokyo Tech 1, NTT Basic Research Lab 2, Southampton Univ. and Tokyo tech 3, SORST-JST 4　*M. Manoharan 1, Y. Kawata 1, M. Khalafalla 2, Y. Tsuchiya 1, 4, H. Mizuta 3, 4, and S. Oda 1, 4
▲△	6	Characteristic of Single Nanocrystalline Silicon Quantum Dot Resonant Tunneling Diodes in Series Combination	QNERC, Tokyo Tech 1,Southampton Univ. and Tokyo tech 2SORST-JST 3　Akhmadi Surawijaya 1, Yoshishige Tsuchiya 1,3, Hiroshi Mizuta 2,3, and Shunri Oda 1,3
▲	7	Single-electron transfer mechanism in non-homogeneous 1D quantum-dot arrays	Research Inst. of Electronics, Shizuoka Univ. 1　*Moraru Daniel 1, Yokoi Kiyohito 1, Ikeda Hiroya 1, Tabe Michiharu 1
▲	8	Effects of photo-charge generation in the substrate on the single-hole-tunneling SOI-FETs	Research Inst. of Electronics, Shizuoka Univ. 1　*Z.A. Burhanudin 1, R. Nuryadi 1, M. Tabe 1
11.7 Simulation
September 7 9:45〜17:00
7a-ZE-　/ II
	1	Correlation between proton and heavy-ion induced single-event upset cross sections	Kyushu Univ. 1, USEF 2　Nishijima Kouta 1, Watanabe Yukinobu 1, Akiyama Masatsugu 2
	2	Simulation of initial charge deposition in nucleon-induced single-event upset phenomena	Kyushu Univ. 1, Sharp Corp. 2, Inst. for Nucl. Res. and Nucl. Energy 3　Watanabe Yukinobu 1, Nishijima Kouta 1, Kodama Akihiro 1,2, Kadrev Dimitre 1,3
	3	Modeling and Simulation of Arsenic-Doped-Si LPCVD	Corporate Manufacturing Engineering Center 1, Semiconductor Company, Toshiba Corp. 2, Yokohama City Univ. 3　*Kinoshita Shigeru 1, Konno Takuya 1, Takagi Shigeyuki 1, Suzuki Takashi 2, Maki Kunisuke 3
△	4	Prediction of Temperature Distribution in Optical Annealing Process	Corporate Research and Development Center, Toshiba Corporation　Ohno Hiroshi 1, Honguh Yoshinori 1
▲△	5	Development of Multi-Scale Electrical Conductivity Simulator with the Joule Heating Module and its Application to Polycrystalline Materials	Dept. Appl. Chem., Tohoku Univ. 1, NICHe, Tohoku Univ. 2　John Paul Yacapin 1, Riadh Sahnoun 1, Michihisa Koyama 1, Hideyuki Tsuboi 1, Nozomu Hatakeyama 1, Akira Endou 1, Hiromitsu Takaba 1, Momoji Kubo 1, Carlos A. Del Carpio 1, Akira Miyamoto 1, 2
		Break 11:00〜11:15
	6	Crystal Plasticity Analysis of Dislocation Accumulation in Impurity Doped-ULSI Cells	Kitami Ins. Tec. 1,Musashi Ins.Tec. 2,Advanced Research Labo., Hitachi, Ltd. 3　*Sato Michihiro 1,Ohashi Tetsuya 1,Maruizumi Takuya 2,Kitagawa Isao 3
	7	3 Dimensional TCAD Technique and Analysis for Fluctuations in SRAM Circuit	Fujitsu Labs. 1　* Tanabe Ryo 1, Ashizawa Yoshio 1, Oka Hideki 1
	8	Calculation of Vth Variation due to Local Gate Depletion in MOSFETs	IIS, The Univ. of Tokyo 1, MIRAI-Selete 2　Arifin Tamsir Putra 1, Akio Nishida 2, Shiro Kamohara 2, Takaaki Tsunomura 2, Toshiro Hiramoto 1,2
	9	3D Particle Simulations of Potential Fluctuations induced by the Coulomb Interaction	Univ. of Tsukuba, Inst. of Appl. Phys. 1　*Uechi Tadayoshi 1, Fukui Takayuki 1, Sano Nobuyuki 1
	10	Electron Transport Simulations Including Full Coulomb Potential	Tsukuba Univ. Inst. of Applied Phys. 1　*Fukui Takayuki 1, Uechi Tadayoshi 1, Sano Nobuyuki 1
		Lunch 12:30〜14:00
7p-ZE-　/ II
	1	High Frequency Noise Modeling of 70-nm NMOS by Accurate Noise Source Extraction	SONY 1, McMaster University 2　*Kiyota Yukihiro 1, Chen C-H 2,Nakamura Akihiro 1, Kubodera Takashi 1, Takeshita Kaneyoshi 1, Deen M. J 2
	2	Analysis of the gate voltage dependence of the drain conductance by using device simulation	Kyoto Inst. of Tech. 1　*Kumagai Toshihiro 1,Hiroki Akira 1,Yamate Akihiro 1,Yamada Masayoshi 1
	3	Evaluation of 20nm p-channel MOSFET analytical model	Kyoto Inst. of Tech. 1　*Yamate Akihiro 1, Hiroki Akira 1, Yamada Masayoshi 1
	4	Quantum transport simulation of compound semiconductor devices using the sp3d5s* tight-binding method	Osaka Univ. 1　*Minari Hideki 1, Mori Nobuya 1
	5	Analysis of strain-dependent hole transport characteristics in bulk Ge-pMOSFETs	NEC 1, NIS 2　*Takeda Hiroshi 1, Ikezawa Takeo 2, Kawada Michihito 2, Hane Masami 1
▲	6	Quantum Electron Transport Modeling in Strained MOSFETs Based on Multiband Non-Equilibrium Green's Function Method	Fac. of Engineering, Kobe University 1　Fitriawan Helmy 1, Ogawa Matsuto 1, Souma Satofumi 1
		Break 15:30〜15:45
	7	Quantum Transport Analysis of Relaxation Processes in Nanoscale Devices in the presence of phonon scatterings	Univ. of Tsukuba, Inst. of Appl. Phys. 1　Sato Suguru 1, Sano Nobuyuki 1
	8	Effects of phonon scattering on current-voltage characteristics in ultra-small double-gate MOSFETs	Osaka Univ. 1　*Nobuya Mori 1, Hideki Minari 2
	9	Theoretical Study on Electron Mobility Reduction due to Acoustic Phonon Modulation in SOI, Double-Gate, and FinFET	Nagoya University 1, Osaka University 2　Shigeyasu Uno 1, Nobuya Mori 2
	10	Theoretical Investigation of Electron-confined-phonon Interactions in a Free-standing Si Nanowire	Nagoya Univ. 1, Osaka Univ. 2, SORST JST 3　*Hattori Junichi 1,3, Uno Shigeyasu 1,3, Mori Nobuya 2, Nakazato Kazuo 1,3
	11	R-matrix theory of quantum ballistic transport in three-dimensional MOSFETs	Osaka Univ. 1, Hiroshima Univ. 2　Gennady V. Mil'nikov 1, *Nobuya Mori 1, Yoshinari Kamakura 1, Tatsuya Ezaki 2