| 11 Semiconductors A (Silicon) |
| 11.1
Fundamental Materials Characterization and Evaluation |
| August 31 (Thu.) 13:00`18:00 |
| 31p-ZN-@/ II |
| |
1 |
Synchrotron radiation analysis of electronic states
and band offsets for composite ultra-thin films grown by PLD method |
The Univ. of Tokyo 1, NIMS 2@*Yasuhara Ryutaro
1, Komatsu Makoto 1, Takahashi Haruhiko 1, Toyoda satoshi 1, Okabayashi
Jun 1, Kumigashira Hiroshi 1, Oshima Masaharu 1, Kukuruznyak Dmitry 2, Chikyow
Toyohiro 2 |
| |
2 |
Development of high-selective metal etchant |
Sony Corporation1, Mitsubishi Gas Chemical Company,
Inc.2@Y.Hagimoto1, S. Yamaguchi1, H.Iwamoto1, K.Yaguchi2, K.Abe2 |
| |
3 |
Chemical-Bond Analysis for Lanthanide-Oxide Cluster
Models |
Kyoto Univ. 1@ *Doi Kentaro 1, Sugino Shinya 1,
Mikazuki Yutaka 1, Tachibana Akitomo 1 |
| |
4 |
Increase of mobility in MOSFET by forming magnetic
thin film on gate |
Tokyo Tech. 1,Tokyo National College of Technology2@*Machi
Masahiro 1,Wakiya Naoki 1,Mizutani Nobuyasu 2,Shinozaki Kazuo 1 |
| |
5 |
GOI Evaluation of Trench Gate on SOI Wafers |
Denso Corp. 1 @ @*Ohtsuki Hiroshi 1,Katada Mitsutaka
1 |
| |
6 |
Electrical Characteristic Evaluation of Annealing
Dependence for Barrier Metal Adopting pn-junction |
Electrical Characteristic Evaluation of Annealing
Dependence for Barrier Metal Adopting pn-junction@Syun-ichirou Komura 1,Satoshi
Wakimoto 1,Akira Nakada 1,Hiroshi Kubota 1 |
| |
7 |
Dislocation Network Formed in SOI Thin Bicrystals |
Hokkaido Univ. IST 1, CAREM 2, Univ.Tokyo 3, Shizuoka
Univ. 4@*Arita Masashi 1, Ishikawa Yoshihito 1, Hamada Kouichi 1, Takahashi
Yasuo 1, Shibayama Tamaki 2, Ishikawa Yasuhiko 3, Tabe Michiharu 3 |
| |
8 |
High spatial resolution UV Raman study of stress
in Si STI structures |
MIRAI-ASRC AIST 1@Tetsuya Tada 1, Vladimir Poborchii
1, Toshihiko Kanayama 1 |
| |
9 |
Stress Characterization of Si by a Scanning Near-Field
Optical Raman Microscope |
Toray Research Center Inc.1@*M.Yoshikawa1, M.Murakami1,
K.Matsuda1, R.Sugie1, H.Ishida1 |
| ’ |
10 |
Stress Characterization of Si by a Scanning Near-Field
Optical Raman Microscope |
Toray Research Center Inc. 1@*Murakami Masataka
1,Matusda keiko 1,Sugie Ryuichi 1,Yoshikawa Masanobu 1 |
| |
|
Break 15:30`15:45 |
|
| |
11 |
Characterization of SiGe pn junctions by scanning
tunneling microscopy - comparison between SiGe and Si pn junctions |
Musashi Inst. of Technol.@*Toshiko Okui 1, Yuma
Tanaka 1, Yasuhiro Shiraki 1 |
| £ |
12 |
Detection of subsurface point charge distributions
in Si by vacuum-gap modulation scanning tunneling spectroscopy |
MIRAI-ASRC, AIST 1@*Bolotov Leonid 1, Nishizawa
Masayasu 1, Kanayama Toshihiko 1 |
| |
13 |
Doping Effects of Donor Impurities in Si Nanostructures |
Inst. of Appl. Phys., Univ. of Tsukuba1, S.R.P
Nano Science 2, NIMS 3@Murakami Kouichi 1.2,*Shirakawa Ryota 1,Uchida Noriyuki
1.2,Fukata Naoki 2.3 |
| |
14 |
Passivation of defects and doping control in Si
nanowires by hydrogen and oxygen treatments |
Univ. of Tsukuba 1, NIMS 2, S.R.P. Nano Science
3, Tohoku Univ. 4@Matsushita Satoshi 1,Fukata Naoki 2,3, Tsturui Takao
4, Uchida Noriyuki 1,3, Murakami Kouichi 1,3 |
| |
15 |
B-doping and hydrogen passivation effect in silicon
nanowires synthesized by laser ablation |
Inst. of Appl. Phys., Univ. of Tsukuba1, NIMS2,
S.R.P. Nano Sci., Univ. of Tsukuba3, Inst. For Mat. Research, Tohoku Univ.4@*Okada
Naoya 1, Fukata Naoki 2,3, Chen Jun 2, Sekiguchi Takashi 2, Tsurui Takao
4 and Murakami kouichi 1 |
| |
16 |
Characterization of Electronic Charged States of
Impurity Doped Si Quantum Dots using AFM/Kelvin Probe |
Hiroshima Univ.@*Makihara Katsunori 1, Kawaguchi
Yoshihiro 1, Higashi Seiichiro 1, Miyazaki Seiichi 1 |
| |
17 |
Evaluation of Electronic Charged States of NiSi
dots Using an AFM/Kelvin Probe Technique |
Hiroshima Univ.@*Nishihara Ryosuke 1,Makihara Katsunori
1,Kawaguchi Yoshihiro 1,Matsumoto Ryuji 1,Ikeda Mitsuhisa 1,Murakami Hideki
1,Higashi Seiichiro 1,Miyazaki Seiichi 1 |
| |
18 |
Luminescence Properties of Multiply-Stacked Structures
Consisting of Si Quantum Dots and Ultrathin SiO2 Interlayers |
Hiroshima Univ.@*Kawaguchi Yoshihiro 1,Makihara
Katsunori 1,Ikeda Mitsuhisa 1,Murakami Hideki 1,Higashi Seiichiro, Miyazaki
Seiichi 1 |
| |
19 |
Formation of visible-light emitting porous silicon
in aqueous HF/K2Cr2O7 solution |
Gunma Univ.@*Hoshino Daisuke 1,Adachi sadao 1 |
| 11.2
Surface |
| August 29 (Tue.) 10:00`16:30 |
| 29a-ZN-@/ II |
| |
1 |
Amount of Adsorbed Water on Surface of Glass for
TFT in Low Humidity Environment |
Shin Nippon Air Technologies Co., Ltd. 1, Tohoku
Univ. 2@Takatsuka Takeshi 1, Nagasaka Shigeyuki 1, Koyama Michihisa 2, Endou
Akira 2, Kubo Momoji 2, Miyamoto Akira 2 |
| |
2 |
UHV-STM induced hydrogen desorption from hydrogen-terminated
Si(111) surface by wet chemical treatment |
Keio Univ. 1@*Ino Yuji 1, Wada Ayumu 1, Matumoto
Satoru 1 |
| |
3 |
Adsorption and Desorption of Multi-component Organic
Compounds on Silicon Surface |
Yokohama Nat. Univ.@*Yamaya Daisuke 1, Habuka Hitoshi
1, Takeuchi Takashi 1, Aihara Masahiko 1 |
| |
4 |
Adsorption of alkanethiols on silicon surface by
scratch method |
Hiroshima Univ. 1@*Haibuchi Kimihiro 1,Sakaue Hiroyuki
1,Takahagi Takayuki 1 |
| |
5 |
Real-time STM observation of low-energy metal-ion
irradiation on high-temperature Si(111) surface |
Waseda University 1, Waseda ZAIKEN 2@*Takefumi
Kamioka 1, Makoto Uchigasaki 1, Iwao Ohdomari 1,2 |
| |
6 |
Interface states for HfO2/SiON/Si structure
observed by XPS measurements under bias |
ISIR Osaka Univ. 1, CREST JST 2@*Masao Takahashi
1 2, Ken-ichi Fukayama 1 2, Osamu Maida 1 2, Hikaru Kobayashi 1 2 |
| |
|
Break 11:30`11:45 |
|
| |
7 |
Evaluation of atomically flat and hydrogen-terminated
silicon (111) surface by differential reflectance spectrum method
|
Osaka Univ@Inagaki Kouji, Hirose Kikuji, Endo Katsuyoshi |
| |
8 |
Control of step flow speed on Si(111) surface by
anodic oxidation patterns |
Inst. of Appl, Univ. of Tsukuba 1, TIMS, Univ.
of Tsukuba 2@*Ozaki Ryota 1, Hasunuma Ryu 1,2, Yamabe Kikuo 1,2 |
| |
9 |
In-situ observation of Si(100) surface oxidation
in the Torr pressure range by X-ray photoelectron spectroscopy |
Hirosaki Univ. 1,Berkeley Lab. 2,UC Davis 3@*Yoshiharu
Enta 1,Bongjun S. Mun 2,Maximilliano Rossi 2,Charles S. Fadley 2,3 |
| |
10 |
Stability of Si-related defects in strained Si
oxide |
NTT Basic Research Labs. 1@*Hiroyuki Kageshima
1, Masashi Uematsu 1 |
| ’ |
11 |
XPS study of the initial oxidation stage on HF-treated@SiGe
surfaces |
Yamagata Univ 1.Kyusyu Inst Tech 2.Tohoku Univ
3.@Masaya Nagato 1.Yuta Kinoshita 1.Fumihiko Hirose 1.Yuzuru Narita 2.Maki
Suemitu 3.
|
| |
|
Lunch 13:00`14:00 |
|
| 29p-ZN-@/ II |
| |
1 |
Characterization of porous silicon photosynthesized
in HF/KIO3 mixed solution |
Gunma University@Y. K. Xu, S. Adachi |
| |
2 |
Carbon absorption decontamination on Si surfaces
by Ar excimer lamp light exposure |
Osaka Electro-Comun. Univ. 1, Akashi National College
of Technology 2, NTP Inc. 3@*Mayumi Tode 1, Yasuo Takigawa 1, Masato Ohmukai
2, Wataru Sasaki 3 |
| |
3 |
Backside cleaning process of the alumina film using
HF solution |
Toshiba Semiconductor Company@*Hidenobu Nagashima
1,Yuji Yamada 1,Yasuhito Yoshimizu 1,Yoshihiro Ogawa 1,Hiroshi Tomita 1 |
| ’ |
4 |
Numerical analysis of charging on microstructure
in plasma etching |
Kyoto Univ. 1@*Suzumura Taro 1, Eriguchi Koji 1,
Ono Kouichi 1 |
| ’ |
5 |
Removal of Cu contaminants on bare Si by defect
passivation etchless cleaning solutions |
ISIR Osaka Univ. 1@Narita Hiroaki 1, Liu Yueh-Ling
1, Takahashi Masao 1, Kobayashi Hikaru 1 |
| |
|
Break 15:15`15:30 |
|
| ’ |
6 |
The Induced Effect of Microwave Irradiation on
Aqueous Solution Jet |
Yamagata Univ.Graduate School of Sci. 1,High Frequency
Field Corp. 2@Shin Sasaki 1,Masao Imai 2,Masayuki Toda 1 |
| |
7 |
ost Ash Cleaning with Lower Film Loss SC1 in SPRAY
Batch Processor |
mEFSI LTD.@*Kousaku Matsuno,Hiromi Mishima, Masaaki
Arimatsu, Satoshi Kikuchi, Satoshi Shikami |
| |
8 |
Removal of Ion-Implanted Photoresists on Silicon
Surfaces Using Supercritical Carbon Dioxide |
Sony UCT Lab.@*Hirano Hideki 1,Saga Koichiro 1,Kuniyasu,
Hitoshi 1, Hattori Takeshi 1 |
| |
9 |
Generation behavior of cavitation and radical in
batch MHz cleaning tank |
Corporate Manufacturing Engineering Center, TOSHIBA
Corporation 1@*Katsuya Eguchi 1, Naoya Hayamizu 1 |
| 11.3
Gate Insulator Technology |
| August 30 (Wed.) |
| 30a-P5-@/ II |
| |
|
Poster
Session
30a-P5-1`35@9:30`11:30 |
| |
1 |
Phoroemission Study of HfSiOx/SiON Stack Structures |
Grad. School of AdSM, Hiroshima Univ. 1, Semiconductor
Leading Edge technologies, Inc. 2, Mitubishi Electric at present 3, Hitachi
CRL at present 4@Ohta Akio 1, Nakagawa Hiroshi 1, Murakami Hideki 1, Higashi
Seiichiro 1, Miyazaki Seiichi 1, Kawahara Takaaki 2,3, Torii Kazuyoshi 2,4,
Yasuo Nara 2 |
| ’ |
2 |
Analysis of chemical states at the interface between
high-k gate insulator film and Si studied by angle-resolved photoelectron
spectroscopy |
Tokyo Univ. 1, STARC 2@*Toyoda Satoshi 1, Okabayashi
Jun 2, Oshima Masaharu 2, Liu Guo-Lin 2, Liu Ziyuan2, Ikeda Kazuto 2, Usuda
Koji 2 |
| |
3 |
Observation of HfO2/SiO2/Si
with tilted thickness SiO2 by EUV-excited photoelectron-spectroscopy,
EUPS |
ASRC, AIST 1, NeRI, ASRC 2@*Tomie Toshihisa 1,
Miyata Noriyuki 2, Kasai Takeshi 2, Yashiro Hidehiko 1 |
| |
4 |
Analysis of interfacial reactions for TiN/HfO2/Si
gate stack structures by photoemission spectroscopy |
The Univ. of Tokyo 1, STARC 2@*Haruhiko Takahashi
1, Satoshi Toyoda 1, Jun Okabayashi 1, Hiroshi Kumigashira 1, Masaharu Oshima
1, Kazuto Ikeda 2, Guo-Lin Liu 2, Ziyuan Liu 2, Koji Usuda 2 |
| ’ |
5 |
Photoemission analysis of interfacial reactions
for poly-Si/HfO2/Si gate stack structures: (3) O2
partial pressure dependence |
The Univ. of Tokyo 1, STARC 2@*Haruhiko Takahashi
1, Satoshi Toyoda 1, Jun Okabayashi 1, Hiroshi Kumigashira 1, Masaharu Oshima
1, Kazuto Ikeda 2, Guo-Lin Liu 2, Ziyuan Liu 2, Koji Usuda 2 |
| |
6 |
High-k gate dielectric films studied by extremely
asymmetric X-ray diffraction and X-ray photoelectron spectroscopy |
Nagoya Univ. 1, Toyota National College of Technology
2, ISAS 3, MIRAI-ASET 4, MIRAI-ASRC 5, Univ. Tokyo 6@*Ito Yuki 1,Akimoto
Koichi 1,Yosida Hironori 1,Emoto Takashi 2,Hirose Kazuyuki 3,
Kobayashi Daisuke 3,Nabatame Tosihide 4,Toriumi Akira 5,6 |
| |
7 |
Observation of Ti/HfO2/SiO2/Si(001)
interface reaction by HRBS |
Kyouto Univ. 1@*Fujiyoshi Akira 1,Nakajima Kaoru
1,Suzuki Motohumi 1,Kimura kennji 1 |
| |
8 |
HAADF-STEM analysis of thermal stability of a HfO2/SiO2
interface |
NEC System Devices Res. Labs. 1@Nobuyuki Ikarashi
1, Koji Watanabe 1, Koji Masuzaki 1, Takashi Nakagawa 1 |
| |
9 |
Observation of leakage sites in a HfSiON gate dielectric
of a MOSFET device by electron-beam-induced current |
NIMS 1, Univ.Tsukuba 2, Selete 3@Sekiguchi Takashi
1, Chen Jun 1, Takase Masami 1, Fukata Naoki 1, Umezawa Naoto 1, Ohmori
Kenji 1, Chikyow Toyohiro 1, Hasunuma Ryu 2, Yamabe Kikuo 2, Inumiya Seiji
3, Nara Yasuo 3 |
| |
10 |
Effects of HfO2 Thickness and HfSi Composition
on Interface Reactions and Electrical Properties of HfSi/HfO2
Gate Stacks |
Graduate School of Engineering, Osaka Univ. 1,
Sony Corporation 2@*Yoshida Shinichi 1,Kita Yuki 1,Ando Takashi 2,Tai Kaori
2,Iwamoto Hayato 2, Shimura Takayoshi 1,Watanabe Heiji 1,Yasutake Kiyoshi
1 |
| ’ |
11 |
Measurement of strain at HfSiO(N)/Si interface
by UV Raman spectroscopy |
Meiji Univ.@*Tetsuya Yoshida,Kosuke Yamasaki,Daisuke
kosemura,Yasuto Kakemura,Atsushi Ogura |
| |
12 |
Detection of F-vacancy complexes in F-implanted
HfSiON/Si using monoenergetic positron beams |
Univ. of Tsukuba 1, Selete 2, Hiroshima Univ. 3,
AIST 4, Waseda Univ. 5@A. Uedono 1, S. Inumiya 2, T. Otsuka 1, K. Ito 1,
S. Miyazaki 3, Y. Nara 2, T. Ohdaira4 , R. Suzuki 4, S. Ishibashi 4, and
K. Yamada 5 |
| |
13 |
Spatial fluctuation of electrical properties in
Hf-silicate film observed by scanning capacitance microscopy |
AIST-NeRI 1, AIST-Advanced Manufacturing Research
Inst. 2,
Selete 3, Osaka Univ. 4@Naitou Yuichi 1,4, Andou Atushi 1, Ogiso Hisato
2, Kamiyama Satoshi 3,
Nara Yasuo 3, Watanabe Heiji 4, Yasutake Kiyoshi 4 |
| |
14 |
Incorporation energies and electronic states of
defects in amorphous HfO2 gate dielectrics |
Fujitsu Laboratories Ltd.@*Chioko Kaneta,Takahiro
Yamasaki |
| |
15 |
Defect control in Hf-based dielectrics - on the
deactivation of oxygen-induced defects (II) : O-vacancy in low-Hf concentration
- |
Toshiba Corp. R&D Center 1@Nakasaki Yasushi 1,
Kato Koichi 1, Kamimuta Yuuichi 1, Koyama Masato 1, Kikuchi Shoko 1, Muraoka
Koichi 1 |
| |
16 |
Theoretical analysis of Fermi level pinning in
Poly-Si/HfO2/SiO2/Si system due to distortions of
Poly-Si |
MIRAI-ASET 1,Univ. of Vienna 2,MIRAI-AIST 3, Univ.
of Tokyo 4@*Minoru Ikeda 1,Georg Kresse 2,Toshihide Nabatame 1,Akira Toriumi
3,4 |
| |
17 |
Nitridation effects on crystallization in HfO2
and Hf-silicate materials |
FUJITSU Labs.@Yamasaki Takahiro, Kaneta Chioko |
| |
18 |
Composition Control of CVD TaSixNy Gate Electrode
on HfSiON dielectric film for Future n-MOSFET |
Semiconductor Leading Edge Technologies Inc.@Sugita
Yoshihiro, Nara Yasuo, Aoyama Takayuki |
| |
19 |
Work Function Instability at pMOS Metal/HfSiON
Interfaces |
Toshiba Corp.@*Tsuchiya Yoshinori 1, Koyama Masato
1 |
| |
20 |
Fabrication processes and characterization of sol-gel
derived ZrO2 thin film on (100) Si surfaces |
Nihon Univ.@*Konagai Satoshi 1, Shimizu Hirofumi
1, Ikeda Masanori 1, Nishide Toshikazu 1 |
| |
21 |
Hf Release in High-Temperature Annealing of TiN/HfSiON
Gate Stack Induced by Oxygen Incorporation |
Semiconductor Leading Edge Technologies,Inc.@Takeo
Matsuki 1, Seiji Inumiya 1, Nobuyuki Mise 1, Takahisa Eimori 1, Yasuo Nara
1 |
| |
22 |
Effcet of Nitrogen doping into high-k Gate Dielectrics
by metal deposition followed by O2 annealing(1)
|
Tokyo Univ.of Agri.&Tech@*Jyo Ryuuyou 1, Otaka
Naoko 1, Hasumi Masahiko 1, Iwazaki Yositaka 1, Ueno Tomo 1, Kuroiwa Koichi
1 |
| |
23 |
Effect of Nitrogen doping into high-k Gate Dielectrics
by metal deposition followed by O2 annealing(2) |
Tokyo Univ. of Agri.&Tech.@*Otaka Naoko 1,Jyo Ryuyou
1,Hasumi Masahiko 1,Iwazaki Yoshitaka 1,Ueno Tomo 1,Kuroiwa Kouichi 1 |
| |
24 |
Fabrication of SiN Film by ECR-Sputtering and Investigation
of HfO2/SiN/Si Structure |
Tokyo Univ. of Agri. & Tech.@*Nagasato Yoshitaka
1, Iwazaki Yoshitaka 1, Hasumi Masahiko 1, Ueno Tomo 1, Kuroiwa Koichi 1 |
| |
25 |
Study of Fabrication Process of high-k Films by
Metal Deposition Followed by O2 Annealing. |
Tokyo Univ.ofAgri.&Tech. 1@*Iwazaki Yoshitaka 1,Fujitani
Jyun 1,Hasumi Masahiko 1,Ueno Tomoo 1,Kuroiwa Kouichi 1
|
| |
26 |
Fabrication of HfO2 film using Al2O3
layer as barrier |
Tokyo Univ. of Agri. & Tech.@*Masayuki Niikura
1, Yukihide Hayase 1, Iwazaki Yoshitaka 1, Hasumi Masahiko 1, Ueno Tomo
1, Kuroiwa Koichi 1 |
| |
27 |
Nitridation effect on surface and interface roughness
of HfSiON dielectric films |
Inst. of Appl. Phys, Univ. of Tsukuba 1,TIMS, Univ.
of Tsukuba 2,Semiconductor Leading Edge Technologies3@*M.Sometani 1,C.Tamura
1,T.Naito 1,S.Inumiya 3,R.Hasunuma 1,2, and K.Yamabe 1,2 |
| £ |
28 |
Preparation and characterization of HfO2 thin films
prepared by photo assisted MOCVD using NH4OH |
Osaka Univ. 1@*Lee Hyun 1,Kanashima Takeshi 1,Okuyama
Masanori 1 |
| ’ |
29 |
Formation of Pt/HfOxNy/Si(100)
gate-stack structure and investigation of PMA effect. |
Tokyo Tech 1@*Satoh Masaki 1, Nakano Yusuke 1,
Ohmi Shun-ichiro 1 |
| ’ |
30 |
Characteristics of MOSFETs with HfOxNy
gate insulator formed by ECR plasma oxidation of HfN |
Tokyo Tech@*Nakano Yusuke 1,Satoh Masaki 1,Kurose
Tomoki 1,Ohmi Shun-ichiro 1 |
| |
31 |
Influence of Annealing Atomosphere on Leakage Current
in HfSiOx Film |
Toshiba Corp. 1@*Hirotaka Nishino 1, Yasushi Nakasaki
1, Masato Koyama 1 |
| |
32 |
Vfb Control of Poly-Si/HfSiON Gate Stack using
F I/I, N I/I and Al2O3 Cap Layer |
Semiconductor Company Toshiba Corporation 1
Corporate Research & Development Center Toshiba Corporation 2@*Katsuyuki
Sekine 1, Takuya Kobayashi 1, Yuuichi Kamimuta 2, Motoyuki Sato 1, Makoto
Koyama 2, Tomonori Aoyama 1, Kazuhiro Eguchi 1, |
| |
33 |
Negative Vfb shift in direct-contact HfO2/Si
structure |
NeRI AIST 1. Musashi Inst. Technol. 2. Musashi
Inst. Technol. ARL 3@*Abe Yasuhiro 1,2. Miyata Noriyuki 1,2. Nohira Hiroshi
2. Matsuda Toru 2.
Suzuki Haruhiko 2. Maruizumi Takuya 2. Shiraki Yasuhiro 3. Yasuda Tetsuji
1. |
| |
34 |
Dielectric degradation of HfSiON films under high
stress voltages.(1) |
Inst. of Appl. Phys, Univ. of Tsukuba 1,TIMS, Univ.
of Tsukuba 2,Semiconductor Leading Edge Technologies 3@*C.Tamura 1,T.Naito
1,S.Inumiya 3,R.Hasunuma 1,2,and K.Yamabe 1,2 |
| |
35 |
Dielectric degradation of HfSiON films under high
stress voltages |
Inst. of Appl. Phys, Univ. of Tsukuba 1,TIMS 2,
Selete 3@Tatsuya Naito 1,Chihiro Tamura 1,Seiji Inumiya 3,Ryu Hasunuma 1,2,
Kikuo Yamabe 1,2 |
| 11.3
Gate Insulator Technology |
| August 31 (Thu.) |
| 31a-P10-@/ II |
| |
|
Poster
Session
31a-P10-1`17@9:30`11:30 |
| ’ |
1 |
N2 annealing effects on electrical properties
of praseodymium silicate gate dielectrics grown by MOCVD |
QNERC & Dept. of Phys. Electronics, Tokyo Tech
1, Dept. of E&E, Mi-Tech 2, and Adv. Research Lab., Mi-Tech 3@R. Furukawa
1,2, T. Suto 1, Y. Tsuchiya 1, H. Nohira 2, H. Mizuta 1, T. Maruizumi 2,
Y. Shiraki 3 and S. Oda 1 |
| |
2 |
Stability of lanthanum oxynitride films on silicon
substrates |
Seikei Univ. 1@*Ito Masahiko 1,Kawada Nobuhito
1,Saito Yoji 1 |
| |
3 |
Characterization of Sc2O3 gate MISFET
|
Tokyo Tech. FCRC 1, Tokyo Tech. IGSSE 2@*T.Kawanago
1, Y.Shiino 1, H.Sauddin 1, K.Kakushima 2, P.Ahmet 1, K.Tsutsui 2,N.Sugii
2, T.Hattori 1, H.Iwai 1
|
| |
4 |
Improvement of Thermostability by Supplying Oxygen
during La2O3 E-Beam Evaporation |
Tokyo Tech. FCRC 1, IGSSE 2@*Sato Soshi 1, Tachi
Kiichi 1, Kakushima Kuniyuki 2, Parhat Ahmet 1, Tsutsui Kazuo 2, Sugii Nobuyuki
2, Hattori Takeo 1, Iwai Hiroshi 1 |
| |
5 |
Annealing Condition Dependence of Electrical Characteristics
of La2O3 MIM Capacitor |
Tokyo Tech. FCRC 1,Tokyo Tech. IGSSE 2@*Okamoto
kouichi 1, Song JaeYeol 1, Fukuyama Akira 1, Kakushima Kuniyuki 2, Ahmet
Parhat 1, Tsutsui Kazuo 2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi
1
|
| |
6 |
Relationship between the residual impurities of
ALD-High-k films and ligand of ALD precursor |
Shibaura Inst. of Tech. 1,MIRAI-ASET 2,MIRAI-ASRC
3,The Univ. of Tokyo 4@*Kimura Shinsuke 1,Iwamoto Kunihiko 2,Nunoshige Yuu
1,Ogawa Arito 2,Nabatame Toshihide 2,Ota Hiroyuki 3,Toriumi Akira 3,4,Ohishi
Tomoji 1 |
| |
7 |
Integration of dual metal gate CMOS using HfSix
and Ru as a gate electrode |
Semiconductor Bussiness Unit, SONY Corporation@Shinpei
Yamaguchi 1, Kaori Tai 1, Tomoyuki Hirano 1, Takashi Ando 1, Yoshiya Hagimoto
1, Yoshihiko Nagahama 1, Mayumi Yamanaka 1, Sanae Terauchi 1, Saori Kanda
1, Ryo Yamamoto 1, Yasushi Tateshita 1, Yukio Tagawa 1, Hayato Iwamoto 1 |
| |
8 |
Electrical Properties of Metal/High-k Gate Stacks
Fabricated by In-situ Solid Phase Reaction between PVD-Hf and SiO2 Underlayer
-Improved Electrical Properties due to Reduction of Carbon Impurity-
|
Osaka Univ. 1, Canon ANELVA Corp. 2, Tsukuba Univ.
3@*Shinya Horie 1, Takashi Minami 2, Naomu Kitano 2, Motomu Kosuda 2, Kenji
Shiraishi 3, Heiji Watanabe 1, Kiyoshi Yasutake 1 |
| |
9 |
Study of matrix effect of various dopants and stoichiometry
analysis on FUSI-NiSi by SIMS |
Toray Research Center, Inc. 1, Fujitsu Laboratories
Ltd. 2@*Tomomi Sugimoto 1, Takashi Miyamoto 1, Masahiro Saito 1, Kimihiko
Hosaka 2, Takayuki Aoyama 2 |
| |
10 |
Study of depth profile and chemical state at As
doped-NiSi/SiO2 interface |
Toray Research Center Inc. 1, Fujitsu Laboratories
2@Takashi Yamamoto 1, Takashi Miyamoto 1, Shingo Ogawa 1, Fumito Takeno
1, Tomomi Sugimoto 1, Masahiro Saito 1, Noriyuki Fujiyama 1, Kimihiko Hosaka
2, Takayuki Aoyama 2 |
| |
11 |
Development of CVD process for various types of
Ta-based film |
Air Liquide Laboratories 1@*Yanagita Kazutaka 1,
Beyssac Laurent 1, Dussarrat Christian 1 |
| |
12 |
Change of effective work function of Hf-Ru alloy |
Shibaura Inst. of Tech. 1, MIRAI-ASET 2, MIRAI-ASRC,AIST
3, The Univ. of Tokyo 4@*Nunoshige Yu 1, Kadoshima Masaru 2, Takaba Hiroyuki
2, Segawa kazuhiro 1, Kimura Shinsuke 1, Nabatame Toshihide 2, Satake Hideki
2, Ota Hiroyuki 3, Toriumi akira 3,4, Ohishi Tomoji 1 |
| |
13 |
Analysis of Gate/Insulator Interfacial Region in
Impurity-Segregated FUSI Gate Stacks |
RDC, Toshiba Corp. 1, Semiconductor Company, Toshiba
Corp. 2@*Saitoh Masumi 1, Tsuchiya Yoshinori 1, Saito Tomohiro 2, Aoyama
Tomonori 2, Koyama Masato 1, Nishiyama Akira 1 |
| |
14 |
Band Alignment Measurement at Metal Gate- Insulating
Film Interfaces by Photoelectron Spectroscopy |
National Inst. Materials Sci.@*Yoshitake Michiko
1, Song Weijie 1, Chikyow Toyohiro 1 |
| |
15 |
Effect of formation temperature of chemical oxide
on electrical characteristics of g-Al2O3thin
films |
Toyohashi Univ. of Tech. 1, TUT-ISSRC 1,2,3, JST-CREST
1,2,3@*Okada Takayuki 1, Sawada Kazuaki 1,2,3, Ishida Makoto 1,2,3 |
| |
16 |
A sutdy on relationship between relative chemical-shift
and dielectric-constant in Al2O3 and AlN |
Musashi Inst 1, JASRI/SPring-8 2, Musashi Inst.
of Technol. ARL 3, ISAS 4,@*Haruhiko Suzuki 1, Toru Matsuda 1, Yoshinori
Takenaga 1, Hiroshi Nohira 1, Eiji Ikenaga 2, Daisuke Kobayashi 4, Takeo
Hattori 3, Kazuyuki HIrose 4 |
| ’ |
17 |
Characterization of non-volatile memory using a
thin aluminosilicate film as a charge trapping layer |
System Devices Research Laboratories, NEC Corporation@Y.
Saito, T. Nakagawa, H. Sunamura, T. Ikarashi, A. Morioka, M. Oshida, S.
Fujieda and T. Tatsumi |
| 11.3
Gate Insulator Technology |
| August 31 (Thu.) |
| 31p-P12-@/ II |
| |
|
Poster Session
31p-P12-1`41@13:00`15:00 |
| |
1 |
Evaluation of ac response characteristics for Ge-MIS
interface states by conductance technique |
MIRAI-ASRC 1, MIRAI-ASET 2, Univ. of Tokyo 3@Taoka
Noriyuki 1, Ikeda Keiji 2, Yamashita Yoshimi 2, Harada Masatomi 2, Yamamoto
Toyoji 2, Sugiyama Naoharu 2, Takagi Shin-ichi1,3
|
| |
2 |
Characterization of Chemical Bonding Features of
Silicon Oxynitride Films on Ge(100) Surfaces |
Hiroshima Univ.@*Nakagawa Hiroshi, Ohta Akio, Abe
Hiroyuki, Munetaka Yuki, Murakami Hideki,
Higashi Seiichiro, Miyazaki Seiichi |
| |
3 |
Formation of SiNx films fabricating by electron-beam-induced-chemical
vapor deposition at ultra low temperature |
Univ. of Yamanashi, Clean Energy Res. Ctr.@1, Crystal
Science and Tech. Res. Ctr.@2, Miyatsu Co.,Ltd.@3@Kobayashi Kazuaki 1, Imamura
Yuuichi 1, Sato Tetsuya 1, Mitsui Minoru 2, Nakagawa Kiyokazu 2, Aoki Yutaka
3, Sato Shouji 3 |
| |
4 |
Formation of SiO2/SiGe structure by using plasma
assisted CVD with source gas of TEOS (2) |
Univ. of Yamanashi 1,Tokyo Univ. of Science Suwa
2,Renkei Co.,Ltd. 3,Miyatsu Co.,Ltd. 4@Arai Tetsuji 1,3,Hirata Masahiro
1,Tsuchiya Yusuke 1,Mitsui Minoru 1,Arimoto Keisuke 1,Sato Tetsuya 1,Nakagawa
Kiyokazu 1,Fukuda Yukio 2,Takamatsu Toshiyuki 3,Sato Shoji 4 |
| |
5 |
Explanation to the Abnormal Frequency Dispersion
Observed in C-V Characteristics of Ge-MIS Capacitor |
Tokyo Univ. of Science, Suwa 1, Hirosaki Univ.
2, Shimane Univ. 3, Tokyo Electron Ltd. 4@Yukio Fukuda 1, Yohei Otani 1,
Toshiro Ono 2, Toshiaki Tsuchiya 3, Yusaku Kashiwagi 4 |
| |
6 |
Effects of ECR N2 Plasma Irradiation on GeO2/Ge
Interface Property |
Tokyo Univ. of Science, Suwa 1, Hirosaki Univ.
2, Tokyo Univ. of Agr. & Tech. 3@*Yukio Fukuda 1, Koji Kato 2, Hiroshi Toyota
2, Toshiro Ono 2, Nobutaka Nagasato 3, Tomo Ueno 3 |
| |
7 |
Formation of ECR-Ta2O5 Thin
Films on GeO2/Ge Substrates Irradiated by ECR-N2 Plasma
and Their Properties |
Tokyo Univ. of Science, Suwa 1, Hirosaki Univ.
2, Yamanashi Univ. 3, Tokyo Univ. of Agri. & Tech. 4@*Otani Yohei 1, Itayama
Yasuhiro 1, Fukuda Yukio 1, Toyota Hiroshi 2, Ono Toshiro 2, Mitsui Minoru
3, Nakagawa Kiyokazu 3, Ueno Tomoo 4 |
| |
8 |
Electrical characteristics of Si3N4/Ge3N4/Ge
MOS capacitors formed by radical nitridation |
Graduate School of Engineering, Nagoya Univ. 1,
CCRAST, Nagoya univ. 2@*Kondo Hiroki 1, Yanagi Itaru 1, Sakashita Mitsuo
1, Sakai Akira 1, Ogawa Masaki 2, Zaima Shigeaki 1 |
| |
9 |
Fabrication and Characterization of Pr2O3
films on Ge substrates |
Graduate School of Engineering Nagoya Univ. 1,CCRAST
Nagoya Univ. 2@*Kito Nobuyuki 1,Sakashita Mitsuo 1,Sakai Akira 1,Ogawa Masaki
2,Zaima Shigeaki 1 |
| |
10 |
Dependence of Ultra-Thin Oxidation and Nitridation
Process on Orientation of Si Substrate |
Nagaoka Univ. of Tech. 1, Toshiba Corp. Semiconductor
Co. 2@*Kasahara Kiyotaka 1, Uchitomi Naotaka 1, Shimizu Takashi 2, Saki
Kazurou 2, Mizushima Ichirou 2 |
| |
11 |
Effect on the dielectric characteristics of silicon
nitride film fabricated by atmospheric pressure nitrogen plasma generated
at resonant frequency |
Osaka Prefecture Univ. 1, Sekisui Chemical. 2@Yoshida
Masashi 1, Nakae Mari 1, Yoshimura Takeshi 1, Kunugi Syunsuke 2, Uehara
Tsuyoshi 2, Fujimura Norifumi 1 |
| ’ |
12 |
First-principles study on electronic structure
of Si/SiO2 interface @-effect of interface defects on leak current- |
Osaka Univ. 1@*Kutsuki Katsuhiro 1,Ono Tomoya 1,Hirose
Kikuji 1 |
| ’ |
13 |
Effects of insulatorfs formation process on the
interface states at thin thick region |
Advanced LSI Technology Laboratory Toshiba Corporation1@Matsushita
Daisuke1, Muraoka Koichi1, Kato Koichi1, Mitani Yuuichiro1 |
| |
14 |
Improvement of Vfb shift of gate SiON film by Pre-Nitridation |
Oki Electric Industry Corp.@Nishio Yoshifumi 1,
Nagata Toshio 1, Taguchi Takashi 1, Doumae Yasuhiro 1, Ida Jiro 1 |
| |
15 |
Influence of additional oxidation on the gate SiON
reliability |
NEC Electronics 1,NFAS 2@Koyama Shin 1,Asada Shinobu
2,Shishiguchi Seiichi 1 |
| ’ |
16 |
Nitrogen-Originated NBTI Mechanism observed in
SiON with High-Nitrogen Concentration |
Advanced LSI technology Lab. Toshiba Corp. 1@*Sakuma
Kiwamu 1, Matsushita Daisuke 1, Yasushi Nakasaki 1, Kato Koichi 1, Muraoka
Koichi 1, Mitani Yuuichiro 1 |
| £ |
17 |
The waveform effect on dynamic bias temperature
instability in p- and n-MOSFETs |
Hiroshima Univ. 1, Elpida Memory Inc. 2@*Zhu Shiyang
1, Nakajima Anri 1, Ohashi Takuo 2, Miyake Hideharu 2 |
| £ |
18 |
Effect of bulk bias on static and dynamic NBTI
of pMOSFETs with ultrathin SiON gate dielectrics |
Hiroshima Univ. 1, Elpida Memory Inc. 2@*Zhu Shiyang
1, Nakajima Anri 1, Ohashi Takuo 2, Miyake Hideharu 2 |
| ’ |
19 |
Development of NBTI simulator incorporated with
threshold voltage shift by hole trapping |
Advanced LSI Technology Lab. 1, Semiconductor Company
2, Toshiba Corporation@Daisuke Hagishima 1, Shigeto Fukatsu 1, Kazuya Matsuzawa
1, Yuichiro Mitani 1, Kouichiro Inoue 2 |
| ’ |
20 |
Effect of Gate Bias in Recovery Phase on NBT Degradation
and Recovery in Ultra-thin Gate Dielectrics |
Corporate R&D Center,Toshiba 1, Semiconductor Company,
Toshiba 2@Fukatsu Shigeto 1, Mitani Yuichiro 1, Hagishima Daisuke 1, Matsuzawa
Kazuya 1, Inoue Koichiro 2 |
| |
21 |
Open volumes in SiN film for strained Si transistors
probed using monoenergetic positron beams |
Univ. of Tsukuba 1, Tokyo Electron 2, AIST 3@K.
Ito 1, T. Otsuka 1, A. Uedono 1, K. Yamabe 1, M. Kohno 2, T. Moriya 2,
T. Nishida 2, N. Okumura 2, T. Nakanishi 2,
T. Arikado 2, T. Ohdaira 3, R. Suzuki 3
|
| ’ |
22 |
Analysis of electron and hole trap distributions
in MONOS structure |
Hitachi Central Research Lab.@*Ishida Takeshi,
Yamada Renichi |
| |
23 |
Characterization of charge traps of Si-rich SiN
film using avalanche charge injection |
CRL.,Hitachi 1@*Mine Toshiyuki 1,Fujisaki Koji
1,Ishida Takeshi 1,Hamamura Hirotaka 1 |
| £ |
24 |
An asymmetry electrical characteristics of Oxide/Nitride/Oxide
interpoly dielectric as oxynitride association |
Semiconductor R&D center, Samsung Electronics@*Woong
Lee, Jung-Hyun Park, Hyoeng-Ki Kim, Sang-Jin Park, Jung-geun Jee, Ho-min
Son, Won-jun Jang, Jae-Jong Han, Yong-Woo Hyung, Hyeon-Deok Lee |
| |
25 |
Enhancing the reliability of ultrathin silicon
oxide gate films by in-situ pyrolytic-gas passivation (PGP) |
NTT Microsystem Integration Labs.@*Yamada Hiroshi
1 |
| |
26 |
SiO2/Si interfacial lattice strain revealed by
extremely asymmetric X-ray diffraction |
Nagoya U. 1, Toyota National College of Technology
2, IHI 3, Toyota Technological Institute 4, Meiji U. 5@*Yoshida Hironori
1, Akimoto Kouiti 1, Itou Yuki 1, Emoto Takashi 2, Yamamoto Naoya 3 5, Oshita
Yasuo 4, Ogura Atsushi 5 |
| |
27 |
XPS Studies On Silicon Oxide Films Formed By High
Pressure Steam Oxidation |
IHI 1, Meiji U 2, Toyota Technological Institute
3, JASRI/SPring-8 4@*Naoya Yamamoto 1,2,Sai Hitoshi 3, Tanaka Satoshi 2,
Hirosawa Ichiro 4, Ikenaga Eiji 4, Ohshita Yoshio 3, Ogura Atsushi |
| |
28 |
Characterization of damage in SiO2 films
induced by high electric field
|
Tsukuba Univ.1,Fujielectric co.2@*Okamoto Shinichi
1,Tokukawa Yui 1,Hasunuma Ryu 1,Ogino Masaaki 2,Kuribayashi Hitoshi 2,Sugahara
Yoshiyuki 2,Yamabe Kikuo 1 |
| |
29 |
Development of high temperature plasma oxidation
process |
Hitachi Kokusai Electric Inc. 1@*Hirano Akito 1,
Ueda Tatushi 1, Terasaki Tadashi 1, Ogawa Unryu 1
|
| ’ |
30 |
Low-Leakage-Current Ultra-thin SiO2
Film Formation using Low-Temperature Neutral Beam Oxidation |
Tohoku Univ. 1, AIST 2, Osaka Univ. 3@Ikoma Toru
1, Taguchi Chihiro 1, Fukuda Seiichi 1, Endo Kazuhiko 2, Watanabe Heiji
3, Samukawa Seiji 1 |
| |
31 |
Photo-oxidized High-density SiO2 Thin
Film III |
AIST 1, Toray Research Center 2@Atsuyuki Fukano
1,Hiroyuki Oyanagi 1,Hideki Hashimoto 2 |
| |
32 |
Synthesis of Si insulator film at below 200C by
UV-light-excited ozone CVD method |
Meidensha Co. 1, AIST 2@Nishiguchi Tetsuya 1,2,
Kameda Naoto 1,2, Miura Toshinori 1, Morikawa Yoshiki 1, Kekura Mitsuru
1, Nonaka Hidehiko 2, Ichimura Shingo 2 |
| |
33 |
High quality gate dielectric film on poly-silicon
at room temperature by UV light excited ozone. |
Meidensha Corporation 1, AIST 2@Naoto Kameda 1,2,
Tetsuya Nishiguchi 1,2, Yoshiki Morikawa 1, Mitsuru Kekura 1, Hidehiko Nonaka
2, and Singo Ichimura2 |
| |
34 |
Ozone oxidation of silicon thin films under CW
green laser irradiation. |
Tohoku Univ. 1@Ryosuke Nomura 1, Shin-Ichiro Kuroki
1, Koji Kotani 1, Takashi Ito 1 |
| |
35 |
Hole trap property of SiO2 film prepared by highly
concentrated ozone |
CRL., Hitachi@Hamamura Hirotaka 1, Ishida Takeshi
1, Mine Toshiyuki 1 |
| ’ |
36 |
Si atom emission kinetics during oxidation on Si(001)
surfaces (VIII)FGrowth rate of second oxide layer |
IMRAM Tohoku Univ. 1@*Ogawa Shuichi 1, Takakuwa
Yuji 1 |
| |
37 |
Behavior of an H2O molecule during the penetration
of the molecule into SiO2, Si2N2O, Si3N4 films |
Mitsubishi Electric Corp. High Frequency & Optical
Semiconductor Works.@*Tomoki Oku 1, Masahiro Totsuka 1, Takahide Ishikawa
1 |
| ’ |
38 |
Low temperature formation of SiO2/Si
structure by nitric acid vapor (1) |
ISIR Osaka Univ 1,Crest JST 2@*Imamura Kentarou
1 2 ,Takahasi Masao 1 2,Hattori Kensaku 1 2,Maida Osamu 1 2,Kobayasi Hikaru
1 2@ |
| |
39 |
Low temperature formation of SiO2/Si
structure by nitric acid vapor (2) |
ISIR Osaka Univ. 1, CREST JST 2@*Masao Takahashi
1 2, Kentaro Imamura 1 2, Kensaku Hattori 1 2, Osamu Maida 1 2, Hikaru Kobayashi
1 2 |
| ’ |
40 |
Temperature dependence of quality of Si oxide film
formed by silicone oil and ozone gas |
Jpn. Adv. Inst. of Sci. & Tech. (JAIST)@@K. Toriyabe
1, K. Nishioka 1 and S. Horita 1 |
| |
41 |
SiO2 growth on Si in the pure water by anodic oxidation
and evaluation of electric property |
Nihon Univ. 1@*Suganuma Takuhito 1,Yanagisawa Takuto
1,Nishimura Kou 1,Takahashi Yoshihiro 1,Ohnishi Kazunori 1 |
| 11.4
Review Lectures and General Session:Historical review on LSI multi-level
interconnect technology and the on-going evolution toward nanometers-scaling
|
| August 29 (Tue.) 10:00`16:45 |
| 29a-ZW-@/ II |
| |
1 |
Evolution of LSI interconnect technology and its
scientific backgrounds: Objects of the symposium |
NEC 1, Toshiba 2, HItachi 3, Matsushita 4@*Hayashi
Yoshihiro 1, Kaneko Naoshi 2, Takeda Kenichi 3, Ogawa Shinichi 4 |
| |
2 |
Integration of Self-Formed Barrier Technology for
32nm-node Cu Dual-Damascene Interconnects with Hybrid Low-k (PAr/SiOC) Structure |
Sony Corp.@*Yutaka Ohoka 1, Yoshiyuki Ohba 1, Keishi
Inoue 1, Toshihiko Hayashi 1, Naoki Komai 1, Shinichi Arakawa 1, Ryuichi
Kanamura 1 |
| |
3 |
High Performance Interconnect Module Technology
for 45nm-node ULSI Devices |
NEC 1,@*Hayashi Yoshihiro 1, |
| |
4 |
Ultra Low Keff Cu Interconnects by Selective Air
Gap Formation |
ULSI Process Technology Development Center, Matsushita
Electric Industrial Co.,Ltd. 1, Engineering Department, Panasonic Semi-Conductor
Engineering Co.,Ltd. 2
@Harada Takeshi 1, Takahashi Michiya 2, Murakami Kyoji 2, Korogi Hayato
1, Sasaki Toshiyuki 2, Hattori Tsukasa 1, Ogawa Shin-ichi 1, *Ueda Tetsuya
1 |
| |
5 |
Low-k Interconnect Module Technology for High-speed
Memory Devices |
Hitachi, Ltd. 1, Hitachi Chemical Co., Ltd. 2@*Daisuke
Ryuzaki 1, Haruaki Sakurai 2, Takahiro Yoshikawa 2, Kazuyoshi Torii 1 |
| |
|
Lunch 12:10`13:10 |
|
| 29p-ZW-@/ II |
| |
1 |
Mechanical properties of thin films prepared by
the deposition techniques |
Dept. of Mater. Sci. & Eng., Kyoto Univ., 1@Masanori
Murakami |
| |
2 |
gHistory of development and basish Development
for inter-layer dielectric (from SiO2 to porous film) |
NEC Electronics Process Technlogy Div.@Tatsuya
Usami 1 |
| |
3 |
Challenges on Interconnect Formation by Dry Etch
- Higher Aspect Ratio and Lower Damage |
Fujitsu Ltd. 1@*Masafumi Nakaishi 1,Yoshihisa Iba
1,Akihiro Hasegawa 1 |
| |
|
Break 15:00`15:15 |
|
| |
4 |
ULSI Metallization Using Selective Film Growth
(Tungsten Plug, Metal Cap) |
Tokyo Electron LTD. 1@*Hitoshi Itoh 1 |
| |
5 |
History of interconnection development and basic,
reflow metallization technology for Al and .Cu interconnection |
Toshiba, Proc.&Manu. Eng.Cent.@Masahiko Hasunuma |
| |
6 |
Multi-level Intereconnect Technology using Advanced
CMP Process |
Fujitsu Limited@Motoshu@Miyajima |
| 11.4
Interconnect Technology |
| August 30 (Wed.) 10:00`19:00 |
| 30a-ZN-@/ II |
| |
1 |
Water-repellent Film Coating by Electrodeposition
for Prevention of Wet-process-related Sticking in MEMS Devices |
NTT Microsystem Integration Labs. 1, NTT Advanced
Technology Corp. 2@*Sakata Tomomi 1, Ishii Hiromu 1, Sato Norio 1, Kuwabara
Kei 1, Shimamura Toshishige 1, Kudou Kazuhisa 2, Machida Katsuyuki 2 |
| ’ |
2 |
Study of thick multilevel interconnects formation
by Au electroplating technique (2) |
NTT MI Labs.1, NTT Advanced Technology2@*Kazuyoshi
Ono1,Takahiro Shimoyama1,Norio Sato1, Kazuhisa Kudo2, Toshikazu Kamei2,
Hiromu Ishii1, Katsuyuki Machida2 |
| ’ |
3 |
Study on an organic dielectric for sealing air-gaps
with STP technology |
NTT 1, NTT-AT 2, Sumitomo Bakelite 3, Dainippon
Screen Mfg. 4@*Sato Norio 1, Machida Katsuyuki 2, Ishii Hiromu 1, Ishimura
Yoji 3, Saito Hidenori 3, Asakuma Sumitoshi 3, Kawagoe Masafumi 4, Adachi
Hideki 4 |
| ’ |
4 |
Formation technique of 3-dimensional structures
by STP technology - Processing characteristics of free-standing films |
NTT-AT 1, NTT 2@*Toshikazu Kamei 1, Sato Norio
2, Kudou Kazuhisa 1, Yano Masaki 1, Namatsu Hideo 1, Machida Katsuyuki 1,
Ishii Hiromu 2 |
| |
5 |
High-k MIM Decoupling Capacitors with Low-Leakage
and Fast Response |
NEC System Devices Res. Labs.@*Naoya Inoue 1, Ippei
Kume 1, Naoya Furutake 1, Takahiro Onodera 1, Shinobu Siato 1, Yoshihiro
Hayashi 1 |
| ’ |
6 |
Loss Investigation Using WD Product for On-Chip
Differential Transimission Lines |
Tokyo Inst. of Tech. 1@Fu Wanlin 1,ito Hiroyuki
1,Kimura Makoto 1,Okada Keniti 1,Masu Kazuya 1 |
| |
|
Break 11:30`11:45 |
|
| |
7 |
Carbon nanotube via interconnects using CMP |
MIRAI-Selete@*Hyakushima Takashi 1,Shioya Hiroki
1,Kondo Daiyu 1,Kawabata Akio 1,Sato Shintaro 1,Nihei Mizuhisa 1,Awano Yuji
1 |
| |
8 |
The impact on Cu interconnect properties by introduction
of Low-k Hard Mask. |
Sony Corp.@*Mizuno Ikue 1,Arakawa Shinichi 1,Ohoka
Yuaka 1,Kanamura Ryuichi 1 |
| |
9 |
A Metallurgical Prescription for Electromigration
(EM) Reliability Improvement |
NEC 1, NEC Electronics 2@Munehiro Tada 1, Mari
Abe 1, Naoya Furutake, Takashi Tonegawa 2, Kouichi Motoyama 2, Makoto Tohara
2, Makoto Ueki 1, Fuminori Ito 1, Tsuneno Takeuchi 1, Shinobu Saito 1, Kunihiro
Fujii 2, Makoto Sekine 2, Yoshihiro Hayahsi 1 |
| |
10 |
Cu diffusion through interlayer dielectric |
CASMAT 1, Sumitomo Bakelite Co., Ltd. 2@*Nobuhide
Maeda 1, Yoshio Takimoto 1, Michio Nakajima 2, Keisuke Funatsu 1 |
| |
11 |
Electrical study of an electroless CoWP as a drift
barrier for Cu ions |
AIST-ASRC 1, MIRAI-ASET 2, RCNS-Hiroshima Univ.
3@*Takenobu Yoshino 1, Masashi Shimoyama 2, Nobuhiro Hata 1, Takamaro Kikkawa
1,3 |
| |
|
Lunch 13:00`14:00 |
|
| 30p-ZN-@/ II |
| ’ |
1 |
Ionic Conduction Leakage current in Porous Silica
Films |
RCNS Hiroshima Univ. 1, Mitsui Chem. Catalyst Science
Lab. 2@*Kayaba Yasuhisa 1, Kohmura Kazuo 2, Kikkawa Takamaro 1 |
| |
2 |
Organic Silica Low-k Film by Plasma Polymerization
Method and Low-k/Cu Interconnects Characteristics |
MIRAI-ASET 1, NEC 2, MIRAI-ASRC AIST 3, RCNS Hiroshima
University 4@Jun Kawahara 1,2, Munehiro Tada 2, Shinichi Chikaki 1,2, Fuminori
Ito 2, Keizo Kinoshita 1,2, Yoshihiro Hayashi 2 and Takamaro Kikkawa 3,4 |
| ’ |
3 |
Pure silica zeolite films prepared by a vapor phase
transport method |
Hiroshima Univ. 1, Mitsui Chemicals Inc. 2@Cho
Yoshinori 1, Kohmura Kazuo 2, Kikkawa Takamoro 1 |
| ’ |
4 |
Surface modification of low dielectric porous diamond
film |
Hiroshima Univ 1@*Nishimura Yukinori 1, Nakazono
Kensuke 1, Sakaue Hiroyuki 1,Tkahagi Takayuki 1 |
| |
5 |
Design of porous SiOC film structure for etching
damage reduction |
SONY Corp. 1, Toshiba Corp. 2, NEC Electronics
Corp. 3
@*Kameshima Takatoshi 1, Shimayama Tsutomu 1, Okamoto Masaki 1, Enomoto
Yoshiyuki 1, Masuda Hideaki 2, Miyajima Hideshi 2, Usami Tatsuya 3 |
| |
6 |
Structural Analysis for UV-Modified SiOC Film by
Using Solvent Diffusion Technique |
Renesas Semiconductor Engineering Corp 1,Renesas
Technology Corp 2@S Hashii 1,N Miura 2,K Goto 2,M Matsuura 2,K Asai 2 |
| |
7 |
Atomistic Structure and Mechanism of UV Cure of
a Low-k Material |
NIMS 1,Univ. of Tokyo 2,SELETE 3@*Ushio Jiro 1,Hamada
Tomoyuki 2,Ohno Takahisa 1,2,Nakao Shin-Ichi 3,Yoneda Katsumi 3,Kato Manabu
3,Kobayashi Nobuyoshi 3 |
| |
8 |
PALS analysis of EB-irradiated SiOCH low-k dielectrics |
RIIF AIST 1, NMIJ AIST 2@*Ohdaira Toshiyuki 1,
Suzuki Ryoichi 1, Seino Yutaka 2 |
| |
9 |
What determines mechanical strength of silica skeleton? |
AIST 1@Hata Nobuhiro 1, Takada Syozo 1, Seino Yutaka
1, Takimura Toshinori 1 |
| |
10 |
Small angle x-ray scattering measurements of porous
low-k films using synchrotron radiation |
Fujitsu Labs. 1, Rigaku 2, JASRI 3, Fujitsu 4@*Suzuki
Takashi 1, Omote Kazuhiko 2, Ito Yoshiyasu 2, Hirosawa Ichiro 3, Nakata
Yoshihiro 1, Sugiura Iwao 4, Shimizu Noriyoshi 1, Nakamura Tomoji 1 |
| |
|
Break 16:30`16:45 |
|
| |
11 |
The Relationship between Pore Size and Void Fraction
/ Density in Porous Low-k Thin Films |
Toray Research Center 1, AIST 2, Rasa Industries
3, Honeywell Japan 4@*Hosomi Hiroyuki 1, Inoue Kensuke 1, Matsunobe Takeshi
1, Ohdaira Toshiyuki 2, Suzuki Ryoichi 2, Hashimoto Toshimasa 3, Nakano
Tadashi 4 |
| |
12 |
Structure Studies of UV Cured SiOC films |
Toray Research Center Inc.@*Miyoshi Riko, Matsuda
Keiko, Seki Hirofumi, Takahashi Kazumi, Okuyama Jyunko, Miwa Yuuko, Hashimoto
Hideki, Yoshikawa Masanobu |
| |
13 |
Evaluation of thermal effusivity of low-k thin
films using Thermal Microscope |
Nissan ARC,LTD. 1@*Okamura Takeo 1,Hattori Yuka
1,Kojima Nobuo 1, Sato Shigeo 1, Ye Jiping 1 |
| |
14 |
New deosition method of HfN barrier with radical
nitriding |
Kitami Inst. of Technol.@*Takeyama B. Mayumi 1,
Sato Masaru 1, Yashiki Masato 1, Noya Atsushi 1 |
| |
15 |
Preparation of extremely thin TiN barrier by using
hot-wire method for Cu interconnect |
kitami inst. of Technol.@*YANAGITA Tadayoshi 1,
TAKEYAMA B. Mayumi 1, NOYA Atsushi 1 |
| |
16 |
Evaluation of interface adhesion strength of Cu/Ta
cap layer |
Tohoku Univ. 1@*Shishido Yuichiro 1, Koike Jun-ichi
1 |
| |
17 |
Self-formed diffusion barrier property of Cu-Mn,
-Al and -Mg alloy films on SiO2
|
JST 1, Tohoku Univ. 2@J. Iijima 1, M. Haneda 2,
J. Koike 2 |
| |
18 |
Metal Ion Direction Control for Ionized PVD with
High Density Plasma |
Tokyo Electron AT 1,TTCA 2 @*Sakuma Takashi 1,Matsuda
Tsukasa 2,Yokoyama Osamu 1,Ikeda Taro 1,Hatano Tatsuo 1, Mizuno Shigeru
2, Mizusawa Yasushi 2 |
| |
19 |
Development of a flow-type supercritical fluid
deposition processor |
Univ. of Yamanashi 1@*Hirose Michiru 1,Kobayashi
Naotsugu 1,Kondoh Eiichi 1 |
| 11.4
Interconnect Technology |
| August 31 (Thu.) 9:00`12:00 |
| 31a-ZN-@/ II |
| |
1 |
Micro Scratch Reduction in Oxide CMP |
Hitachi,Ltd.Micro Device Division@*Sugaya Takahiro,Kawakubo
Masanori,Konishi Nobuhiro,Yamada Youhei |
| |
2 |
The optimization of high Cu removal rate slurry
with Voltammetry |
Kochi Univ. of Technology 1, Nitta Haas Inc. 2@*Matsumura
Yoshiyuki 1, Hirao Takashi 1, Kinoshita Masaharu 2 |
| |
3 |
Process End Point Detection Technology of Chemical
Mechanical Polishing by Target Spectrum |
MIRAI-ASET 1,NIKON 2,EBARA 3,NEC 4,MIRAI-ASRC-AIST
5,RCNS-Hiroshima-Unin. 6@*Akira Ishikawa 1,2,Hisanori Matsuo 1,3,Takehiko
Ueda 2,Housei Nakahira 2,Takahiro Onodera 4,Makoto Ueki 4,Yoshihiro Hayashi
4,Takamaro Kikkawa 5,6 |
| |
4 |
Impurity impact for Cu corrosion of plating film |
TOSHIBA Corp.Semiconductor Company@*Morita Masako,Morita
Toshiyuki, Hachiya Takayo,Toyoda Hiroshi,Hasunuma Masahiko,Kamijo Hiroyuki |
| |
5 |
Removal of Photoresists Using Supercritical Carbon
Dioxide after Dry Etching of a Low-k Material (2) |
Sony Corp. 1, ATMI,Inc. 2@*Saga Koichiro 1, Kuniyasu
Hitoshi 1, Hattori Takeshi 1, Visintin Pamela 2, Korzenski Michael 2, Thomas
Baum 2 |
| |
6 |
Removal of Etching Residues on Porous Low-k Films
Using Supercritical Carbon Dioxide (2) |
Sony Co.UCT Research Laboratory 1@Murata Yuuji
1,Saga Kouichirou 1,Kuniyasu Hitoshi 1,Hattori Takeshi 1 |
| |
|
Break 10:30`10:45 |
|
| |
7 |
Dry cleaning of copper surface: a study of dimer-concentration
for formic acid vapor |
Fujitsu1, Tokyo Electron2, Ebara3@Fujitsu1, Tokyo
Electron2, Ebara3 |
| |
8 |
Study of Dry Cleaning for Cu Surface |
Fujitsu1, Tokyo Electron2, Ebara3@*Masakazu Hayashi1,
Kenji Ishikawa1, Hidenori Miyoshi2, Hideki Tateishi3 |
| |
9 |
Al interconnect corrosion suppression using eco-friendly
chemical, choline |
TOSHIBA Corp. Semiconductor Company@Yasuhito Yoshimizu
1, Tsuyoshi Matsumura 1, Takashi Hirayama 1, Yoshihiro Uozumi 1, Hiroshi
Tomita 1 |
| £ |
10 |
Control of CoSi2 encroachment in 60nm Flash device
Co salicide structure |
Semiconductor R&D center, Samsung Electronics Co.,
Ltd@W. S. Shin, S. W. Shin, H. J. Kim, S, W, Lee, Y. T. Ma, D. J. Kang,
H. S. Lim, J. H. Han, J. H. Kim, J. L. Nam, H. D. Lee, and J. T. Moon |
| |
11 |
Raman study on formation of Ni-silicide by thermal
treatment condition |
Kyoto Inst.Tec. 1,Wakayama Univ. 2,WaferMasters
3@*Sasaki Takashi 1,Nishibe Shintaro 1,Isshiki Toshiyuki 1,Yoshimoto Masahiro
1,Harima Hiroshi 1,Kisoda Kenji 2,Fukada Takashi 3,Woo Sik Yoo 3 |
| 11.5
Si Process Technology |
| August 29 (Tue.) 10:00`17:30 |
| 29a-ZQ-@/ II |
| |
1 |
DOF extension method for phase-modulators (2) |
ALTEDEC 1@*Endo Takahiko 1,Taniguchi Yukio 1,Ohno
Takashi 1,Azuma Kazufumi 1,Hiramatsu Masato 1,Matsumura Masakiyo 1 |
| |
2 |
Feasibility Study on the Location and Orientation
Control of Si Thin-Film Grain in Excimer-Laser Annealing Process |
Kyushu Univ. 1@*Nakagawa Gou 1, Asano Tanemasa
1 |
| |
3 |
Depth control of nucleation site by hydrogen distribution |
Univ. of Hyogo 1, Osaka Univ. 2,@Yamaguchi Univ.
3 @*A. Heya1, K. Oda1, T. Serikawa2, N. Kawamoto3, N. Matsuo1 |
| |
4 |
Formation of crystallized Si film by ELA on plastic
substrate(1)
-Effect of SiNX thermal barrier film- |
Univ. Hyogo 1,JAIST 2,Yamaguchi Univ. 3@*Akitsu
Shogo 1,Heya Akira 1,Takanashi Yasuyuki 1,Akamatsu Takayuki 1,Kawamoto Naoya
3,Nishizaki Shogo 2,Ohdaira Keisuke 2,Matsumura Hideki 2,Matsuo Naoto 1 |
| ’ |
5 |
Crystallization of silicon thin films by laser
irradiation in water |
Kochi College of Technology@*Machida Emi 1, Ikenoue
Hiroshi 1 |
| |
6 |
Study of laser scanning methods on Continuous Wave
laser annealing for thin Si films |
Graduate School of Engineering, Tohoku Univ. 1@*Fujii
Shuntaro 1, Kuroki Shin-Ichiro 1, Kotani Koji 1, Ito Takashi 1 |
| |
|
Break 11:30`11:45 |
|
| |
7 |
Change of the Crystallinity of Polycrystalline
Si Prepared by Solid Green Laser |
Yamaguchi Univ.1, Graduate school of Univ of Hyogo.2@*Ueno
Kiyoshi 1,Kawamoto Naoya 1,Matuo Naoto 2,Ishikawa Hitoshi 1,Fujiwara Toshihisa
1,Miyoshi Tadaki 1,Heya Akira 2 |
| |
8 |
Κ-PCD Measurement of Double-Layered Si Thin Films
Crystallized by Solid Green Laser Annealing |
NAIST 1, AIST 2 @*Yuta Sugawara 1, Yukiharu Uraoka
1, Takashi Fuyuki 1, Akio Mimura 2 |
| |
9 |
Rapid Crystallization of Silicon Films Using Infrared
Semiconductor Laser |
Tokyo University of A&T 1, Hightec Systems 2@Andoh
Nobuyuki 1,Maki Masato 1, Sameshima Toshiyuki 1,Sano Naoki 2 |
| |
10 |
Rapid Thermal Annealing of Amorphous Ge Films Using
Semiconductor Diode Laser |
Hiroshima Univ. 1@Kohei Sakaike 1, Seiitiro Higashi
1, Tutomu Sakata 1, Hirotaka Kaku 1,
Hideki Murakami 1, Seiiti Miyazaki 1 |
| |
11 |
Grain Boundaries and Raman Spectra of Low-Temperature
Polycrystalline Si Thin Films |
Shimane Univ.@Yasutaka Ohashi 1, Sin Matsumoto
1, Kuninori Kitahara 1 |
| |
|
Lunch 13:00`14:00 |
|
| 29p-ZQ-@/ II |
| |
1 |
Activation of poly-Si thin-film by laser annealing |
Univ. of the Ryukyus@Takashi NOGUCHI |
| |
2 |
Crystallization of Si thin films for bottom-gate-TFT
by Rapid Thermal Annealing |
Jpn. Adv. Inst. Sci. & Tech. (JAIST) 1,R&B center,
Ushio Inc 2@*Nishizaki Shogo 1,Ohdaira Keisuke 1, Karasawa Takeshi 2, Torikai
Tetuya 2, Matsumura Hideki 1 |
| |
3 |
X-TEM Observations of Low-Temperature-Crystallized
Si Film on Polycrystalline (111) YSZ Film |
Jpn. Adv. Inst. Sci. & Tech. (JAIST)@*K. Higashimine,
K. Kanazawa, K. Nishioka, M. Koyano, S. Horita |
| |
4 |
Crystallization of a-Si film by Laser-Plasma X-ray
(1).-Crystallization apparatus and preliminary evaluation of the film- |
Dept.Mat.Sci.&Chemi.,Univ.Hyogo 1,LASTI Univ.Hyogo
2,NIPPON GIJUTSUCENTER CO.,LTD 3, MEISYO KIKO.,LTD 4@*Uejukkoku Kazuya 1,Heya
Akira 1,Amano Sho 2,Sakoya Syo 1,Miyamoto Shuji 2, Takesako Ryouichi 3,Adachi
Masashi 4,Matsuo Naoto 1,Mochizuki Takayasu 2 |
| |
5 |
Improvement of poly-Si films via 2step crystal
growth in Reactive thermal CVD(RTCVD) |
Tokyo Tech. 1.@*Cheolhyun Lim 1, Junichi Hanna
1 |
| |
6 |
Formation of Polycrystalline Si Thin Films Using
Nanocrystalline Ge Nuclei |
Graduate School of Engineering, Osaka Univ. 1@*Minami
Kousuke 1,Yoshimoto Tiaki 1,Ohmi Hiromasa 1,Shimura Takayoshi 1, Kakiuchi
Hiroaki 1,Watanabe Heiji 1,Yasutake Kiyoshi 1 |
| |
7 |
Ion Implantation Condition of Low Temperature Fabrication
Method of Source Drain Region |
Univ. of Yamanashi 1, Musashi Inst. of Technology
2@*Mitsui Minoru 1, Arimoto Keisuke 1, Nakagawa Kiyokazu 1, Sawano Kentarou
2, Yasuhiro Shiraki 2 |
| |
|
Break 15:45`16:00 |
|
| |
8 |
Deposition of semiconductor micro-chips onto organic
substrates by Micro-Assembling Technology |
JAIST 1, JST 2@Ishizuka Ryohei 1, Ohdaira Keisuke
1, Matsumura Hideki 1, Ishikawa Masayuki 2 |
| |
9 |
Real Time monitoring of the rapid recrystallization
of amorphous silicon utilizing thermal plasma jet |
Saitama Univ. 1,RIKEN 2@*Yeo@MinA 1,Sakurai Yuusuke
1,Haruta Kouji 1,Kobayasi Tomohiro 2,Shirai Hajime 1 |
| |
10 |
Electric Characteristics of Lightly Doped Si Films
Crystalized by Thermal Plazma Jet Irradiation |
Grad. School of Advanced Sciences of Matter, Hiroshima
Univ. 1,
Tokyo Univ. of Agriculture and Technology. 2@*Yorimoto Takuya 1, Higashi
Seiichirou 1, Kaku Hirotaka 1, Okada Tatsuya 1,
Murakami Hideki 1, Miyazaki Seiichi 1, Maki Masato 2, Sameshima Toshiyuki
2 |
| |
11 |
Study on current distribution measurement in low-temperature
poly-Si layer |
CQSTEC Osaka Univ.@*Kohichi Tanaka 1, Yuya Mori
1, Satoshi Abo 1, Fujio Wakaya 1, Mikio Takai 1 |
| |
12 |
Photovoltaic Power of Simple Type MOS Solar Cell
by Anodization
|
Toyama National College of Maritime Technology
1@*Aburatani Kazunori 1,Mizuno Yoshichika 1 |
| |
13 |
Preparation and properties of a-Si:H films including
quantum wires |
Tokyo Denki Univ. 1@*Iida Mihoka 1, Natori Emi
1, Motohashi Mituya 1, Homma Kazuaki 1 |
| 11.5
Si Process Technology |
| August 30 (Wed.) 10:00`19:00 |
| 30a-ZQ-@/ II |
| ’ |
1 |
Low temperature poly-Si TFT floating gate memory
with Si nano crystal dot |
NAIST1,NISSIN ELECTRIC CO.,LTD2@*Ichikawa Kazunori1,Yano
Hiroshi1,Hatayama Tomoaki1,Uraoka Yukiharu1, Fuyuki Takashi1,Tomyo Atsushi2,Takahashi
Eiji2,Hayashi Tsukasa2,Ogata Kiyoshi2 |
| |
2 |
Analysis of Threshold Voltage for Si-TFTs-1 |
Tokyo A&T Univ.1, Ryukoku Univ.2@H. Hayasaka1,
*T. Sameshima1 and M. Kimura2 |
| |
3 |
Analysis of Threshold Voltage for Si –TFTs-2 |
Tokyo A&T Univ.1, Ryukoku Univ.2@*T. Sameshima1
H. Hayasaka1 and M. Kimura2 |
| |
4 |
Current-Voltage Characteristics in Polycrystalline
Si Thin Film Transistors |
Osaka univ. JWRI11.5@Serikawa Tadashi
|
| |
5 |
Influence of Grain Boundaries on Hot-Carrier Generation
and Degradation in Ultra-Thin LTPS TFTs |
Shimane Univ. 1,ALTEDEC 2@*Miura Takafumi 1,Kawachi
Genshiro 2,Matsumura Masakiyo 2,Tsuchiya Toshiaki 1 |
| |
6 |
Extraction Technique and Actual Result of Trap
Density at Grain Boundaries in poly-Si TFTs using Device Simulation |
Ryukoku Univ. 1@Yoshino Takuto 1, Harada Kiyoshi
1, Yasuhara Tohru 1, Kimura Mutsumi 1 |
| |
|
Break 11:30`11:45 |
|
| |
7 |
Analysis of Off Current in Poly-Si TFTs using Device
Simulation and Measurement |
Ryukoku Univ. 1@Kimura Mutsumi 1 |
| |
8 |
Dependence Analysis of Poly-Si TFT Characteristic
on Grain Boundary Location using Simulation and Measurement |
Ryukoku Univ. 1@Kimura Mutsumi 1 |
| |
9 |
Reliability of Low-Temperature Poly-Si Thin Film
Transistors with ultra thin gate oxide |
NAIST 1,Osaka Univ. 2@*Ueno Hitoshi 1,Sugawara
Yuta 1,Yano Hiroshi 1,Hatayama Tomoaki 1,Uraoka Yukiharu 1,Fuyuki Takashi
1,Serikawa Tadashi 2 |
| |
10 |
Analysis of degradation of p-channel low-temperature
poly-Si TFTs using two-dimensional simulation |
Tokyo Polytech.Univ.@Yamagata Masahiro,Satou Tosihumi,*Tango
Hiroyuki |
| |
11 |
A hot-carrier degradation model of low-temperature
n-channel poly-Si TFTs |
Tokyo Polytech. Univ.@Hirata Seishiro,Yajima Toshihisa,Satoh
Toshihumi,Tango Hiroyuki |
| |
|
Lunch 13:00`14:00 |
|
| 30p-ZQ-@/ II |
| |
1 |
Quantitative evaluation for ion-implantation-induced
mixing of silicon atoms |
Keio Univ. 1, CREST-JST 2, Musashi Inst. Tech.
3, NTT-AT 4@*Yasuo Shimizu 1, Kohei M. Itoh 1,2, Toshiko Okui 3, Yasuhiro
Shiraki 3, Akio Takano 4 |
| |
2 |
Numerical Calculation of Silicon Wafer Temperature
during Flash Lamp Annealing (2) |
Yokohama Nat. Univ. 1, Ushio Electric 2@*Hara Akiko
1, Habuka Hitoshi 1, Karasawa Takeshi 2, Yoshioka Masaki 2, Takeuchi Takashi
1, Aihara Masahiko 1 |
| |
3 |
Ion-implantation Technology to Deep Trench Sidewall(II) |
Fuji Electric Advanced Technology Co., Ltd.@*Takahashi
Kouta 1,Yajima Ayako 1,Ueki Yuko 1,Mochizuki Kunio 1,Nakazawa Haruo 1 |
| |
4 |
Characterization of Boron/Phosphorus layer by Cold/Heat
Ion Implantation(III) |
Fuji Electric AT 1,Fuji Electric DT 2@Nakazawa
Haruo 1,Nakahara Yukari 1,Kirisawa Mitsuaki 2 |
| |
5 |
Analytical model for redistribution profile of
ion implanted impurities during solid phase epitaxy |
Fujitsu Lab. 1, Nano Science 2, Evans 3, Nissin
ion 4@*Kunihiro Suzuki 1, Yoko Tada 1, Yuji Kataoka 1, Susumu Nagayama 2,
C. H. Magee 3, T. H. Bueyueklimanli 3, Tsutomu Nagayama 4 |
| |
6 |
Phosphorus and Boron Ion Implantation Profiles
in Molybdenum Gates |
Fujitsu Labs. Ltd. 1@*Tada Yoko 1,Suzuki Kunihiro
1 |
| |
7 |
A Novel Laser Annealing Process for Advanced CMOS
with Suppressed Gate Depletion and Ultra-shallow Junctions |
Central Research Laboratory, Hitachi,Ltd.@* Shima
Akio, Mine Toshiyuki, Torii Kazuyoshi |
| |
8 |
Development of brass X-ray rotating anode and its
application to cristallinity evaluation of ultra-shallow boron-implanted
Si(001) |
Univ. of Hyogo,LASTI Univ. of.Hyogo@*Hayashi Kazuki
1,Abe Maiko 1,Takahata Sayuri 1,Kazunori Fukuda 1,Tsusaka Yoshiyuki 1,Takano
Hidekazu 1,Kagoshima Yasushi 1,Matui Jyunji 1,Toyoda Noriyuki 2,Yamda Isao
2 |
| |
9 |
Ultra-low energy ion implantation in Si II |
RIIF-AIST@*Hiroshi Itoh, Kazuhiro Yamamoto |
| |
|
Break 16:15`16:30 |
|
| |
10 |
Spike RTA Induced Changes in Chemical Bondings
and Their Depth Profile of Plasma-Doped Boron |
Musashi Inst.of Techonol. 1,JASRI/SPring-8 2,IGSE,Tokyo
Tech. 3,
UJT Lab. 4,FCRC,Tokyo Tech. 5@*Matsuda Toru 1,Nohira Hiroshi 1,Ikenaga Eiji
2,Kobayashi Yusuke 3,
Jin Cheng-Guo 4,Okashita Katsumi 4,Sasaki Yuichiro 4,Ito Hiroyuki 4,
Kakushima Kuniyuki 5,Tsutsui Kazuo 3,Mizuno Bunji 4,Iwai Hiroshi 5,
Hattori Takeo 5, |
| ’ |
11 |
8nm(5E18cm-2) ultra shallow junction formation
by double-pulsed green laser annealing |
Keio Univ. 1,Other 2@+Tanaka Yuuki 1,Yamada Ryuuta
1,Matsumoto Satoru 1,Fuse Genshu 2,Suzuki Toshiharu 2,Kudou Toshio 2, Sakuragi
Susumu 2 |
| |
12 |
Ge Preamorphization by Xe+ Implantation
Aiming to Ultara Shallow Junction Formation |
RCNS, Hiroshima Univ. 1, Grad. School of ADSM,
Hiroshima Univ. 2@Fukunaga Tetuya 1,2, Hosoi Takuji 1, Hosawa Kosei 1,2,
Shibahara Kentaro 1,2 |
| |
13 |
Boron ion implantation profiles in Ge substrates |
MIRAI-ASET 1, MIRAI-AIST 2@Suzuki Kunihiro 1, Ikeda
Keiji 1, Yamashita Yoshimi 1, Takagi Shin-ichi 2 |
| £ |
14 |
Suppression Effects of Dopant Out Diffusion by
Capping Oxide on Elevated PN Diode Characteristics |
Samsung Electronics Co., Ltd@H. Kim, C. H. Lee,
J.S. Jeon, K. S. Lee, K .E .Lee, D. H. Kim, Y. S. Jo, J.R. Nam, H. D. Lee,
J. T. Moon |
| |
15 |
Development of single ion detection system by detecting
current variation |
Waseda Univ. 1,ASMeW 2,Waseda ZAIKEN 3 @*Hideki
Nakayama 1,Takahiro Shinada 2,Takahiro Kobayashi 1,Tomonori kurosawa 1,Yanwei
Zyu 1,Iwao Ohdomari1,2,3 |
| £ |
16 |
A study of oxide contamination effect on the square
pit in silicon |
Semiconductor R&D center, Samsung Electronics Co.,
Ltd@0C. H. Lee, D. H. Yoo, K. S. Lee, S. J. Park, J. J. Han, Y. W. Hyung,
Y. S. Jo, D. H . Kim, J. S. Jeon, J. L. Nam, H. D. Lee, J. T. Moon
|
| |
17 |
Evaluation of phosphorous atoms in nano-Si wires
(4) |
Waseda Univ. 1, Waseda Zaiken 2@*Aya Seike 1, Sano
Itutaku 1, Tange Tomoyuki 1, Sugiura Yuuki 1, and Ohdomari Iwao 1,2 |
| |
18 |
Evaluation of oxidization condition dependence
on phosphorous redistribution in Si nano-wire |
Waseda Univ. 1, Waseda Zaiken. 2@*Tomoyuki Tange
1, Itsutaku Sano 1, Yuuki Sugiura 1, Aya Seike 1, Iwao Ohdomari 1,2 |
| |
19 |
Evaluation of electrical properties of phosphorous
ions in parallel connected Si nano-wires |
Waseda Univ. 1,Waseda Zaiken 2@*Sugiura Yuki 1,Tange
Tomoyuki 1,Sano Itsutaku 1,Seike Aya 1,Ohdomari Iwao 1,2 |
| 11.5
Si Process Technology |
| August 31 (Thu.) 10:00`18:45 |
| 31a-ZQ-@/ II |
| |
1 |
Improvement of Thermal Stability of Ni silicide
on N+-Si by using an Al interlayer |
Tokyo tech.FCRC 1,Tokyo tech.IGSSE 2@*Ohishi Yoshihisa
1,Nagahiro Kouji 1,Shiozawa Takashi 1,Parhat Ahmet 1, Kakushima Kuniyuki
2,Tutui Kazuo 2 ,Hiroshi Iwai 1 |
| |
2 |
Improvement of Thermal Stability of NiSi by Post
Silicidation Metal Doping |
Tokyo Tech FCRC. 1. Tokyo Tech. IGSSE 2@*M.Adachi
1. K.Nagahiro 1. T.Shiozawa 1. P.Ahmet 1. K.Kakushima 2. K.Tsutsui 2. H.Iwai
2. |
| |
3 |
Chemical Vapor Deposition of Ni-silicide II |
Trichemical Laboratories Inc. 1, Meiji Univ. 2,
Toyota Technological Inst. 3 @Masato Ishikawa 1 2, Ikuyo Muramoto 1, Hideaki
Machida 1, Satoshi Imai 2, Atsushi Oura 2,Yoshio Ohshita 3
|
| ’ |
4 |
In-Situ TEM Observation of Ni-Silicide Formation
for FUSI Gate |
Hiroshima Univ. 1, NIMS 2@Hosoi Takuji 1, Shibahara
kentaro 1, Song Minghui 2, Furuya Kazuo 2 |
| |
5 |
Ni3Si fully silicided gate formation
process for 45nm-node CMOSFETs |
NEC System Devices Res. Labs.@*Ogura Takashi 1,
Saitoh Motofumi 1, Takahashi Kensuke 1, Terai Masayuki 1, Hase Takashi 1,
Masuzaki Kouji 1, Toda Akio 1, Manabe kenzou 1, Watanabe Kouji 1, Iwamoto
Toshiyuki 1, Tatsumi Toru 1 |
| ’ |
6 |
Study of peeling process at doped-NiSi/SiO2
interface |
Toray Research Center Inc. 1,Fujitsu Laboratories
Ltd. 2 @*Masahiro Saito 1,Keiko Matsuda 1,Mototaka Ito 1,Takashi Miyamoto
1,Tomomi Sugimoto 1,Takashi Yamamoto 1,Kimihiko Hosaka 2,Takayuki Aoyama
2 |
| |
7 |
Evaluation of Chemical Structures and Work Function
of Ni-Silicide near the Interface between Ni-Silicide and SiO2
(II) |
Grad. School of AdSM, Hiroshima Univ. 1, Fujitsu
Lab. Ltd. 2, selete 3, RCNS, Hiroshima Univ. 4@*Yoshinaga Hiromichi 1, Ohta
Akio 1, Munetaka Yuuki 1, Murakami Hideki 1, Azuma Daisuke 1, Higashi Seiichiro
1, Miyazaki Seiichi 1, Aoyama Takayuki 2,3, Hosaka Kimihiko 3, Shibahara
Kentaro 1,4 |
| |
8 |
Electrical properties of epitaxial NiSi2/Si(001)
contacts with the extremely flat interface made from Ni/Ti/Si stacked layer
structure |
Graduate School of Eng. 1, ESI 2, CCRAST 3, Nagoya
Univ.@Atsushi Suzuki 1, *Osamu Nakatsuka 2, Akira Sakai 1, Masaki Ogawa
3, Shigeaki Zaima 1 |
| |
9 |
Thermal stability of Mo-Ta dual metal gates for
gate-first processes |
AIST NeRI 1@*Matsukawa Takashi 1,Liu Yongxun 1,Endo
Kazuhiko 1,Masahara Meishoku 1,Ishii Kenichi 1,Yamauchi Hiromi 1,Tsukada
Junichi 1,Suzuki Eiichi 1 |
| ’ |
10 |
Composition Dependences of crystalline and electrical
properties in Pt-Ge Gate Electrode |
Graduate School of Engineering Nagoya Univ. 1,CCRAST
Nagoya Univ. 2@*Ikeno Daisuke 1,Furumai Kouhei 1,Kondo Hiroki 1,Sakashita
Mitsuo 1, Sakai Akira 1,Ogawa Masaki 2,Zaima Shigeaki 1 |
| |
11 |
Selectively W Growth technology on the Gate/Source/Drain
of the 90nm CMOS@device (Lg=38nm) |
Fujitsu Ltd. 1, Fujitsu Lab. Ltd. 2@*Shinichi Akiyama
1, Yasunori Uchino 1, Masaki Okuno 2, Kazuo Kawamura 1, Kenichi Yanai 1,
Masafumi Nakaishi 1, Masataka Kase 1 |
| |
|
Lunch 12:45`14:00 |
|
| 31p-ZQ-@/ II |
| |
1 |
Formation of Si Nanocrystals from SiOx
Films Induced by Rapid Thermal Annealing Using Thermal Plasma Jet |
Hiroshima Univ. 1@*Okada Tatsuya 1, Higashi Seiichiro
1, Kaku Hirotaka 1, Yorimoto Takuya 1, Murakami Hideki 1, Miyazaki Seiichi
1 |
| £ |
2 |
Thermally-induced formation of Si island array
on an ultrathin (110) silicon-on-insulator substrate |
Shizuoka Univ. 1@*Youjun Fan 1, Zainal Burhanudin
1, Daniel Moraru 1, Ratno Nuryadi 1, Michiharu Tabe 1 |
| |
3 |
Study of diffusion process of molecular oxygen
in silicon dioxide film with molecular dynamics simulation |
Waseda Univ. 1, Waseda Nano Inst. 2, PRESTO-JST
3@*Hiromichi Ohta 1, Watanabe Takanobu 1,2,3, Ohdomari Iwao 1,2 |
| |
4 |
Prediction of Leakage Current on Semiconductors
Based on Integrated Computational Chemistry |
Dept. Appl. Chem., Tohoku Univ. 1, JST-PRESTO 2,
NICHe, Tohoku Univ. 3@*Endou Akira 1, Onuma Hiroaki 1, Arunabhiram Chutia
1, Zhu Zhigang 1, Tsuboi Hideyuki 1, Koyama Michihisa 1, Takaba Hiromitsu
1, Kubo Momoji 1,2, Del Carpio Carlos A. 1, Miyamoto Akira 1,3 |
| ’ |
5 |
A Study on Uniform Si-island Formation for SBSI
Process |
Tokyo Tech 1@*Notake Kouki 1,Yahashi Kenichi 1,Ohmi
shunichirou 1 |
| ’ |
6 |
Formation of ultrathin SOI/BOX layer by SBSI technology |
Tokyo Inst of Technology@*Yahashi Kenichi 1, Notake
Kouki 1, Ohmi Syunichirou
|
| |
7 |
Surface Processing of Si wafers by Gas Cluster
Ion Beam Irradiation. |
TOSHIBA CERAMICS 1,Univ. of Hyogo@*Isogai Hiromichi
1,Toyoda Eiji 1,Senda Takeshi 1,Izunome Koji 1,Kashima Kazuhiko 1,Toyoda
Noriaki 2,Yamada Isao 2 |
| |
8 |
Study of Si wafer surface irradiated by gas cluster
ion beams |
TOSHIBA CERAMICS 1,Univ. of Hyogo 2@*Toyoda Eiji
1,Isogai Hiromichi 1,Senda Takeshi 1,Izunome Koji 1,Kashima Kazuhiko 1,Toyoda
Noriaki 2,Yamada Isao 2 |
| ’ |
9 |
Evaluation of strain at Si3N4/Si
interface by UV/Visible Raman spectroscopy |
Meiji Univ. 1,STARC 2@*Kosemura Daisuke 1,Yamasaki
Kosuke 1,Kakemura Yasuto 1,Yoshida Tetsuya 1, Ogura Atsushi 1,Uchida Hidetsugu
2,Hattori Nobuyoshi 2,Yoshimaru Masaki 2 |
| |
|
Break 16:15`16:30 |
|
| |
10 |
Strain and thermal stability of SiO2/Si/SiO2
structures |
NTT Basic Research Labs. 1, Univ. Hyogo 2, CAST
3@Omi Hiroo 1, Kawamura Tomoaki 1, Kobayashi Yoshihiro 1, Fujikawa Seiji
2, Tsusaka Yoshiyuki 2, Kagoshima Yasushi 2, Matsui Junji 3 |
| |
11 |
Performance of Automatic Raman Spectroscopic Metrology
System for Semiconductor Device Evaluation |
HORIBA Ltd. 1@*Naka Nobuyuki 1, Kashiwagi Shinsuke
1, Ohtsuki Kunio 1 |
| |
12 |
Evaluation of local and global strain in Si by
means of in-plane X-ray diffraction |
Meiji Univ. 1, JASRI 2@*Yamasaki Kosuke 1, Kosemura
Daisuke 1, Kakemura Yasuto 1, Yoshida Tetsuya 1, Ogura Atsushi 1, Hirosawa
Ichiro 2, Kitano Akiko 2 |
| |
13 |
Mechanisms of inhibition of SiGe growth on dielectrics |
Fujitsu Ltd. 1, Fujitsu Laboratories Ltd 2@Masahiro
Fukuda 1, Yosuke Shimamune 2, Masaaki Koizuka 1, Katsuaki Ookoshi 1, Toshifumi
Mori 1, Naoyoshi Tamura 2, Masataka Kase 1 |
| |
14 |
Factrial experiment of facet structure for Selective
SiGe epitaxial growth |
TOSHIBA CORPORATION Semiconductor Company@*Shinji
Mori1,Tsutomu Sato1,Ichiro Mizushima |
| |
15 |
Lattice Constant Estimation of Epitaxial Layers
on Silicon Substrates Using Highly Parallel X-ray Microbeams |
Graduate School of Material Science Univ. of Hyogo
1,
TOYOTA CENTRAL R&D LABS., INC 2@Sayuri Takahata 1, Maiko Abe 1, Kazuki Hayashi
1, Kazunori Fukuda 1, Yoshiyuki Tsusaka 1, Hidekazu Takano 1, Yasushi Kagoshima
1, Tomoyuki Yoshida 2,
Yoshiharu Hirose 2, Takahide Sugiyama 2
|
| |
16 |
Atomic passivation of germanium surfaces by sulfur |
MIRAI-AIST1, U. Tokyo2, ISSP U. Tokyo3@Tatsuro
Maeda1, Shinichi Takagi1,2, Tsuyoshi Ohnishi3, Mikk Lippmaa3 |
| |
17 |
Reaction Analysis of High-Temperature Silicon Dioxide
LPCVD (2) |
Fuji Electric Adv. Tech. M&S Lab. 1, Fuji Electric
Adv. Tech. Semicon. Lab. 2, The Univ. of Tokyo 3@*Ryosuke Shimizu 1, Masaaki
Ogino 2, Shigeru Sakai 2, Yukihiro Shimogaki 3 |
| £ |
18 |
Process Improvement of FRAM Integration by Using
Alignment Mark Design |
Samsung Electronics 1@*Yong-Ju Jung 1, Hwa-Young
Ko 1, Joon-Soo Park 1, Suk-Hun Choi 1, Kyungrae Byun 1, Sukho Joo 1, Yoonho
Son 1, Min-Jong Hong 1, JinHwan Hahm 1, GI-Sung Yeo 1, HanKu Cho 1, Joo-Tae
Moon 1 |
| 11.6
Si Devices/Integration Technology |
| August 29 (Tue.) 10:00`16:30 |
| 29a-ZR-@/ II |
| |
1 |
Electric property of cobalt bio-nano-core embedded
MOS devices |
NAIST 1, Matsushita ATRL 2@*Miura Atsushi 1, Uraoka
Yukiharu 1, Fuyuki Takashi 1, Yoshii Shigeo 2, Yashita Ichiro 1,2
|
| ’ |
2 |
Surface modification of Nanocrystalline Si dots
in suspension |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1, SORST-JST 2@Takashi Mukai 1, Atsuyuki Tanaka 1,2, Yoshishige Tsuchiya
1,2, Kouichi Usami 1, Hiroshi Mizuta 1,2, Shunri Oda 1,2 |
| ’ |
3 |
Assembly of nanocrystalline Si dots with LB method |
QNERC & Dept. of Physical Electronics, Tokyo Tech
1,SORST-JST 2,Central Research Laboratory, Hitachi, Ltd 3@*Atsushi Tanaka
1,2,Yoshishige Tsuchiya 1,2,Kouichi Usami 1,Shinichi Saito 3, Tadashi Arai
3,Hiroshi Mizuta 1,2,Syunri Oda 1,2 |
| ’ |
4 |
Fabrication of Si multiple quantum dot array device |
Quantum Nanoelectronics Research Ctr., Tokyo Tech.
1, Dept. of Physical Electronics, Tokyo Tech. 2@*Yamahata Gento 1, Tsuchiya
Yoshishige 1, Mizuta Hiroshi 2, Oda Shunri 1,2 |
| |
5 |
Numerical study on turnstile operation in multidot
systems |
Shizuoka Univ. 1@*Hiroya Ikeda 1, Takumi Masuda
1, Kiyohito Yokoi 1, Michiharu Tabe 1 |
| ’ |
6 |
Abinitio phonon analysis on SiO2/Si/SiO2 nano structure |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1,Mechanical Research Lab.,Hitachi Ltd. 2@*Shunichiroh Sawai 1, Satoshi
Higashijima 1, Tsuchiya Yoshishige 1, Masakuni Okamoto 2, Hiroshi Mizuta
1, Shunri Oda 1 |
| |
|
Break 11:30`11:45 |
|
| ’ |
7 |
Integration of double nanocrystalline Si quantum
dots and a single-electron transistor |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1,SORST-JST 2@*Kawata Yoshiyuki 1,Karafalla Mohamed 1,Usami Kouichi 1,Tsuchiya
Yoshishige 1,2,Mizuta Hiroshi 1,2,Oda Syunri 1,2 |
| £’ |
8 |
Multiple gates silicon SET with tunable tunnel
barrier for RF-SET applications |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1,SORST-JST@*M. Manoharan 1,Yoshiyuki Kawata 1, Hiroshi Mizuta 1,2 Shunri
Oda 1,2 |
| |
9 |
Investigation on the Physical Origin of Negative
Differential Conductance in Silicon Single-Electron and Single-Hole Transistor |
Univ. of Tokyo@Kobayashi Masaharu 1,Miyaji Kousuke
1,Toshiro Hiramoto 1 |
| ’ |
10 |
Quantum Structure of Silicon Quantum Dot in Ultranarrow-Wire
and Their Impact on Coulomb Blockade Oscillations |
Univ. of Tokyo@Masaharu Kobayashi 1,Toshiro Hiramoto
1 |
| ’ |
11 |
Room Temperature Demonstration of Variable Full
Width Half Maximum of Coulomb Oscillation Silicon Single-Hole Transistor |
IIS, Univ. of Tokyo 1@*Kousuke Miyaji 1, Toshiro
Hiramoto 1 |
| |
|
Lunch 13:00`14:00 |
|
| 29p-ZR-@/ II |
| £ |
1 |
Photo-sensitive single-hole-tunneling SOI-FETs |
Research Inst. of Electronics, Shizuoka Univ. 1@*Burhanudin@Zainal
1, Nuryadi Ratno@1, Tabe Michiharu 1 |
| |
2 |
Photo Illumination Effect on SOI-MOSFETs Embedding
Dislocation Network |
Shizuoka Univ. 1,Univ. of Tokyo 2@*Ratno Nuryadi
1,Toshiya Ishino 1,Ryuichi Yamano 1, Yasuhiko Ishikawa 2,Michiharu Tabe
1 |
| £ |
3 |
Coulomb gap conductance resonances in a nanocrystalline
silicon point-contact transistor |
Tokyo Inst. Tech. 1, Cambridge Univ. 2, JST-SORST
3@*Mohammed Khalafalla1,3, Hiroshi Mizuta1,3, Shunri Oda1,3, and Zahid Durrani2,3 |
| ’ |
4 |
Fabrication and evaluation of Si nano bridge transistor |
QNERC & Dept. of Physical Electronics, Tokyo Tech
1, SORST-JST 2@*Jun Ogi 1, M.A.H. Khalafalla 1, Tasuku Nagami 1, Yoshishige
Tsuchiya 1,2, Hiroshi Mizuta 1,2, Shunri Oda 1,2 |
| £’ |
5 |
Single-electron transfer through multiple tunnel
junctions in phosphorous-doped Si nanowire |
Research Inst. of Electronics, Shizuoka Univ. 1,
NTT Basic Research Labs. 2@*Moraru Daniel 1, Ono Yukinori 2, Inokawa Hiroshi
1, Yokoi Kiyohito 1, Ratno Nuryadi 1, Ikeda Hiroya 1, Tabe Michiharu 1 |
| |
6 |
Impurity conduction in phosphorus-doped SOI MOSFETs |
NTT BRL 1, Shizuoka Univ.2, Akita Univ.3, Hokkaido
Univ.4,@Yukinori Ono 1, J.-F. Morizur 1, Katsuhiko Nishiguchi 1, Kei Takashina
1, Hiroshi Yamaguchi 1, Hiroshi Inokawa 2, Seiji Horiguchi 3, Yasuo Takahashi
4
|
| |
7 |
Discreteness Evaluation of Impurities in Low Doped
Si Resistors |
Waseda Univ. 1,ASMeW 2,Waseda ZAIKEN 3@*Kurosawa
Tomonori 1,Shinada Takahiro 2,Ohdomari Iwao 1,2,3 |
| |
8 |
Quasi-Ballistic Transport at Source-End of Channel
in Ultrasmall Si-MOSFETs |
Kobe Univ. 1@Tsuchiya Hideaki 1, Fujii Kazuya 1,
Mori Takashi 1, Miyoshi Tanroku 1 |
| |
9 |
Requirement of accuracy on ion implant angle control
by asymmetrical device characteristics |
NEC Electronics Corporation@Mineji Akira, Shishiguchi
Seiichi |
| |
10 |
Measurement of Channel Profiles near Shallow Trench
Isolation |
Fujitsu Lab. 1@*Fukutome Hidenobu 1, Kudo Hiroshi
1, and Aoyama Takayuki 1 |
| 11.6
Si Devices/Integration Technology |
| August 30 (Wed.) 10:00`17:15 |
| 30a-ZR-@/ II |
| |
1 |
A Scalable Gate Resistance Model for Sub-0.1um
RF MOSFETs |
System Devices Res. Lab., NEC Corporation 1@Akira
Tanabe 1, Ken'ichiro Hijioka 1, Yoshihiro Hayashi 1 |
| ’ |
2 |
Evaluation of Various Interconnect Technologies
with Figure of Merit (FoM) |
Tokyo Tech. 1@*Kenichi Okada 1, Hiroyuki Ito 1,
Kazuya Masu 1 |
| |
3 |
A New Small-area Stacked-inductors on gPartially
Low-k Plugged Si Substrateh (PLP-Sub) |
System Devices Res. Labs., NEC Corp. 1@*Hijioka
Ken'ichiro 1, Tanabe Akira 1, Onodera Takahiro 1, Hayashi Yoshihiro 1 |
| ’ |
4 |
Analysis of signal transmission characteristics
of Si integrated antennas using equivalent circuit model |
Research Center for Nanodevices and Systems, Hiroshima
Univ. 1
@*Kimoto Kentaro 1, Sasaki Nobuo 1, Nitta Masakazu 1, Kikkawa Takamaro1
|
| |
5 |
Formation of Dielectric Layer with High Step Coverage
for Three-Dimensional Integration |
Tohoku Univ. 1@*Kikuchi Hirokazu 1, Yamada Yusuke
1, Fukushima Takafumi 1, Tanaka Tetsu 1, Koyanagi Mitsumasa 1 |
| ’ |
6 |
Three-Dimensional Integration Technology Based
on Chip-to-Wafer Bonding |
Tohoku Univ. 1@Fukushima Takafumi 1, Yamada Yusuke
1, Kikuchi Hirokazu 1, Tanaka Tetsu 1, Koyanagi Mitsumasa 1 |
| |
|
11:30`11:45 |
|
| |
7 |
Integrated RF-MEMS and Its Packaging Technology |
NTT MI Labs. 1, NTT-AT 2@*Kuwabara Kei 1, Sato
Norio 1, Sakata Tomomi 1, Kamei Toshikazu 2, Kudou Kazuhisa 2, Yano Masaki
2, Machida Katsuyuki 2, Ishii Hiromu 1 |
| |
8 |
Study of Capacitive Sensing for Position Control
of CMOS-MEMS |
NTT MI Labs 1, NTT-AT 2@*Toshishige Shimamura 1,Hiroki
Morimura 1, Kei Kuwabara 1, Norio Sato 1, Jun Terada 1, Mamoru Ugajin 1,
Satoshi Shigematsu 1, Katsuyuki Machida 2, Mamoru Nakanishi 1, Hiromu Ishii
1 |
| |
9 |
Monolithic integration of MOSFETs and LEDs for
OEICs by lattice-matched Si/III-V-N alloys on Si substrates |
Toyohashi Univ. Tech. 1@*Ohta Naruto 1, Furukawa
Yuzo 1, Minohara Daisuke 1, Soo-Young Moon 1, Wakahara Akihiro 1, Yonezu
Hiroo 1 |
| |
10 |
Performance Estimation for Four-Terminal-DGMOS
Logic based on Experiments |
AIST@*Shin-ichi O'uchi, Yongxun Liu, Meishoku Masahara,
Kazuhiko Endo, Toshiyuki Tsutsumi, Toshihiro Sekigawa, Hanpei Koike, Eiichi
Suzuki |
| |
11 |
Analysis of Threshold Voltage Fluctuations by Stress
Distribution in DG MOSFET |
Fujitsu Labs. Ltd. 1@Tanabe Ryo 1, Ashizawa Yoshio
1, Oka hideki 1 |
| |
|
Lunch 13:00`14:00 |
|
| 30p-ZR-@/ II |
| |
1 |
Controlling Shallow Trench Isolation Stress with
O3-TEOS CVD gap-fill in 45-nm node devices |
Renesas Technology Corp. 1@*Ishibashi Masato 1,
Horita Katsuyuki 1, Tsunemine Yoshikazu 1,
Ikeda Taketoshi 1, Yamamoto Satoshi 1, Sawada Mahito 1, Kuroi Takashi 1,
Inoue Yasuo 1 |
| |
2 |
The analysis of stress relaxation and current degradation
by contact hole on Stress Liner |
Toshiba Corporation1, Sony Corporation2, NEC Electronics
Corporation3@Sawada tatsurou1, Fujii Osamu1, Yoshimura Hisao1, Takahashi
Seiji2, Hachimine Kiyota2, Yokoyama Kouji2, Anzai Hisahiro2, Akiyama Yutaka3,
Ikeda Masahiro3, Okuda Yoshifumi3 |
| ’ |
3 |
Simulation of Scaling Limit for Low Stand-by Power
transistors considering Gate Workfunction Engineering |
NEC System Devices Research Laboratories 1@Miyamura
Makoto 1, Takeuchi Kiyoshi 1, Hane Masami |
| |
4 |
Performance of Ni-FUSI/High-k PMISFET using Substrate
Fluorine Implantation |
Renesas Technology Corp. 1@*Endo Seiichi 1,Nishida
Yukio 1,Sakashita Shinsuke 1,Inoue Masao 1,Yugami Jiro 1,Hayashi Takashi
1,Yamashita Tomohiro 1,Oda Hidekazu 1,Kuroi Takashi 1 |
| |
|
Break 15:00`15:15 |
|
| |
5 |
Non-volatile Al2O3 memory
using an embedded Al-rich layer |
NTT Microsystem Integration Labs. 1@*Nakata Shunji
1, Katagiri Yoshitada 1 |
| ’ |
6 |
Simulation Studies of New Non-volatile Stacked
Dual Floating Gate Memory |
Dept. of E&E Engineering, Tokyo Tech 1,QNERC &
Dept. of Physical Electronics,Tokyo Tech 2@*Tomoyuki Kurihara 1,Hiroki Niikura
2,Yoshishige Tsuchiya 2,Hiroshi Mizuta 2,Shunri Oda 2 |
| ’ |
7 |
Analysis of the current properties of the NEMS
memory device by using the finite element simulation |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1, SORST-JST 2, Central Research Laboratory, Hitachi, Ltd. 3@*Nagami Tasuku
1, Matsuda Shinnosuke 1, Tsuchiya Yoshishige 1,2, Saito Shinichi 3, Arai
Tadashi 3, Shimada Toshikazu 3, Mizuta Hiroshi 1,2, Oda Shunri 1,2 |
| |
8 |
Study of switching action of naturally-bent beam
by applying a voltage for realizing NEMS memory |
QNERC&Dept. of Physical Electronics, Tokyo Tech1,
SORST-JST2, Central Research Laboratory, Hitachi Ltd.3@S. Matsuda1, T. Nagami1,
Y. Tsuchiya1,2, S. Saito3, T. Arai3, T. Shimada3, H. Mizuta1,2, S. Oda1,2 |
| |
9 |
Long-retention gain-cell DRAM using undoped SOI
MOSFETs |
NTT Basic Research Labs., Shizuoka Univ., Hokkaido
Univ.@Nishiguchi Katsuhiko 1, Ono Yukinori 1, Fujiwara Akira 1, Yamaguchi
Hiroshi 1, Inokawa Hiroshi 2, Takahashi Yasuo 3 |
| |
10 |
Time-domain component-analysis of single-event
transient-currents in fully-depleted SOI MOSFETs |
ISAS 1, Unv. Tokyo 2, Sokendai 3@Daisuke Kobayashi
1, Masahiro Aimi 2, Hirobumi Saito 1,2, Kazuyuki Hirose 1,3 |
| |
11 |
Measurement of Single Event Transient Pulse-Widths
in 0.2-Κm SOI Logic Cells Irradiated by Heavy Ions |
Univ. Tokyo 1, ISAS 2, Sokendai 3, MHI 4@*Yanagawa
Yoshimitsu 1, Hirose Kazuyuki 23, Saito Hirobumi 12, Kobayashi Daisuke 2,
Fukuda Seisuke 2, Makino Takahiro 3, Ishii Shigeru 4, Takahashi Daisuke
4, Yamamoto Kensuke 4, Kuroda Yoshikatsu 4 |
| |
12 |
Effect of Delay Time between Flip-Flops to Soft
Error in Flip-Flop |
Fujitsu Lab. 1@*Uemura Taiki 1, Tosaka Yoshiharu
1, Satoh Shigeo 1 |
| 11.6
Si Devices/Integration Technology |
| August 31 (Thu.) 10:00`13:00 |
| 31a-ZR-@/ II |
| |
1 |
Advantages of depletion SOI MOSFET(2) |
Bio-Nano Electronics Research Center,Toyo Univ.
1@*Miyazawa Kenji 1, Miyazawa Yoshiyasu 1, Hanajiri Tatsurou 1, Toyabe Tooru
1, Sugano Takuo 1 |
| ’ |
2 |
Optimization of Raised Source/Drain Structure for
Silicon on Thin Buried Oxide MOSFETs |
CRL, HITACHI Co. Ltd. 1, IIS Univ. Tokyo 2@*Morita
Yusuke 1, Tsuchiya Ryuta 1, Sugii Nobuyuki 1, Kimura Shinichiro 1, Ohtou
Toru 2, Hiramoto Toshiro 2 |
| ’ |
3 |
Critical Substrate Bias in Variable Threshold Voltage
Short-Channel FD SOI MOSFETs |
IIS, Univ. of Tokyo@Arifin Tamsir Putra |
| |
4 |
Experimental Study on Breakdown of Mobility Universality
in <100>-Directed (110)-Oriented pMOSFETs |
IIS, Univ. of Tokyo@*Ken Shimizu 1, Tsutsui Gen
1, Doni Januar 1, Takuya Saraya 1, Toshiro Hiramoto 1 |
| ’ |
5 |
Temperature Dependence of Inversion-Layer Hole
Mobility in Local Strained Channel MOSFETs |
Advanced LSI Technology, Laboratory TOSHIBA Corporation
1, Center for Semiconductor R&D Center, TOSHIBA Corporation Semiconductor
Company2@Chika Tanaka 1, Kazuya Ohuchi 2, Ken Uchida 1, Junji Koga 1 |
| |
6 |
Hole mobility enhancement in strained SGOI-pMOSFETs
at high temperatures |
MIRAI-ASET 1, MIRAI-AIST 2, The Univ. of Tokyo
3@*Tezuka Tsutomu 1, Nakaharai Shu 1, Moriyama Yoshihiko 1, Hirashita Norio
1, Sugiyama Naoharu 1, Tanabe Akihito 1, Usuda Koji 1, Takagi Shin-ichi
2,3
|
| |
7 |
Instability of the hetero-interface due to Joule
heating in SiGe/Si-hetero-MOSFETs |
Shimane Univ. 1, Tohoku Univ. 2@*Mishima Seishi
1, Sakuraba Masao 2, Murota Junichi 2, Tuchiya Toshiaki 1 |
| |
|
Break 11:45`12:00 |
|
| ’ |
8 |
Origin for reduction of parasitic resistances in
dopant-segregated Schottky (DSS) MOSFETs |
Toshiba Corp. R&D Center@*Yoshifumi Nishi 1, Kinoshita
Atsuhiro 1, Hagishima Daisuke 1, Koga Junji 1 |
| ’ |
9 |
Optimization of Structure of source and drain region
to reduce parasitic effects on FinFETs. |
Tokyo Tech. 1,2, Indian Inst. Technol. 3, @*Y.Kobayashi
1, V.Hariharan 3, K.Kakushima 1, K.Tsutsui 1, H.Iwai 2, V.R.Rao 3 |
| |
10 |
Fabrication and Investigation of the Four-Terminal
FinFETs Using an Etch-back Gate Separation |
Nat. Inst. AIST@Kazuhiko Endo, Yuki Ishikawa, Yongxun
Liu, Takashi Matsukawa, Kenichi Ishii, Shinichi O'uchi, Meishoku Masahara,
Junichi Tsukada, Hiromi Yamauchi, Eiichi Suzuki |
| |
11 |
Characterization of TiN Metal-Gate and Poly-Si
Gate Multi-FinFETs |
AIST@Liu Yongxun, Matsukawa Takashi, Endo Kazuhiro,
Ishii Kenichi, Ouchi Shinichi, Masahara Meishoku, Yamauchi Hiromi, Tsukata
Junichi, Ishikawa Yuki, Suzuki Eiichi. |
| 11.7
Simulation |
| August 31 (Thu.) 14:00`18:30 |
| 31p-ZR-@/ II |
| |
1 |
A modeling of NBTI mechanism considering nitrogen
concentration dependency |
Toshiba 1@*Junji Shimokawa 1, Toshiyuki Enda 1,
Sanae Ito 1, Hiroyoshi Tanimoto 1, Nobutoshi Aoki 1, Yoshiaki Toyoshima
1 |
| |
2 |
OPE Parameter Optimization with Genetic Algorithm |
Kansai Univ. 1@Ishida Takeshi 1,Harazaki Katuhiko
1,Muranaka Noriaki 1,Tokumaru Masataka 1 |
| ’ |
3 |
Application of inverse modeling technique to impurity
diffusion in semiconductors |
Kinki Univ. Tech. Col. 1@*Takashima Koudai 1. Nishi
Kenji 1 |
| |
4 |
Impurity Profile Dependence of Soft Errors in Semiconductor
Devices |
Univ. of Tsukuba 1,Inst. of Appl. Phys 1@Yamada
Tatsuya 1,Sano Nobuyuki 1 |
| |
5 |
Study on Random Potential Fluctuation Due to Discrete
Impurities in Semiconductors |
Univ. of Tsukuba Inst. of Appl. Phys. 1@*Uechi
Tadayoshi 1, Sano Nobuyuki 1 |
| |
6 |
Evaluation of Stress-Induced Effects in Electronic
Characteristics of nMOSFETs using Two-Dimensional Device Simulation |
Fukuoka Ind. Tech. C. 1, Kyoto Univ. 2, Fukuoka
Univ. 3@*Masaaki Koganemaru 1, Toru Ikeda 2, Noriyuki Miyazaki 2, Hajime
Tomokage 3 |
| |
7 |
Effect of Vertical Stress on Inversion Layer Low
Field Mobility in Strained Si pMOSFETs |
Osaka Univ.@Yoshinari Kamakura, Kenji Taniguchi |
| |
8 |
Drift Velocity and Mobility Analysis of Bulk Germanium
Based on Monte Carlo Simulation |
Kobe Univ. 1@*Azuma Yusuke 1, Yamane Takafumi 1,
Tsuchiya Hideaki 1, Miyoshi Tanroku 1 |
| £’ |
9 |
Investigation of New Functionalities Achieved by
Hybrid SET-NEMS Architecture |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1,SORST-JST 2@*Benjamin Pruvost 1, Hiroshi Mizuta 1,2, and Shunri Oda 1,2 |
| |
|
Break 16:15`16:30 |
|
| |
10 |
Electron Transport in Nanoscale Devices:Analysis
of Detailed Balance under Quasi-Ballistic Transport |
Tsukuba Univ. Inst of Appl. Phys. 1@Kusaka Hiroyuki
1, Sano Nobuyuki 1
|
| |
11 |
Current Noise Characteristics of Nano-Scale MOSFETs
(3) |
Kobe Univ. 1@Miyoshi Tanroku 1, *Tsuchiya Hideaki
1, Oda Azusa 1 |
| |
12 |
Current Noise Simulation in Nano-scale MOSFETs
Base on Quantum Transport Theory |
Kobe Univ. 1@*Takayuki Shimizu 1, Hirokazu Shimizu
1, Yusuke Miyamura 1, Hideaki Tsuchiya 1, Matsuto Ogawa 1, Tanroku Miyoshi
1 |
| £ |
13 |
Fullband Simulation of Quantum Electron Transport
in Nanoscale Devices |
Grad. School of Science and Technology, Kobe Univ.
1. Fac. of Engineering, Kobe Univ. 2.@*Helmy Fitriawan 1. Matsuto Ogawa
2. Satofumi Souma 2. Tanroku Miyoshi 2. |
| |
14 |
Effects of local strain on current-voltage characteristics
in silicon nanodevices |
Osaka Univ. 1@*Minari Hideki 1, Mori Nobuya 1 |
| |
15 |
Numerical analysis of three-dimensional transistor
that uses High-k film
|
Tokyo Tech.FCRC.1, Tokyo Tech.IGSSE.2 @Morozumi
Yasuhiro1, Kobayashi Yusuke2, Kakushima Kuniyuki2,Ahmet Parhat1,Tsutsui
Kazuo2, Sugii nobuyuki2,Iwai Hiroshi1 |
| |
16 |
Impact of Incorporating Confined Phonons on Electron
Mobility in Double-Gate MOSFETs |
Nagoya University 1, Osaka University 2@Shigeyasu
Uno 1, Nobuya Mori 2, Kazuo Nakazato 1 |
| ’ |
17 |
Electronic Bandstructures of Si Nanowires and Their
Control due to Cross-Sectional Shape |
Kobe Univ. 1@*Tsuneo Uenaka 1, Hideaki Tsuchiya
1, tanroku Miyoshi 1 |