| 11 Semiconductors A (Silicon) |
| 11.1 Fundamental
Materials Characterization and Evaluation |
| Mar. 22 9:30`17:00 |
| 22a-V-@/ II |
| |
1 |
Quasi-optical measurements of the dielectric constant
of thin films in the millimeter wave region |
AIST@*Kawate Etsuo 1, Naitou Yuuichi, Roman Tesar,
Bambang Prijamboedi |
| |
2 |
Evaluation of ultra thin oxide film formed by O3
water |
Keio Univ.@*Yamada Ryuuta ,seto sinngo ,satou sousi
,tanaka yuuki ,matumoto satoru |
| |
3 |
Analysis method using QV plot fitting for non-contact
electrical oxide thickness measurement |
Dainippon Screen MFG. 1@*Kitajima Toshikazu 1,Fuse
Kazuhiko 1,Nakazawa Yoshiyuki 1,Kohno Motohiro 1 |
| |
4 |
Evaluation of band-bending of various Si by pulse-EUV
excited photoelectron spectroscopy system EUPS2 |
MIRAI-AIST,ASRC@T.Kasai, H.Moriwaki, H.Yashiro,
and *T.Tomie |
| |
5 |
Photoemission Study of PtSi Formed on Ultrathin
HfO2/Si(100) |
Hiroshima Univ 1,MIRAI-ASET 2@*Munetaka Yuuki 1,Takeno
Fumito 1,Ohta Akio 1,Murakami Hideki 1,Higashi Seiichiro 1,Miyazaki Seiichi
1,Kadoshima Masaru 2,Nabatame Toshihide 2 |
| |
|
Break 10:45`11:00 |
|
| |
6 |
Pressure Dependence of Indirect Band-Gap in Silicon |
Hokkaido Univ. 1,Kobe Univ. 2,Univ.of London 3@Ishibashi
Yasuhiko 1,2,Andrew D Prins 3,Kobayashi Toshihiko 2,Nakahara Jun'ichiro
1 |
| |
7 |
A Raman study on the process of Si integrated circuits |
KyotoInstituteofTechnology 1,Wakayama Univ. 2,WaferMasters
3@*Nishibe Shintaro 1,Sasaki Takashi 1,Harima Hiroshi 1,Kisoda Kenji 2,Woo
Sik Yoo 3 |
| |
8 |
Radiation damage in thin gate oxide PD-SOI n-MOSFET
by 2 MeV electron irradiation |
KNCT 1, IMEC 2@*K.Hayama 1, K.Takakura 1, K. Shigaki
1, H.Ohyama 1, E.Simoen 2, C.Claeys 2 |
| |
9 |
Energy Dependence of Single Event Transient Current |
Japan Atomic Energy Agency 1, The Univ. of Electro-Communications
2@*Onoda Shinobu 1, Toshio Hirao 1, Mishima Kenta 1,2, Kawano Katsuyasu
2, Itoh Hisayoshi 1 |
| |
10 |
R&D of simulation method for SETC induced in Si
diodes by heavy ions |
The Univ. of Electro-communications 1. Japan Atomic
Energy Agency 2@*Mishima Kenta 1 2, Kawano Kathuyasu 1, Hirao Toshio 2,
Onoda Shinobu 2, Itoh Hisayosi 2 |
| |
11 |
Heavy-ion induced current through an oxide layer |
Nihon Univ. 1,JAEA 2,Univ. of Electro-Communications
3@*Takahashi Yoshihiro 1,Ohki Takahiro 1,Nagasawa Takaharu 1,Nakajima Yasuhito
1,Kawanabe Ryu 1,Ohnishi Kazunori 1,Hirao Toshio 2,Onoda Shinobu 2,Mishima
Kenta 2,3,Kawano Katsuyasu 3,Itoh Hisayoshi 2 |
| |
|
Lunch 12:30`13:30 |
|
| 22p-V-@/ II |
| |
1 |
Investigation of ultra-thin Al/Si interfaces using
ab initio calculation: Influence of H-terminated Si interfaces |
Univ. of Tsukuba 1, Univ. of Electro-Communications
2@*Shimizu Tomo 1, Natori Kenji 1, Nakamura Jun 2, Natori Akiko 2 |
| £ |
2 |
Thermal stress characteristics and mechanical properties
of ECP Cu film with alloy seeds |
Sony Corporation@*Fukuura Takezo, Komai Naoki,
Kanamura Ryuichi |
| |
3 |
Diffusion-Prevention-Performance of Barrier Metal
Adopting pn-junction |
Graduate School of Science and Technology Kumamoto
Univ. 1@*Syunichirou Komura 1CSatoshi Wakimoto 1CAkira Nakada 1 and Hiroshi
Kubota 1 |
| |
4 |
Formation of helical nanoholes in silicon by wet
etching using platinum particles as catalysts |
Osaka Univ. 1@*Tsujino Kazuya 1, Matsumura Michio
1 |
| ’ |
5 |
A transient current response in Au doped Si |
Tokai Univ. 1,Tokai Univ. Jr. Coll. 2@Matsumoto
Akira 1,Sakata Koichi 1,Kimura Hideki 1,Kurosu Tateki 1,Iida Masamori 2 |
| |
6 |
Switching phenomenon in Au doped Si |
Tokai Univ. 1,Tokai Univ. Jr. Coll. 2@Matsumoto
Akira 1,Sakata Koichi 1,Kimura Hideki 1,Kurosu Tateki 1,Iida Masamori 2 |
| |
|
Break 15:00`15:15 |
|
| |
7 |
Progress on Charge Distribution in Multiply-Stacked
Si Quantum Dots / SiO2 Structures as Evaluated by AFM / KFM |
Hiroshima Univ. 1@*Junichiro Nishitani 1, Katsunori
Makihara 1, Yoshihiro Kawaguchi 1, Mitsuhisa Ikeda 1, Seiichiro Higashi
1, Seiichi Miyazaki |
| |
8 |
Photoluminescence quantum efficiency of Si nanocrystals |
Kobe Univ.
Faculty of Eng. 1, The Graduate School of Sci. and Tech 2
@*Inui Masaki 1, Nakamura Toshihiro 2, Miura Satoru 2, Fujii Minoru 1, Shinji
Hayashi 1,2 |
| |
9 |
Effect of Nanocrystallites formation on Photoluminescence
of Er ion in Er-doped SiO2 |
Inst.ofAppl.Phys.,Univ.ofTsukuba 1,S.R.P.Nano Science
2,NIMS 3, @*Shirakawa Ryota 1,Morihiro Haruhito 1,Fukata Naoki 2.3,Mitome
Masanori 3,Bando Yosio 2.3,Murakami Kouiti 1.2, |
| |
10 |
Si nanocrystal in Al-doped Si oxide film |
Inst.of Appl.Phys. Univ.of Tsukuba 1.S.R.PgNano
Scienceh 2,NIMS 3,@*Okami Tsuyoshi 1,Uchida Noriyuki 1,2,Fukata Naoki 3,Murakami
Kouichi 1,2, |
| |
11 |
Controlled arrangement of silicon nanowires |
Osaka Univ. 1, NTT Basic Lab. 2, AIST Kansai 3@*Kikkawa
Jun 1, Hibino Hiroki 2, Kobayashi Yoshihiro 2, Aikta Tomoki 3, Takeda Seiji
1 |
| ’ |
12 |
First Principles Calculation on Electronic Band
Structures of Si Nano-Wires |
Kobe Univ. 1@Uenaka Tsuneo 1, Yamada Yoshihiro
1, Tsuchiya Hideaki 1, Miyoshi Tantoku 1 |
| |
13 |
Characterization of Ge nanocrystals by surface-plasmon
enhanced Raman Spectroscopy |
Electro-Communication Univ. 1@*Terada Chikara 1,
Somaditya Sen 1, Ono Hiroshi 1 CUchida Kazuo 1, Nozaki Shinzi 1, Morisaki
Hiroshi 1 |
| 11.1 Fundamental
Materials Characterization and Evaluation |
| Mar. 23 9:30`12:30 |
| 23a-V-@/ II |
| |
1 |
TEM Obsevation of Defects in SGOI Virtual Substrate
Fabrication: Temperature Ramping Prosess |
Interdisciplinary Graduate School of Engineering
Sciences Kyushu Univ. 1, KASTEC Kyushu Univ. 2, SUMCO 3@*Takaki Yuuichi
1, Mizuguchi Takashi 1, Ii Seiichirou 2, Ikeda Ken-ichi 1, Nakashima Hideharu
1, Nakashima Hiroshi 2 ,Matsumoto Koji 3, Nakamae Masahiko 3 |
| |
2 |
Determination of profiles of micro-scratches remaining
on polished Si(001) wafer by AFM |
Osaka Univ. 1@*Takushi Shigetoshi 1,Kenta Arima
1, Haruyuki Inoue 1,Tsukasa Kawashima 1,
Takaaki Hirokane 1,Toshihiko Kataoka 1,Mizuho Morita 1
|
| |
3 |
Direct STM observation of dopant atom distribution
in pn junction region on Si(111):H surfaces |
MIRAI-ASRC AIST 1@*Nishizawa Masayasu 1, Bolotov
Leonid 1, Kanayama Toshihiko 1 |
| £ |
4 |
Cross-sectional mapping of local work function
in Si by vacuum-gap
modulation scanning tunneling spectroscopy |
MIRAI[ASRCCAIST 1@*Bolotov Leonid 1, Kanayama Toshihiko
1 |
| |
5 |
Characterization of SiGe–pn junction by Scanning
Tunneling Microscopy |
Musashi Inst. tech. 1@*Tanaka Yuma 1, Okui Toshiko
1, Sawano Kentaro 1, Shiraki Yasuhiro 1 |
| |
|
Break 10:45`11:00 |
|
| |
6 |
Development of Thermal Conductivity Simulator Based
on Tight-Binding Quantum Chemical Molecular Dynamics |
Dept. Appl. Chem., Tohoku Univ. 1, JST-PRESTO 2,
NICHe, Tohoku Univ. 3@Michihisa Koyama 1, Arunabhiram Chutia 1, Zhigang
Zhu 1, Hiroshi Setogawa 1, Hideyuki Tsuboi 1, Akira Endou 1, Momoji Kubo
1, 2, Carlos A. Del Carpio 1, Akira Miyamoto 1, 3 |
| |
7 |
Crystal Plasticity Analysis of Dislocation Accumulation
in ULSI Cells when the Temperature Drops |
Kitami Inst. of Technology 1, Musashi Inst. of
Technology 2, Advanced Research Laboratory, Hitachi, Ltd. 3@*Michihiro Sato
1, Tetsuya Ohashi 1, Takuya Maruizumi 2, Isao Kitagawa 3 |
| |
8 |
Microscopic Mechanism of Phosphorus Diffusion in
Silicon |
ISIR, Osaka Univ.@*Hiroyuki Nakayama 1, Koun Shirai
1, Hiroshi Katayama-Yoshida 1 |
| |
9 |
Molecular Dynamics Simulations of Electronic Structures
of SiO2 and SiON |
Kyoto Univ. 1@*Doi Ketaro 1, Sakamoto Toshio 1,
Tachibana Akitomo 1 |
| |
10 |
Electronic State Calculations of Lanthanoid Oxides
for the Possibility as High-k Material |
Kyoto Univ. 1@Mikazuki Yutaka 1, Sugino Shinya
1, *Doi Kentaro 1, Tachibana Akitomo 1 |
| |
11 |
First-principles calculations of Si 2p3/2 XPS spectrum
for Si/Si3N4 interface formed by plasma nitridation |
Musashi Institute of Technology 1, Advanced Research
Laboratory, Hitachi, Ltd. 2, Graduate School of Engineering,Tohoku Univ.
3, New Industry Creation Hachery Center, Tohoku Univ. 4
@*Takuya Maruizumi1, Jiro Ushio2,@Seiji Shinagawa1, Hiroshi Nohira1,
Masaaki Higuchi3, Akinobu Teramoto4, Takeo Hattori1, Yasuhiro Shiraki1
|
| 11.2
Surface |
| Mar. 25 9:30`11:30 |
| 25a-P7-@/ II |
| ’ |
1 |
Control of Si surface etching property by new semiconductor
cleaning solutions |
ISIR, Osaka Univ. 1, CREST, JST 2@@Y.-L. Liu 1,2,
M. Takahashi 1,2, H. Iwasa 1,2, S. Terakawa 1,2, H. Kobayashi 1,2 |
| |
2 |
Ultra-Diluted HF/N2 Spray for Particle and Metal
Removal without Damage of 45nm Gate Structures |
Sony UCT Lab. 1@*Hirano Hideki 1, Sato Kou 1, Osaka
Tsutomu 1, Kuniyasu Hitoshi 1, Hattori Takeshi 1 |
| ’ |
3 |
Ashless Heavy Dose Ion Implanted Photo Resist Stripping
by using Gas Phase Ozone |
mEFSI LTD.@*Kousaku MatsunoCHiromi MishimaCTeruyuki
TakahashiCShinji KunitakeCMasao Iga, Satoshi Kikuchi |
| |
4 |
Implanted Photoresist Stripping by Catalytic Hydrogen
Radicals |
Grad. School of Engineering Science, Osaka Univ.
1@*Takata Masayuki 1 ,Fukasawa Kenichiro 1 ,Yuba Yoshihiko 1 ,Akasaka Yoichi
1 |
| ’ |
5 |
Stability of Ge surface against thermal processes
and chemical agents -Surface orientation effects- |
Univ. of Tokyo 1@Toyama Masahiro, Nishimura Tomonori,
Kita Koji, Toriumi Akira |
| ’ |
6 |
Hydrogen anneal of SiO2/SiC structure
formed by the nitric acid oxidation method |
ISIR Osaka University 1, CREST JST 2@*Im Sung-Soon
1 2, Takahashi Masao 1 2, Asuha 1 2, Kobayashi Hikaru 1 2 |
| |
7 |
Strain dependence of oxidation reaction process
at SiO2/Si(100) interface: A first-principles approach |
Dept. of Physics Engineering, Mie Univ. 1, NTT
Basic Research Labs., NTT Corp. 2@*Toru Akiyama 1, Hroyuki Kageshima 2,
Masashi Uematsu 2, Tomonori Ito 1 |
| |
8 |
Understanding of interfacial atomic structures
in Si thermal oxidation |
NTT Basic Research Labs. 1, Univ. Tokyo 2, Mie
Univ. 3, Univ. Tsukuba 4@*Hiroyuki Kageshima 1, Masashi Uematsu 1, Kazuto
Akagi 2, Shinji Tsuneyuki 2, Toru Akiyama 3, Kenji Shiraishi 4 |
| |
9 |
Study on the new kinetic theory of thermal oxidation
of silicon without rate-limiting step of interfacial reaction |
Waseda Univ. 1, Waseda Nano Inst. 2, JST-PRESTO
3@*Watanabe Takanobu 1,2,3, Tatsumura Kosuke 1, Ohdomari Iwao 1,2 |
| ’ |
10 |
Mode change in the initial growth of oxide islands
during dry oxidation of Si(001)-2x1 surface II |
Tohoku Univ. 1, JAEA 2, Eiko Engineering Co., Ltd.
3@*Togashi Hideaki 1, Suemitsu Maki 1, Asaoka Hidehito 2, Yamazaki Tatsuya
2,3 |
| |
11 |
Oxidation temperature dependence of microroughness
of ultrathin SiO2 surface and its interface |
Inst. of Appl. Phys., Univ. of Tsukuba. 1, TIMS.
2
@*Okmaoto Junichi 1, Hasunuma Ryu 1,2, Yamabe Kikuo 1,2
|
| |
12 |
Enhanced oxygen mixing near the oxide/silicon interface
during silicon thermal oxidation |
NTT Basic Research Labs. 1, Keio Univ. 2@*Uematsu
Masashi 1,Gunji Marika 2,Tsuchiya Masaru 2,Itoh Kohei 2 |
| ’ |
13 |
Emission kinetics of Si atom during initial oxidation
on Si(001) surface (VII)FOxidation-induced defect generation |
Tohoku Univ. 1@*Ogawa Shuichi 1,@Takakuwa Yuji
1 |
| 11.2
Surface |
| Mar. 26 |
| 26a-P10-@/ II |
| |
|
Poster Session
26a-P10-1`13@9:30`11:30 |
|
| |
1 |
Nanoscale Characterization of Strained Silicon
by Tip-enhanced Raman Spectroscopy in Reflection Mode |
Dept.of phys.,Gakushuin Univ. 1,Riken Nanophotonics
2,Dept.of Appl.phys.,Osaka Univ. 3@*Motohashi Masashi 1.2,Saito yuika 2,Hayasawa
Norihiko 2,Kawata Satoshi 2.3, |
| |
2 |
STM observation of low-energy dopant-ion irradiation
effect on high-temperature Si(001) surface |
Waseda University 1, Waseda ZAIKEN 2@*Takefumi
Kamioka 1, Feng Lin 1, Makoto Uchigasaki 1, Takashi Hirata 1, Takuya Shimizu
1, Iwao Ohdomari 1,2 |
| |
3 |
Preparation of germanide/germanium Schottky junctions
and characterization of their barrier height |
Science Univ. of Tokyo, Suwa 1, Univ. of Yamanashi
2, Shonan Inst. of Technol. 3@(B)Tsuyoshi Aoshima 1, *Yukio Fukuda 1, (D)Minoru
Mitsui 2, Kiyokazu Nakagawa 2, Hiroshi Maiwa 3 |
| |
4 |
FTIR-ATR measurements of Ge(001) surfaces treated
by HF or HCl solutions |
Osaka Univ. 1@*Yoneda kazufumi 1,Arima Kenta 1,Morita
Mizuho 1 |
| |
5 |
The estimation of hydrogen adsorbed Si(001) by
Surface Differential Reflectance and Time-Dependent Density Functional Theory |
Yokohama National Univ. 1@Jun-ya Koizumi 1, Yoshiharu
Mogawa 1, Jun-ichi Takizawa 1, Shin-ya Ohno 1, Ken-ichi Shudo 1, *Masatoshi
Tanaka 1 |
| |
6 |
Selective Metal Deposition on Silicon Substrate
Using Colloidal Crystal as Mask |
Kogakuin Univ. 1@*Seiji Sakamoto 1, Hidetaka Asoh
1, Sachiko Ono 1 |
| |
7 |
Height Control of alkyl pattern fabricated by AFM
scanning in alkene liquid |
Hiroshima Univ.ADSM 1@*Sunada Akihiro 1,Sakaue
Hiroyuki 1,Takahagi Takayuki 1, |
| |
8 |
Control of growth of catalysts for silicon nanowires
on rough surfaces |
Osaka Univ. 1CFund. & Envir. Res. Labs., NEC 2@*Torigoe
Kazuhisa 1, Kikkawa Jun 1, Ohno Yutaka 1, Ichihashi Toshinari 2, Takeda
Seiji 1 |
| |
9 |
Surface Texturing on Si bu Hydrogen Radicals III |
Tokyo National College of Technol. 1, Shonan Inst.
2@Yuta Takahashi 1, Suzuka Nishimura 2, Kazutaka Terashima 2, *Hiroshi Nagayoshi
1 |
| |
10 |
Initial Process analysis of reaction on SOI substrate
using MMSi |
Nagaoka Univ. of Technol. 1, @*Kanemaru Tetsushi
1, Harashima Masayuki 1, Yasui Kanji 1, Akahane Tadashi 1, Takata Masasuke
1, |
| |
11 |
The clarification of the mechanism that removes
the organic carbon by water vapor |
Toshiba CMC 1,Shibaura Mechatronics 2@*Wakatsuki
Takahiko 1,Hayamizu Naoya 1,Fujita Hiroshi 1,Hayashi Toshihide 2 |
| |
12 |
Optimization of drying method after cleaning of
Low-k(SiOC) surface |
Dainippon SCREEN MFG. 1,Doshisha Business School
2@*Tokuri Kentaro 1,Araki Hiroyuki 1,2,Imai Masayoshi 1 |
| £ |
13 |
Development of the new wafer drying process in
a single wafer cleaner |
Han comp 1, Park comp 1, Lee comp 1, Hong comp
1, Cho comp 1, Moon comp 1@*Han Donggyun 1, Park Imsu 1, Lee Kuntack 1,
Hong Changki 1, Cho Hanku 1, Moon Jootae 1 |
| 11.3 Gate
Insulator Technology |
| Mar. 23 13:30`19:00 |
| 23p-V-@/ II |
| ’ |
1 |
Preparation of lanthanum oxynitride films onto
silicon substrates |
Seikei Univ.@*N.Kawada, M.Ito, Y.Saito |
| |
2 |
Thermal Stability of LaOX/Si Interfacial
Transition Layer |
Musashi Inst. of Technol. 1, Tokyo Inst. of Tech.
FCRC 2, Tokyo Inst. of Tech. IGSSE 3, JASRI/SPring-8 4, Musashi Inst. of
Technol. ARL 5@*Nohira Hiroshi 1,Matsuda Toru 1, Tachi Kiichi 2, Shiino
Yasuhiro 2, Song Jaeyeol 2, Kuroki Yusuke 2, Jin Aun Ng 2, Parhat Ahmet
2, Kakushima Kuniyuki 3, Tsutsui Kazuo 3, Ikenaga Eiji 4, Kobayashi Keisuke
4, Iwai Hiroshi 2, Hattori Takeo 2 5 |
| |
3 |
Thermostability of La2O3/Sc2O3 stacked gate dielectric
thin films |
Tokyo Tech. FCRC 1CTokyo Tech. IGSSE 2@Y. Shiino
1, K. Nakagawa 1CK. Kakushima 2, P. Ahmet 1, N. Sugii 2, T.Hattori 1, K.
Tsutsui 2CH. Iwai 1 |
| |
4 |
Moisture-Absorption-Induced Permittivity Deterioration
and Surface
Roughness Enhancement of Lanthanum Oxide Films on Silicon
|
Univ. of Tokyo@1@* Zhao Yi 1,Toyama Masahiro 1,Kita
Koji 1,Kyuno Kentaro 1,Toriumi Akira 1 |
| |
5 |
Hydrogen Depth Profiling in La2O3/Si(001)
by High-resolution Erastic Recoil Detection |
Kyoto Univ. 1, Tokyo Inst. of Technology FCRC 2@*Nakajima
Kaoru 1, Kimura Kenji 1, Tachi Kiichi 2, Kakushima Kuniyuki 2, Iwai Hiroshi
2 |
| ’ |
6 |
Band offsets of combinatorial (LaAlO3)1-x(Al2O3)x
gate dielectrics determined by SR photoelectron spectroscopy and XAS |
The Univ. of Tokyo 1, NIMS 2@*Yasuhara Ryutaro
1, Komatsu Makoto 1, Takahashi Haruhiko 1, Toyoda Satoshi 1, Okabayashi
Jun 1, Kumigashira Hiroshi 1, Oshima Masaharu 1, Kukuruznyak Dmitry 2, Chikyow
Toyohiro 2 |
| ’ |
7 |
Mobility Improvement on La2O3
gated n-MISFET with Metal Addition |
Tokyo Tech. FCRC 1, IGSSE 2@*Tachi Kiichi 1, Kuroki
Yusuke 1, Ng Jin-Aun 1, Kakushima Kuniyuki 2, Parhat Ahmet 1, Tsutsui Kazuo
2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1 |
| ’ |
8 |
C-AFM Observation of Local Degradation Process
in La2O3-Al2O3 Composite Films |
Graduate School of Eng. Nagoya Univ. 1, CCRAST
Nagoya Univ. 2@*Sago Toshifumi 1, Seko Akiyoshi 1, Sakashita Mitsuo 1, Sakai
Akira 1, Ogawa Masaki 2, Zaima Shigeaki 1 |
| |
9 |
Fabrication of Al2O3 Film
by Metal Deposition Followed by O2 Anealing |
Tokyo Univ. of Agri.&Tech.@*Niikura Masayuki, Ubukata
Kae, Iwazaki Yoshitaka, Hasumi Masahiko, Ueno Tomo, Kuroiwa Koichi |
| |
10 |
Characterization of interfacial reaction for Al2O3/SiNx/poly-Si
stack structuer by photoemission measurements |
Grad.Shool of AdSM.,hiroshima Univ 1,T&D Office,APD
Gr.,Elpida Memory, Inc 2,@*Taira masahiro 1,Furukawa Hiroaki 1,Ohta Akio
1,Nakagawa Hiroshi 1,Murakami Hideki 1,Miyazaki Seiichi 1,Komeda Kennji
2,Horikawa Mitsuaki 2,Koyama Kuniaki , |
| ’ |
11 |
Defects induced in yttria-stabilized zirconia by
UV irradiation and their thermal annealing |
Waseda Univ. 1,AIST 2@*Morimoto Takaaki 1,Takase
Masayuki 1,Ito Toshihide 1,Kato Hiromitsu 1,2,Ohki Yoshimichi 1 |
| |
12 |
Growth delay time on fabricating thin ZrO2
film by limited reaction sputtering |
Kanazawa Univ. 1@*Sugiyama Hidetaka 1,Ohara Kazuaki
1,Kojima Nobuo 1,Sasaki Kimihiro 1 |
| |
|
Break 16:30`16:45 |
|
| |
13 |
Effect of measurement temperature on interface
trap density of the Ge-MIS capacitor. |
MIRAI-AIST 1, MIRAI-ASET 2, Univ. of Tokyo 3@*Taoka
Noriyuki 1, Ikeda keiji 2, Yamashita yoshimi 2, Sugiyama Naoharu 2, Takagi
Shin-ichi 1,3 |
| |
14 |
XPS Analysis of La2O3/n-Ge(100)
Interface on Annealing |
Tokyo Tech. FCRC 1CTokyo Tech. IGSSE 2@*Song JaeYeol
1, Fukuyama Akira 1, Kakushima Kuniyuki 2, Ahmet Parhat 1, Tsutsui Kazuo
2, Sugii Nobuyuki 2, Hattori Takeo 1, Iwai Hiroshi 1 |
| |
15 |
Fabrication of high-k Film on Ge Substrate Using
Metal Deposition Followed by Oxygen Annealing |
Tokyo Univ. of Agri.&Tech. 1, Tokyo Univ. of Science
Suwa 2@*Nagasato Yoshitaka 1, Ueno Tomo 1, Kuroiwa Koichi 1, Fukuda Yukio
2 |
| |
16 |
Photoemission study of HfO2/Ge(100)
stacked structures |
Hiroshima Univ.@*Hiroshi Nakagawa 1, Akio Ohta
1, Masahiro Taira 1, Hiroyuki Abe 1, Hideki Murakami 1, Seiichiro Higashi
1, Seiichi Miyazaki 1, |
| ’ |
17 |
Observation of the leakage current images of HfO2
film on Ge(100) by UHV-C-AFMII |
Tokyo Univ. 1@*Yamamura Kentaro 1,Kyuno Kentaro
1,Kita Koji 1,Toriumi Akira 1 |
| |
18 |
Improvement in Effective Hole Mobility of Ge p-MOSFET
with Amorphous Zr-Silicate Gate Insulator |
R&D Center TOSHIBA 1@Yoshiki Kamata 1, Tsunehiro
Ino 1, Yuuichi Kamimuta 1, Ryosuke Iijima 1, Masato Koyama 1, Akira Nishiyama
1 |
| ’ |
19 |
Analyses of anomalous frequency dispersion of C-V
characteristics of Y2O3/Ge(100) MIS capacitors. |
Tokyo Univ. 1@*Nomura Hideyuki 1, Toyama Masahiro
1, Nishimura Tomonori 1, Kita Koji 1, Toriumi Akira 1 |
| |
20 |
Electrical characterization of MIM capacitor: capacitance
measurements |
Tokyo Univ. of Science, Suwa 1, Hirosaki Univ.
2@* Yukio Fukuda 1, Toshiro Ono 2 |
| |
21 |
Electrical characterization of MIM capacitor: Leakage
current measurements |
Science Univ. of Tokyo, Suwa 1, Hirosaki Univ.
2, NTT ME Labs. 3@*Yukio Fukuda 1, Toshiro Ono 2, Yoshito Jin 3 |
| 11.3 Gate
Insulator Technology |
| Mar. 24 9:30`18:45 |
| 24a-V-@/ II |
| ’ |
1 |
Effect of hydrogen on electrical characteristics
of SiNx films deposited by Cat-CVD method |
ULVAC,Inc. 1, Nagaoka Univ. of Technology 2@Fujinaga
Tetsushi 1, Ogiwara Tomoaki 2, Kitazoe Makiko 1, Hashimoto Masanori 1, Asari
Shin 1, Itoh Hiromi 1, Saito Kazuya 1 |
| |
2 |
Behavior of an H2O molecule during the penetration
of the molecule into insulator films |
Mitsubishi Electric Corp. 1@Oku Tomoki 1, Totsuka
Masahiro 1, Ishikawa Takahide 1 |
| |
3 |
Fabrication of ultra clean silicon surface |
Mitsubishi Electric Corp. 1, Tohoku Univ. 2, Renesas
Technology Corp. 3, NICHe Tohoku Univ. 4@Kazumasa Kawase 1, Tomoyuki Suwa
2, Masaaki Higuchi 2, Hiroshi Umeda 3, Masao Inoue 3, Akinobu Teramoto 4,
Shigetoshi Sugawa 3, Tadahiro Ohmi 4 |
| |
4 |
Oxidation of Silicon Surface Utilizing Supercritical
Carbon Dioxide. |
Dainippon Screen Mfg. Co. Ltd. 1@*Saito Kimitsugu,
Kitajima Toshikazu, Kohno Motohiro, Iwata Tomomi, Mizobata Ikuo, Hirae Sadao |
| |
5 |
The growth of an ultra thin oxide film on Si(100)
surface contaminated with Zn |
College of engineering,Nihon Univ. 1@*Wakashima
Hiroya 1,Shimizu Hirofumi 1,Ikeda Masanori 1 |
| ’ |
6 |
Ultrathin SiO2 Film Formation using
Pulse-Time-Modulated O2 Neutral Beam (3) |
Inst. Fluid Science, Tohoku Univ. 1, AIST 2, Osaka
Univ. 3@Taguchi Chihiro 1, Ikoma Toru 1, Endo Kazuhiko 2, Watanabe Heiji
3, Fukuda Seiichi 1, Samukawa Seiji 1 |
| |
|
Break 11:00`11:15 |
|
| |
7 |
Initial oxidation of Si using UV light-excited
ozone and fabrication of uniform SiO2 film on 8 inch wafer |
AIST 1, Meidensha Corp. 2@*TOSAKA Aki 1, NISHIGUCHI
Tetsuya 1 2 , NONAKA Hidehiko 1, ICHIMURA Shingo 1 |
| |
8 |
Electrical properties of SiO2 dielectric
film prepared at low temperature by highly concentrated ozone CVD. |
Meidensha Corporation1, AIST2@*Kameda Naoto 1,2,
Nishiguchi Tetsuya 1,2, Tosaka Aki 2, Saitoh Shigeru1, Noyori Takeshi 1,
Morikawa Yoshiki 1, Kekura Mitsuru 1, Nonaka Hidehiko 2, Ichimura Shingo
2
|
| |
9 |
Millisecond silicon oxidization by intentional
decomposition of highly concentrated ozone gas |
Iwatani International Corp. 1, National Inst. of
Advanced Industry and Science Technology(AIST) RIIF 2@*Izumi Koichi 1, Kurokawa
Akira 2, Odaka Kenji 2, Koike Kunihiko 1, Ichimura Shingo 2 |
| |
10 |
Numerical Analysis of Thermal Oxidation of Silicon
reactor using Ultra@High Concentration Ozone(2) |
Yokohama National Univ. 1, National Institute of
Advanced Industrial Science and Technology(AIST)2@Takeuchi Takashi 1,Habuka
Hitoshi 1,Aihara Masahiko 1, Kurokawa Akira 2, Ichimura Shingo 2 |
| |
11 |
Electrical properties of Si oxide thin film formed
by using silicone oil and ozone gas in low temperature. |
Jpn. Adv. Inst. of Sci. & Tech. (JAIST)@@Y. Matsuura
1, K. Toriyabe 1, T. Doi 1, K. Nishioka 1 and S. Horita 1 |
| |
|
Lunch 12:30`13:30 |
|
| 24p-V-@/ II |
| |
1 |
Formation of silicon oxide thin films using supercritical
fluid deposition |
Univ. of Tokyo@*Ohkubo Tomohiro 1,Momose Takeshi
1,Sugiyama Masakazu 1,Shimogaki Yukihiro 1 |
| |
2 |
SiO Insulator Film Deposited by ICP-CVD Method
at 100 degree C |
Kochi Univ. of Tech 1, Kochi CASIO 2
@*Furuta Hiroshi 1, Hiramatsu Takahiro 2, Matsuda Tokiyoshi 1, Furuta Mamoru
1, Hirao Takashi 2 |
| |
3 |
Gate oxide process dependence of CMOS performance
on Si(110) surface |
Sony Corporation 1@*Hiyama Susumu 1,Wang Junli
1,Kato Takayoshi 1,Hirano Tomoyuki 1,Tai Kaori 1,Iwamoto Hayato 1 |
| |
4 |
XPS studies on barrier height at Au/ultra-thin
SiO2 interface |
Musashi Inst. Technol.1, Sokendai 2, ISAS3, ARL
Musashi Inst. Technol. 4@*A. Hasegawa1, M. Yamawaki2, N. Suzuki2, D. Kobayashi3,
H. Nohira1, T. Hattori4, and K. Hirose2,3 |
| |
5 |
Properties of ONO-Capacitors with Si-rich SiN Film |
Central Research Lab.,Hitachi Ltd.,@*Mine Toshiyuki
1, Yasui Kan 1, Fujisaki Koji 1, Shimamoto Yasuhiro 1 |
| |
6 |
Preparation of Si-rich SiN films for MONOS Memory |
Central Research Lab Hitachi Ltd.1@Fujisaki Koji
1, Mine Toshiyuki 1 |
| ’ |
7 |
Comparison of chemical bonding structure at SiN/Si
interface fabricated using atmospheric pressure plasma and RF plasma |
Osaka Prefecture Univ. 1, Sekisui Chemical Co.
Ltd. 2, Kobe Univ. 3, Japan Atomic Energy Agency 4@*Ryoma Hayakawa 1, Mari
Nakae 1, Masashi Yoshida 1, Masato Tagawa 3, Yuden Teraoka 4, Takashi Yoshimura
1, Atsushi Ashida 1, Syunsuke Kunugi 2, Tsuyoshi Uehara 2, Norifumi Fujimura
1 |
| |
8 |
Effect of applied voltage frequency on the nitridation
process of Si |
Osaka Prefecture Univ. 1, Sekisui Chemical Co.,
Ltd. 2@Yoshida Masashi 1, Nakae Mari 1, Hayakawa Ryoma 1, Yoshimura Takeshi
1 , Ashida Atsushi 1, Kunugi Syunsuke 2, Uehara Tsuyoshi 2, Fujimura Norifumi
1 |
| ’ |
9 |
Analysis of nitrogen depth profile in SiO2/SiN
stacks studied by angle-resolved photoemission spectroscopy |
Tokyo Univ. 1, STARC 2@*Toyoda Satoshi 1, Okabayashi
Jun 1, Oshima Masaharu 1, Liu Guo-Lin 2, Liu Ziyuan 2, Ikeda Kazuto 2, Usuda
Koji 2 |
| |
10 |
Characterization of charge traps of Si3N4/SiO2
interface using avalanche charge injection |
Hitachi, Ltd., Central Research Lab.@*Ishida Takeshi
and Yamada Renichi |
| |
|
Break 16:00`16:15 |
|
| |
11 |
Realization of highly N concentrated SiON gate
dielectrics with minimum Vfb shift - Theoretical prediction |
Toshiba R&D Center@Koichi Kato 1, Matsushita Daisuke
1, Koichi Muraoka 1, Yasushi Nakasaki 1, Shoko Kikuchi 1, Kiwamu Sakuma
1, Yuichiro Mitani 1 |
| ’ |
12 |
Realization of SiON films with small ’Vfb
–Defect less nitridation and non-destructive oxidation process- |
Advanced LSI Technology Laboratory Toshiba Corp.1,
Semiconductor Company Toshiba Corp.2@*Matsushita Daisuke1, Muraoka Koichi1,
Nakasaki Yasushi1, Kato Koichi1, Kikuchi shoko1, Sakuma Kiwamu1, Mitani
Yuuichiro1, Eguchi Kazuhiro2, Takayanagi Mariko2 |
| |
13 |
Realization of SiON films with small ’Vfb
-Effects of defect less nitridation and non destructive oxidation- |
Advanced LSI Technology Laboratory Toshiba Corp.1,
Semiconductor Company Toshiba Corp.2@*Matsushita Daisuke1, Muraoka Koichi1,
Nakasaki Yasushi1, Kato Koichi1, Kikuchi shoko1, Sakuma Kiwamu1, Mitani
Yuuichiro1, Eguchi Kazuhiro2, Takayanagi Mariko2 |
| |
14 |
Anomalous Gate Leakage for nFETs with Thinner Gate-SiON |
Advanced Device Development Div 1,Process Technology
Div 2,Test Analysis Technology Development Div 3,System Devices Research
Labs 4@*Takayuki Suzuki 1,Mitsuhiro Togo 1,Eizi Hasegawa 2,Shin Koyama 2,Toshinori
Fukai 1,Akihito Sakakidani 1,Shinnichi Miyake 1,Takashi Watanabe 1,Ichiro
Yamamoto 2,Masayasu Tanaka 4,Yoshiya Kawashima 3,Yorinobu Kunimune 3,Masahiro
Ikeda 1,Kiyotaka Imai 1 |
| ’ |
15 |
Investigation of NBT Degradation and Recovery in
Ultra-thin Gate Dielectrics
|
Toshiba R&D center 1, Toshiba Semiconductor Company
2@*Fukatsu Shigeto 1, Mitani Yuichiro 1, Hagishima Daisuke 1, Matsuzawa
Kazuya 1, Inoue Koichiro 2 |
| £ |
16 |
Pulse waveform dependence of dynamic bias temperature
instability in pMOSFETs |
RCNS Hiroshima Univ. 1, Elpida Memory Inc. 2@*Zhu
Shiyang 1, Nakajima Anri 1, Ohashi Takuo 2, Miyake Hideharu 2 |
| £ |
17 |
Interface trap and oxide charge generation under
NBTI of pMOSFETs with ultrathin SiON |
RCNS Hiroshima Univ. 1, Elpida Memory Inc. 2@*Zhu
Shiyang 1, Nakajima Anri 1, Ohashi Takuo 2, Miyake Hideharu 2 |
| |
18 |
Re-examination of Deuterium Effect on NBTI |
Advanced LSI Technology Laboratory@Yuichiro Mitani
1 |
| |
19 |
Proposal of quantitative analyzing method of interface
properties using C-t transient of MOS capacitors. |
Tokyo Univ.@*Nomura Hideyuki 1, Kita Koji 1, Toriumi
Akira 1 |
| |
20 |
Evaluation of dielectric performance of SiO2
thin film by Pulse-Photoconductivity-Method |
Graduate School of Science and Technology Kumamoto
Univ. 1, Faculty of Engineering Kumamoto Univ. 2@*Goto Atsuhi 1, Sugino
Yosuke 2, Shinjo Nobuhiro 1, Morikawa Koji 1, Nakada Akira 2, Kubota Hiroshi
1 |
| 11.3 Gate
Insulator Technology |
| Mar. 25 9:30`19:00 |
| 25a-V-@/ II |
| ’ |
1 |
The Effect on Atomic Diffusion by Nitrogen Atoms
in HfO2-based Gate Dielectrics |
FUJITSU LABORATORIES LTD. 1@*Takahashi Norihiko
1, Yamasaki Takahiro 1, Kaneta Chioko 1 |
| |
2 |
Improvement of High-k/Si Interfacial Layer by High-temperature
Wet Treatment after HfON Deposition |
MIRAI-ASET 1, MIRAI-ASRC,AIST 2, Univ. Tokyo 3@*Hideki
Satake 1, Kunihiko Iwamoto 1, Masaru Kadoshima 1, Hiroyuki Ota 2, Arito
Ogawa 1, Toshihide Nabatame 1, Akira Toriumi 2,3 |
| |
3 |
Slow reaction stage observed during the initial
Si oxidation at the HfO2/Si interface |
ASRC, AIST@Miyata Noriyuki 1 |
| ’ |
4 |
Studies of High-k/Si interfacial oxidation by X-ray
CTR measurements |
Osaka Univ. 1@*Mishima Eiji 1, Kawamura Kouta 1,
Shimura Takayoshi 1, Watanabe Heiji 1, Yasutake Kiyoshi 1 |
| ’ |
5 |
Dielectric constant of SiOx interlayer in gate
stack structures by using hard X-ray photoelectron spectroscopy |
Musashi Inst. of Technol. 1,RIKEN/SPring-8 2,JASRI/SPring-8
3,SELETE 4,Musashi Inst. of Technol. ARL 5,ISAS 6@*Kihara Masamichi 1,Okamoto
Hidesuke 1,Nohira Hiroshi 1,Takata Yoshitaka 2,Ikenaga Eizi 3,Torii Kazuyoshi
4,Kawahara Takaaki 4,Kobayashi Daisuke 6,Kobayashi Keisuke 3,Hattori Takeo
5,Hirose Kazuyuki 6 |
| |
6 |
Electrical Characterization of High-k Film/Si Interface
by Contactless C-V Method |
Univ. of Hyogo 1,Renesas Technology Corp. 2@*Fukano
Katsuyuki 1,Yoshida Haruhiko 1,Inoue Masao 2,Mori Hidenobu 1,Satoh Shinichi
1 |
| |
|
Break 11:00`11:15 |
|
| |
7 |
Evaluation of phase separation of Hf-silicate film
by In-Plane SAXS(2) |
Toshiba Nanoanalysis Corp.1,Semiconductor Company
Toshiba Corp.2,Rigaku Corp.3@Satou Nobutaka1,Takahashi Mamoru1,Sekine Katsuyuki2,Sato
Motoyuki2,Ito Yasutoshi3 |
| ’ |
8 |
High crystallization temperature and high-quality
MOS characteristic of Hf-La-O ternary oxide |
Tokyo Univ. 1@*Yamamoto Yoshiki 1, Kita Koji 1,
Kyuno Kentaro 1, Toriumi Akira 1 |
| |
9 |
Characterization of high-k Films using TDS(Thermal
Desorption Spectroscopy)Method |
Tokyo Univ.ofAgri.&Tech. 1@*Iwazaki Yoshitaka 1,Nurbaizara
Mohamed 1,Hasumi Masahiko 1,Ueno Tomoo 1,Kuroiwa Kouichi 1 |
| |
10 |
Effect of Plasma Nitridation after PDA on Mobility
in FETs with Thin PDA-HfSiON/IL dielectrics |
Resesas Technology Corp. 1, Resesas Semiconductor
Engineering Corp. 2@*Mizutani Masaharu 1, Hayashi Takashi 1, Inoue Masao
1, Nomura Kouji 2, Yugami Jiro 1, Tsuchimoto Junichi 1, Ohno Yoshikazu 1,
Yoneda Masahiro 1 |
| ’ |
11 |
Device characteristics of n-MISFETs with HfOxNy
gate insulator formed by ECR-Ar/N2 plasma nitridation |
Tokyo Inst of Tech 1@*Masaki Satoh 1, Tomoki Kurose
1, Shunichiro Ohmi1 |
| |
|
Lunch 12:30`13:30 |
|
| 25p-V-@/ II |
| |
1 |
Difference of remained carbon in High-k films deposited
by LL-D&A or ALD process |
MIRAI-ASET 1,MIRAI-ASRC,AIST 2, The Univ. of Tokyo
3@*Ogawa Arito 1,kadoshima Masaru 1,Iwamoto Kunihiko 1, Ota Hiroyuki 2,Okada
Kenji 1,Nabatame Toshihide 1,Satake Hideki 1, Toriumi Akira 2,3 |
| |
2 |
Comparison of film quality between HfO2
and Al2O3 films prepared by ALD process with H218O |
Shibaura Inst. of Tech. 1,MIRAI-ASET 2,MIRAI-ASRC
3,The Univ. of Tokyo 4@*Kimura Shinsuke 1,Iwamoto Kunihiko 2,Kadoshima Masaru
2,Segawa Kazuhiro 1,Nunoshige Yuu 1,Nabatame Toshihide 2,Satake Hideki 2,Toriumi
Akira 3,4,Ohishi Tomoji 1 |
| |
3 |
Permittivity Enhancement of HfO2 Film
with SiO2 Doping and Analysis of its Origin |
The Univ. of Tokyo 1@*Kazuyuki Tomida 1, Koji Kita
1, Kentaro Kyuno 1, Akira Toriumi 1 |
| |
4 |
Methodology for designing ternary higher-k dielectrics
through metal doping into HfO2 thin films |
Univ. of Tokyo 1@*Kita Koji 1, Tomida Kazuyuki
1, Yamamoto Yoshiki 1, Zhao Yi 1, Kyuno Kentaro 1, Toriumi Akira 1 |
| ’ |
5 |
Crystallization and band offset change of HfO2-Y2O3
films due to UHV annealing |
The Univ. of Tokyo 1, National Inst. for Materials
Science 2@*Komatsu Makoto 1, Yasuhara Ryutaro 1, Takahashi Haruhiko 1, Toyoda
Satoshi 1, Okabayashi Jun 1, Kumigashira Hiroshi 1, Oshima Masaharu 1, Kukuruznyak
Dmitry 2, Chikyow Toyohiro 2 |
| |
6 |
A threshold voltage tuning method by Al compositional
modulation in high-k gate dielectrics |
MIRAI-ASET 1, MIRAI-ASRC, AIST 2, The Univ. of
Tokyo 3@*Kadoshima Masaru 1, Ogawa Arito 1, Takahashi Masashi 1, Ota Hiroyuki
2, Mise Nobuyuki 1, Iwamoto Kunihiko 1, Migita Shinji 2, Satake Hideki 1,
Nabatame Toshihide 1, Toriumi Akira 2,3 |
| |
7 |
Investigation of the universality of mobility for
HfSiON MISFET by a newly developed pulse measurement method |
Toshiba Corporation Corporate R&D Center 1,Toshiba
Corporation Semiconductor Company 2@*Iijima Ryosuke 1,Takayanagi Mariko
2,Yamaguchi Takeshi 1,Koyama Masato 1,Nishiyama Akira 1 |
| |
8 |
Unusual Eeff dependence of inversion layer mobility
for HfSiON MISFET in high Eeff regions |
Toshiba Corporation Corporate R&D Center 1,Toshiba
Corporation Semiconductor Company 2@*Iijima Ryosuke 1,Takayanagi Mariko
2,Yamaguchi Takeshi 1,Koyama Masato 1,Nishiyama Akira 1 |
| |
9 |
Analysis of Gate Depletion Width Increase in Poly-Si
Gate/HfSiON Stacks |
RDC, Toshiba Corp. 1, Semiconductor Company, Toshiba
Corp. 2@*Saitoh Masumi 1, Kamimuta Yuuichi 1, Sekine Katsuyuki 2, Kobayashi
Takuya 2, Aoyama Tomonori 2, Koyama Masato 1 |
| |
10 |
Characterization of HfSiON gate dielectrics using
monoenergetic positron beams |
Graduate School of Pure and Applied Science, Univ.
of Tsukuba1
NIMS2
Graduate School of Advanced Sciences of Matter, Hiroshima Univ.3
AIST4
Selete5
Nano Technology Research Laboratory, Waseda Univ.6@*A. Uedono1,2, K. Ikeuchi1,
T. Otsuka1,K. Shiraishi1,2, K. Yamabe1,2, S. Miyazaki3, N. Umezawa2, A.
Hamid2, T. Chikyow2, T. Ohdaira4, M. Muramatsu4, R. Suzuki4, S. Inumiya5,
S. Kamiyama5, Y. Akasaka5, Y. Nara5 and K. Yamada2, |
| |
|
Break 16:00`16:15 |
|
| |
11 |
Photoelectron Spectroscopy of Ultrathin HfSiOxNy
on Si(100) |Depth Profiling of Chemical Composition and Defect State Density |
AdSM Hiroshima Univ. 1. Selete. 2.@Akio Ohta 1,
Hiroshi Nakagawa 1, Hideki Murakami 1, Seiichirou Higashi 1, Seiichi Miyazaki
1, Seiji Inumiya 2, Yasuo Nara 2 |
| |
12 |
Evaluation of band-bending of HfSiON dielectric
film by pulse-EUV excited photoelectron spectroscopy system EUPS2 |
MIRAI-ASRC1, Renesas Technology2@*T.Tomie1,T.Kasai1,T.Katayama2,M.Inoue2,N.Miyata1,
K.Asayama2, H.Moriwaki1,and H.Yashiro1 |
| |
13 |
Characterization of defects in HfSiON by conduction
mechanism analysis of leakage current |
Toshiba Corp. Smiconductor Company 1, Toshiba Corp.
R&D Center 2@*Masakazu Goto 1, Mariko Takayanagi 1, Takeshi Watanabe 1,
Koji Nagatomo 1, Ryosuke Iijima 2, Kazunari Isimaru 1, Hidemi Ishiuchi 1 |
| |
14 |
Defect control in Hf-based dielectrics - on the
structural and electrical deactivation of oxygen-induced defects (I) : O-vacancy
|
Toshiba R&D Center 1@*Nakasaki Yasushi 1, Kato
Koichi 1, Kamimuta Yuuichi 1, Koyama Masato 1, Kikuchi Shoko 1, Muraoka
Koichi 1 |
| |
15 |
Characterization of the Traps in HfSiON Gate Dielectrics
by Evaluation of CV-Hysteresis |
Toshiba semicon 1, Toshiba R&D center 2@*Nagatomo
Koji 1, Takayanagi Mariko 1, Watanabe Takeshi 1, Goto Masakazu 1,
Iijima Ryosuke 2, Ishimaru Kazunari 1, Ishiuchi Hidemi 1 |
| |
16 |
NBT-degradation and recovery in HfSiON gate dielectrics |
Corporate R&D Center Toshiba Corporation 1,Toshiba
Corporation Semiconductor Company 2@Hirano Izumi 1,Yamaguchi Takeshi 1,Mitani
Yuichiro 1,Iijima Ryosuke 1,Takayanagi Mariko 2,Eguchi Kazuhiro2, Fukushima
Noburu1 |
| |
17 |
Reduction Process on HfO2 Surface and
Initial Failure in Silicon Gate MOS Capacitors with HfO2
- Surface Reaction Control of High-Pressure Si Deposition on HfON - |
MIRAI-ASRC AIST 1, MIRAI-ASET 2, The Univ. of Tokyo
3@*Mizubayashi Wataru 1, Ogawa Arito 2, Nabatame Toshihide 2, Satake Hideki
2, Toriumi Akira 1,3 |
| |
18 |
Correlation of leakage current and QBD
of HfSiON gate dielectric film. |
Inst. of Appl. Phys, Univ. of Tsukuba. 1,TIMS,Univ.ofTsukuba.
2, Selete. 3@*Higuchi keiichi 1,Nato Tatuya 1,Inumiya Seiji 3,Hasunuma Ryu
1,2,Yamabe Kikuo 1,2 |
| |
19 |
Temperature dependence on TDDB lifetime of HfSiON |
Inst. of Appl. Phys, Univ. of Tsukuba 1CTIMS, Univ.
of Tsukuba 2CSemiconductor Leading Edge Technologies 3@ *Tatsuya Naito 1CKeiichi
Higuchi 1CSeiji Inumiya 3CRyu Hasunuma 1,2, Kikuo Yamabe 1,2 |
| £ |
20 |
Influences of Nitrogen Incorporation on TDDB Characteristics
of HfSiOx Capacitors with Metal Gate |
Graduate school of ADSM, Hiroshima University 1,
Semiconductor Leading Edge Technologies, Inc. 2@Pei Yanli 1, Murakami hideki
1, Higashi Seiichiro 1, Miyazaki Seiichi 1, Inumiya Seiji 2, Nara Yasuo
2 |
| |
21 |
Highly Reliable High-k Gate Dielectrics by Gradual
Hf-profile in HfO2/SiO2 Interface Region |
MIRAI-ASET 1, MIRAI-ASRC,AIST 2, The Univertisy
of Tokyo 3@Iwamoto Kunihiko 1, Mizubayashi Wataru 2, Ogawa Arito 1, Nabatame
Toshihide 1, Satake Hideki 1, Toriumi Akira 2,3 |
| 11.3 Gate
Insulator Technology |
| Mar. 26 9:30`12:30 |
| 26a-V-@/ II |
| |
1 |
Theoretical analysis of the Fermi level pinning
in FUSI-PtSi/HfO2/Si system |
MIRAI-ASET 1,Univ. of Vienna 2,MIRAI-ASRC AIST
3,Univ. of Tokyo 4@*Minoru Ikeda 1,Georg Kresse 2,Masaru Kadoshima 1,Toshihide
Nabatame 1,Hideki Satake 1,Akira Toriumi 3,4 |
| ’ |
2 |
Physical Mechanism of Work Function Modulation
due to Impurity Pileup at Ni-FUSI/SiO(N) Interface |
Toshiba R&D Center@*Yoshinori Tsuchiya 1, Masahiko
Yoshiki 1, Masato Koyama 1, Atsuhiro Kinoshita 1, Junji Koga 1
|
| |
3 |
Role of oxygen in Ru gate electrode on effective
work function of Ru/HfO2 stack structure |
Shibaura Inst. of Tech. 1,MIRAI-ASET 2,MIRAI-ASRC,AIST
3,The Univ. of Tokyo 4@*Segawa Kazuhiro 1,Kadoshima Masaru 2,Takaba Hiroyuki
2,Iwamoto Kunihiko 2,Kimura Shinsuke 1,Nunoshige Yuu 1,Nabatame Toshihide
2,Satake Hideki 2,Toriumi Akira 3,4 Ohishi Tomoji 1 |
| £ |
4 |
Dielectric evolution characteristics of MOCVD-HfCN
metal electrode gated MOS stacks |
The Univ. of Tokyo 1, MIRAI-ASET 2@Wang Wenwu 1CNabatame
Toshihide 2, Shimogaki Yukihiro 1 |
| |
5 |
The change of Ru/HfO2 film by annealing
in a 18O2 and in UHV |
Ritsumeikan Univ. 1, MIRAI-ASET 2, The Univ. of
Tokyo 3@* Nishimura Tomoaki 1, Tanigaki Tsuyoshi 1, Kido Yoshiaki 1, Iwamoto
Kunihiko 2, Nabatame Toshihide 2, Toriumi Akira 3 |
| |
6 |
Deposition of an amorphous Ruthenium oxide film
by MOCVD using ozone |
National Institute of AIST 1, Tokyo Univ. of Science
2@*A. Murakami 1,2, T. Shimizu 1, K. Ishii 1, Y. Takanashi 2 and E. Suzuki
1 |
| |
|
Break 11:00`11:15 |
|
| |
7 |
Fabrication of Ru films by Atomic Layer Deposition
and Characterization of Ru/HfON gate stack |
MIRAI-ASET 1, Shibaura Inst. of Tech. 2, MIRAI-ASRC-AIST
3,The Univ. of Tokyo 4@*Takaba Hiroyuki 1, Segawa Kazuhiro 2, Kadoshima
Masaru 1, Nunoshige Yu 2, Ogawa Arito 1, Nabatame Toshihide 1, Toriumi Akira
3,4 |
| |
8 |
A study of TiN metal gate electrodes formed by
divided CVD technique for pMISFETs |
Renesas Technology Corp. 1@*Sakashita Shinsuke
1, Kawahara Takaaki 1, Mizutani Masaharu 1, Inoue Masao 1, Yamanari Shinichi
1, Nishida Yukio 1, Mori Kenichi 1, Yugami Jiro 1, Ohno Yoshikazu 1, Yoneda
Masahiro 1 |
| ’ |
9 |
Electrical Properties of Metal/High-k Gate Stacks
Fabricated by In-situ Solid Phase Reaction between PVD-Hf and SiO2
Underlayer |
Graduate School of Engineering Osaka Univ. 1,Canon
ANELVA Corporation 2@*Horie Shinya 1,Minami Takasi 2,Kitano Naomu 2,Kosuda
Motomu 2,Endo Katsuyoshi 1,Watanabe Heiji 1,Yasutake Kiyoshi 1 |
| |
10 |
Effects of High Temperature Post Si-Deposition
Annealing on FUSI/High-k MOSFET Characteristics |
MIRAI-ASET 1,MIRAI-ASRC-AIST 2,Univ. of Tokyo 3@*Takahashi
Masashi 1,Satake Hideki 1,Kadoshima Masaru 1,Ogawa Arito 1,Ota Hiroyuki
2,Iwamoto Kunihiko 1,Nabatame Toshihide 1,Toriumi Akira 2,3 |
| |
11 |
Characterization of Metal-germanide Gate Electrodes
Formed by FUGE(Fully Germanided) Process |
Toshiba R&D center@*Yoshinori Tsuchiya 1, Masato
Koyama 1, Junji Koga 1, Akira Nishiyama 1
|
| 11.4 Review
Lectures and General Session: What's going on in Cu/Low-k technologies |
| Mar. 23 10:00`17:45 |
| 23a-C-@/ II |
| |
1 |
Introductory Talk:Cu/Low-k, what is difficult?
What do we understand? |
Matsushita Electric, Semiconductor Co.@Ogawa Shinichi |
| |
2 |
Cu/Low-k integration technology for 45nm node |
Toshiba SoC R&D Center@*Matsunaga Noriaki |
| |
3 |
Robust 45 nm-node, Dual Damascene Interconnects
with High Quality Cu/barrier Interface by a Novel Oxygen Absorption Process |
NEC 1, NEC Electronics 2,@Tada Munehiro 1, Abe
Mari 1, Ohtake Hiroto 1, Furutake Naoya 1, Narihiro Mitsuru 1, Arai Kouichi
1, Takeuchi Tsuneo 1, Saito Shinobu 1, Taiji Toshiji 2, Motoyama kouichi
2, |
| |
4 |
Air-Gap Interconnect Process for 45/65nm Node |
Hitachi, Ltd.1@Junji Noguchi 1, Takayuki Oshima
1, Syouichi Uno 1, Kiyohiko Sato 1 |
| |
5 |
Carbon nanotube technologies for future ULSI via
interconntcts |
Fujitsu Limited 1, Fujitsu Laboratories Ltd. 2@Awano
Yuji |
| |
|
Lunch 12:05`13:00 |
|
| 23p-C-@/ II |
| |
1 |
Film control and mechanism of porous low-k film
by post-cure treatment. |
System Devices Research Labs., NEC Corp.@*Ito Fuminori
1, Takeuchi Tsuneo 1, Hayashi Yoshihiro 1 |
| |
2 |
Low-k technology for mass production use: Material
design and film characteristics |
Semiconductor company,Toshiba corporation 1@*Watanabe
Kei 1 |
| |
3 |
Plasma-Induced Dense-Layer Formation and its Impact
on Pore Size Distribution Analysis |
MIRAI-ASRC, AIST 1,ASRC, AIST 2,MIRAI-ASET 3,RCNS,
Hiroshima Univ. 4@Hata Nobuhiro 1,2,Li Xianying 2,Ono Tetsuro 3,Fujii Nobutoshi
3,Takada Syozo 2,Naoko Kunishige 2,Takimura Toshinori 2,Kikkawa Takamaro
1,4 |
| |
4 |
Low-Damage Etching and Ashing Processes for Cu/Low-k
Interconnects |
Selete@*Soda Eiichi , Watanabe Tadayoshi, Matsubara
Yoshihisa , Matsuura Seiji , Koba Fumihiro , Kondo Seiichi , Kobayashi Nobuyoshi
|
| |
5 |
Characterization of damages in low-k filme by TEM/V-EELS |
Matsushita Electric, Semiconductor Co. 1, Toray
Res. Ctr., 2, Toshiba, Semiconductor Co. 3@Ogawa Shinichi 1, Ohtsuka Yuji
2, Shimada Miyoko 3 |
| |
|
Break 15:30`15:45 |
|
| |
6 |
Degradation of porous silica Low-k film properties
induced by CMP chemicals and its recovery process. |
MIRAI-ASET 1,MIRAI-ASRC-AIST 2,RCNS-Hiroshima-Univ.
3@*Ishikawa Akira 1,Matsuo Hisanori 1,Shishida Yoshinori 1,Yamanishi Toshiyuki
1,Nakayama Takahiro 1,Fujii Nobutoshi 1,Tanaka Hirofumi 1,Seino Yutaka 2,Hata
Nobuhiro 2,Kikkawa Takamaro 2,3 |
| |
7 |
Material Science of a Barrier Layer at Cu/ILD Interface |
Tohoku Univ. 1, JST 2@Junichi Koike 1, Masaki Haneda
1, Jun Iijima 1,2 |
| |
8 |
Highly reliable Cu damascene interconnects with
ALD-TaN thin film |
Renesas Technology Corp. 1@*Mori Kenichi,Maekawa
Kazuyoshi,Asai Koyu,Yoneda Masahiro |
| |
9 |
Characterization of crystal microstructure of Cu
interconnects using EBSP, and reliability of the interconnects |
Renesas Technology Corp.@*Hirose Yukinori 1,Shono
Tomoryo 1,Maekawa Kazuyoshi 1,Miyazaki Hiroshi 1 |
| 11.4 Interconnect
Technology |
| Mar. 24 10:00`18:30 |
| 24a-J-@/ II |
| |
1 |
Contact Hole Filling Characteristics of Cu Thin
Films Fabricated by H2 Addition Sputtering |
RCNS, Hiroshima Univ. 1@*Ooka Masahiro 1, Yokoyama
Shin 1 |
| |
2 |
Effect of the surface conditions of substrate and
reactor wall on supercritical fluid chemical deposition |
Yamanashi Univ. 1@*Eiichi Ukai 1,Eiichi Kondoh
1 |
| |
3 |
Control and Effect of Reaction Reagents on a Flow-type
Supercritical Fluid Deposition Processor(2) |
Univ.Yamanashi 1@*Hirose Michiru 1,Fukuda Jumpei
1,Kondoh Eiichi 1 |
| |
4 |
Cu seed layer deposition by reduction of CVD-Cu2O
at lower temperature |
Univ. of Tokyo, Tokyo Electron AT.@Hoon Kim 1,
Yasuhiko Kojima 2, Hiroshi Sato 2, Naoki Yoshii 2 , Shigetoshi Hosaka 2,
Yukihiro Shimogaki 1. |
| |
5 |
Side-wall and cross-section measurements using
sample-tilt method with CD-AFM (4) |
MIRAI-ASET 1, MRAI-ASRC AIST 2, Selete 3@Murayama
Ken 1, Terasawa Tsuneo 1, Gonda Satoshi 2, Koyanagi Hajime 1, Kobayashi
Nobuyoshi 3, Tomioka Kazuhiro 3 |
| |
|
Break 11:15`11:30 |
|
| |
6 |
Development of discharging tool of plating-solution
for local-plating |
Graduate School of Science and Technology Kumamoto
University 1@Fumito Imura 1, Ikai Kyo 1, Hiroyuki Kuroiwa 1, Akira Nakada
1, Hiroshi Kubota 1 |
| |
7 |
New chemistry development for Cu-SCFD (1) - Investigation
of reducing agent |
The Univ. of Tokyo 1@*Takeshi Momose 1, Tomohiro
Ohkubo 1, Masakazu Sugiyama 1, and Yukihiro Shimogaki 1 |
| |
8 |
New chemistry development for Cu-SCFD (2) - Investigation
of additive effect |
The Univ. of Tokyo@*Takeshi Momose 1, Tomohiro
Ohkubo 1, Masakazu Sugiyama 1, and Yukihiro Shimogaki 1 |
| |
9 |
Effect of Ta/TaN barrier thickness on Cu formation
by electroplating technique |
Akita Prefectural Univ. 1, Ibaraki Univ. 2@*Aoyama
Takashi 1, Sato Kotaro 1, Aoyagi Daisuke 1, Ohnuki Jin 2, Komiyama Takao
1, Yamaguchi Hiroyuki 1 |
| ’ |
10 |
Barrier properties of extremely thin ZrN films
for 45nm node technologies |
Kitami Inst of Technol. 1@*Sato Masaru 1,Takeyama
B. Mayumi 1,Noya Atsushi 1 |
| |
11 |
Diffusion Barrier Properties of Electroless Plated
CoWP layer on Silicon Nitride Film |
Kyushu Univ. 1, Yoshitama Surface Finishing Co.Ltd.
2@Ikeda Akihiro 1, Sugimoto Yosuke 1, Kuroki Yukinori 1, Kimiya Yasuhiro
2, Fukunaga Yoshiaki 2 |
| |
|
Lunch 13:00`14:00 |
|
| 24p-J-@/ II |
| |
1 |
Ru barrier property improvement by Al stuffing
for future highly reliable Cu interconnect |
Dept. of Materials Eng. The Univ. of Tokyo 1@Seki
Atsushi 1, Kim Hoon 1, Shimogaki Yukihiro 1 |
| |
2 |
Self-forming diffusion barrier layer in Cu-Mn alloy
metallization with low-k materials |
Japan Science and Technology Agency 1, Tohoku Univ
2,@Toshiba Corporation Semiconductor Company SoC Research and Development
Center 3 @J Iijima 1, M. Haneda 2, H. Igarashi 2, T. Usui 3, H. Nasu 3,
H. Shibata 3, J. Koike 2 |
| |
3 |
Defects introduced into electroplated Cu films
during self-annealing probed by positron annihilation |
Inst. of Appl. Phys, Univ. of Tsukuba1, STARC2,
AIST3@*A. Uedono1, T. Suzuki2, T. Nakamura2, T. Ohdaira3 and R. Suzuki3
|
| |
4 |
Characterization of Vacancy Defects in Electroplated
Cu Films by Positron Annihilation and its Impact on Stress Migration Reliability |
Fujitsu Labs. LTD. 1, University of Tsukuba 2,
Fujitsu LTD. 3@*Takashi Suzuki 1, Akira Uedono 2, Yoriko Mizushima 1, Takahiro
Kouno 3, Tomoji Nakamura 1, Haruo Tsuchikawa 1 |
| ’ |
5 |
The Effect of Line Shape on Voiding in Cu plating
film |
Process & Manufacturing Engineering center TOSHIBA
Corp.@Morita Toshiyuki 1, Toyoda Hiroshi 1, Ito Sachiyo 1, Hasunuma Masahiko
1 |
| |
6 |
Effect of in-situ H2-plasma treatment
on reliability of Cu interconnects |
Renesas Semiconductor Engineering Corp. 1,Renesas
Technology Corp. 2@*Noriaki Amou 1, Kazuyoshi Maekawa 2, Kenichi Mori 2,
Hiroshi Miyazaki 2, Daisuke Kodama 2, Yukinori Hirose 2, Kazuhito Honda
2, Koyu Asai 2, Masahiro Yoneda 2 |
| |
7 |
Study of a plasma-enhanced polymerization thin
film as a diffusion barrier |
MIRAI-ASRC AIST 1, MIRAI-ASET 2, RCNS Hiroshima
Univ. 3@Takenobu Yoshino 1, Nobuhiro Hata 1, Jun Kawahara 2, Osamu Kiso
1, Nobutoshi Fujii 2, Takamaro Kikkawa 1 3 |
| |
8 |
Improvement of Reliability in MEMS Devices by Electrodeposition
of Organic Dielectric Film |
NTT Microsystem Integration Labs. 1, NTT Advanced
Technology Corp. 2@*Sakata Tomomi 1, Ishii Hiromu 1, Sato Norio 1, Shimamura
Toshishige 1, Kuwabara Kei 1, Kudou Kazuhisa 2, Machida Katsuyuki 1 |
| |
|
Break 16:00`16:15 |
|
| |
9 |
Polymer removal using diluted HF/choline mixture
in BEOL process |
Process & Manufacturing Engineering Center, TOSHIBA
Corp. Semiconductor Company@Yasuhito Yoshimizu, Tsuyoshi Matsumura, Yoshihiro
Uozumi, Hiroki Sakurai, Hiroshi Tomita |
| ’ |
10 |
Development of Eco-friendly Copper Interconnect
Cleaning Process |
Toshiba Semiconductor Company Process & Manufacturing
Engineering Center 1, Toshiba Semiconductor Company Memory Division 2,@*Yoshihiro
Uozumi 1, Takahito Nakajima 2, Tsuyoshi Matsumura 1, Yasuhito Yoshimizu
1, Hiroki Sakurai 1, Hiroshi Kawamoto 1, Hiroshi Tomita 1, Yoshitaka Tsunashima
1 |
| |
11 |
Ru removal on wafer bevel and backside with little
chemical use |
EBARA CORPORATION1, Semiconductor Leading Edge
Technologies2@*Kaoru Yamada1CTakashi Ishigami2,Kunitoshi Nanba2 |
| |
12 |
Characteristic of Metal oxide removal using atomic
hydrogen generated by heated catalyzer |
Kyushu Inst.of Tech 1,ASET 2@*Ueno Tomoya 1,Matuo
Yosuke 1,Miyazaki Yasuo 1,Oizumi Hiroaki 1.2,Izumi Akira 1,Nishiyama Iwao
2 |
| |
13 |
Reduction of CuO in a hot-filament radical technology
and damage of porous low-k material |
Yamanashi Univ. 1@*Masaya Fukasawa 1,Eiichi Kondoh
1 |
| |
14 |
Characterization of Cu surface with TMCTS treatment
using XPS –Reduction effect by TMCTS- |
MIRAI-ASET 1, MIRAI-ASRC AIST 2, RCNS Hiroshima
Univ. 3@*Uchida Yoko 1, Nakayama Takahiro 1, Tanaka Hirofumi 1, Fujii Nobuhiro
1, Kohmura Kazuo 1, Shimoyama Masashi 1, Kikkawa Takamaro 2,3 |
| |
15 |
Analysis of MBT adsorption layers on copper surface
by spectroscopic ellipsometryi2j |
Tokyo Inst. of Tech. 1,Chiba Inst. of Tech. 2,Nitta
Haas Incorporated 3@*Nishizawa Hideaki 1,Sugiura Osamu 2,Matsumura Yoshiyoki
3,Kinoshita Masaharu 3 |
| |
16 |
Effect of Frictional Force Vector on Film Delamination
in CMP Process |
MIRAI-ASET 1, Semiconductor Leading Edge Technologies,
Inc. 2, MIRAI-ASRC-AIST 3, RCNS-Hiroshima Univ. 4@*Matsuo Hisanori 1, Kondo
Seiichi 2, Ishikawa Akira 1, Fukaya Koichi 2, Kobayashi Nobuyoshi 2, Kikkawa
Takamaro 3,4 |
| £ |
17 |
Development and Application of Poly-Si CMP slurry |
*Kim Comp 1, Choi Comp 1, Yun Comp 1, Yoon Comp
1, Hong Comp 1, Cho Comp 1, Moon Comp 1@*Kim Sungjun 1, Choi Jaekwang 1,
Yun Seongkye 1, Yoon Boun 1, Hong Changki 1, Cho Hanku 1, Moon Jootae 1 |
| 11.4 Interconnect
Technology |
| Mar. 25 9:00`13:00 |
| 25a-J-@/ II |
| |
1 |
Characterization of porous low-k films with surface
silylation coverage |
Hiroshima Univ. RCNS 1@*Kayaba Yasuhisa 1, Kikkawa
Takamaro |
| ’ |
2 |
Formation of mesoporous zeolite film using surfactant |
Research Center for Nanodevices and Systems, Hiroshima
Univ. 1, MIRAI-ASRC-AIST 2@*Seo Toshiki 1, Yoshino takenobu 2, Hata Nobuhiro
2, Kikkawa Takamaro 1 |
| |
3 |
Theoretical study of low-k BN substitution polyimides |
Graduate School of Eng, Kyoto Univ. 1, Fukui Institute
for Fundamental Chemistry, Kyoto Univ. 2, JST CREST 3@*M. Uejima 1, T. Sato
1,2, K.Tanaka 1,3
|
| ’ |
4 |
Thin-film growth and Properties of SiOC by Organic
Catalytic CVD
|
Material Design Factory 1, Osaka City Univ. 2,
General Physics Inst. 3@*Hata Tsuyoshi 1,2, Nakayama Hiroshi 1,2, Kulatov
Erkin 3 |
| |
5 |
Effects of Porosity and Skeletal Structure of Porous
Silica Low-k Films on Their Thamal Expansion Coefficient |
ASRC, AIST 1,MIRAI-ASRC, AIST 2,MIRAI-ASET 3,RCNS,
Hiroshima Univ. 4@Yamaji Masahiro 1,Hata Nobuhiro 1,2,Takada Syozo 1,Nakayama
Takahiro 3,Fujii Nobutoshi 3,Kikkawa Takamaro 2,4 |
| |
6 |
Utilization of EB Cure on various SiOC structure
for improving film characteristics |
Sony Corp. 1@*Nishizawa Kenichi 1.Matsugai Hiroyasu
1.Tabuchi Kiyotaka 1.Kanamura Ryuichi 1 |
| |
7 |
Depth profile of pore size in UV-annealed low-k
dielectrics (II) |
AIST 1, SPL 2@*Ohdaira Toshiyuki 1, Shioya Yoshimi
2, Muramatsu Makoto 1, Suzuki Ryoichi 1, Maeda Kazuo 2 |
| |
8 |
Influence of Ultraviolet Irradiation on Porous
Silica Low-k Dielectric Films |
MIRAI-ASET 1, MIRAI-ASRC-AIST 2, ASRC-AIST 3, RCNS-Hiroshima
Univ. 4@*T. Nakayama 1, N. Fujii 1, H. Tanaka 1, K. Kohmura 1,
Y. Seino 2, Y. Takasu 3, N. Hata 2, T. Kikkawa 2,4
|
| |
|
Break 10:30`10:45 |
|
| |
9 |
Structure Studies of UV Cured SiOC films (1) |
Toray Research Center Inc.@*Miyoshi Riko,Matsuda
Keiko,Miwa Yuuko,Hashimoto Hideki,Yoshikawa Masanobu |
| |
10 |
Structure study of UV cured SiOC films (2) |
Toray Research Center Inc. 1@Matsuda Keiko 1,Miyoshi
Riko 1,Sugie Ryuichi 1,Hashimoto Hideki 1,Yoshikawa Masanobu 1 |
| |
11 |
Influence of UV Treatment on Skeletal Structure
of a Porous Silica Low-k Film |
ASRC, AIST 1, MIRAI-ASRC, AIST 2, MIRAI-ASET 3,
RCNS, Hiroshima Univ. 4@Takada Syozo 1,Hata Nobuhiro 1,2,Nakayama Takahiro
3,Fujii Noritoshi 3,Seino Yutaka 2,Kikkawa Takamaro 2,4 |
| |
12 |
Removal of Etching Residues on Low-k Film in Supercritical
Carbon Dioxide |
Sony Corporation 1@*Yuuji Murata 1,Koichiro Saga
1,Hitoshi Kuniyasu 1,Takeshi Hattori 1 |
| |
13 |
Effect of Wafer Rotation on Photoresist Stripping
Using Supercritical Carbon Dioxide |
Sony Corp. 1@*Saga Koichiro 1, Kuniyasu Hitoshi
1, Hattori Takeshi 1 |
| |
14 |
BEOL Integration of High Capacitance-density MIM
capacitor suitable for Analog Applications |
Hitachi Central Research Lab. 1, Hitachi Microdevice
Div. 2@K.Takeda 1,T.Ishikawa 1,T.Mine 1,T.Imai 2,T.Fujiwara 2 |
| ’ |
15 |
Statistical analysis of via distribution of each
layer in LSI |
Integrated Research Institute, Tokyo Institute
of Technology@Takanori Kyogoku 1, Takumi Uezono 1, Kenichi Okada 1, Kazuya
Masu 1 |
| 11.5 Si
Process Technology |
| Mar. 22 9:30`17:15 |
| 22a-W-@/ II |
| |
1 |
Offline Evaluation of Light Intensity Distribution
Formed by Phase-Modulators for PMELA |
Advanced LCD Technologies Development Center Co.,Ltd.
1@*Taniguchi Yukio 1,Azuma Kazufumi 1,Matsumura Masakiyo 1 |
| |
2 |
Effects of Light Intensity Gradient on Microstructure
of PMELA-Si Thin-Films |
ALTEDEC 1@*Katou Tomoya 1, Azuma Kazufumi 1, Taniguchi
Yukio 1, Matsumura Masakiyo 1 |
| |
3 |
DOF extension method for phase-modulators (1) |
ALTEDEC 1@*Endo Takahiko 1, Taniguti Yukio 1, Akita
Noritaka 1, Katou Tomoya 1,
Shimoto Shigeyuki 1, Azuma Kazufumi 1, Matsumura Masakiyo 1 |
| |
4 |
Effects of Capping Layer on the Combination of
Ni-imprint and Excimer Laser Annealing for Si-Grain Positioning |
CMS, Kyushu Inst. of Technol. 1@*Nakagawa Gou 1,
Asano Tanemasa 1 |
| |
5 |
Excimer laser annealing of a-Si film with H distribution
for low temperature process |
Univ. of Hyogo1, Univ. of Tokyo2@Yamaguchi Univ.3
@*Akira Heya1, Daisuke Sannami1, Masahiro Nakamura1, Tadashi Serikawa2,
Naoya Kawamoto3, Naoto Matsuo1
|
| ’ |
6 |
Molecular-dynamics simulations of crystal growth
of Silicon thin films by excimer laser annealing (II) |
Kyushu Univ.@*Kuranaga Takahide 1, Mitani Takanori
1, Ogata Tomohiko 1, Kisikawa Ryuzo 1, Munetoh Shinji 1, Motooka Teruaki
1 |
| |
|
Break 11:00`11:15 |
|
| |
7 |
Two Dimensional Crystallization Growth of Thin
Si Film by Overlap of Laser Irradiation |
Tohoku Univ. 1@*Fujii Shuntaro 1,Kuroki Shin-Ichiro
1,Kotani Koji 1,Ito Takashi 1 |
| ’ |
8 |
Crystallization of Double Layer Si Thin Films by
Solid Green Laser Annealing |
Nara Inst. Sci. & Technol. 1, National Inst. Adv.
Ind. Sci & Technol. 2@Yuta Sugawara 1, Yano Hiroshi 1, Hatayama Tomoaki
1, Uraoka Yukiharu 1, Fuyuki Takashi 1, Mimura Akio 2 |
| |
9 |
Laser Crystallization of Silicon Films using Optical
Absorption Layer of Diamond-Like Carbon2 |
Tokyo A&T Univ. 1,Seikei Univ. 2,HIGHTEC SYSTEMS
3@*Maki Masato 1,Sameshima toshiyuki 1,Andou Nobuyuki 2,Sano Naoki 3 |
| |
10 |
Improvement of Laterally Grown Poly-Si Layer by
Post Annealing |
Central Research Lab., Hitachi 1@*Tai Mitsuharu
1, Matsumura Mieko 1, Sato Takeshi 1, Hatano Mutsuko 1 |
| |
11 |
Influence of C, N, and O Impurities on SELAX Crystallization |
Hitachi CRL 1CHitachi Displays, Ltd. 2@Ouchi Kiyoshi
1CMatsumura Mieko 1CSato Takeshi 1CHatano Mutsuko 1CNoda Takeshi 2CKamo
Takahiro 2 |
| |
|
Lunch 12:30`13:30 |
|
| 22p-W-@/ II |
| |
1 |
Influence of surface treatment of a YSZ template
layer on low temperature crystallization of an Si film |
Jpn. Adv. Inst. Sci. & Tech.@*Kanazawa Keisuke
1,Nishioka Kensuke 1,Koyano Mikio 1,Horita Susumu 1 |
| |
2 |
Characterization of Substrate Surface Temperature
in He Added Ar Thermal Plasma Jet Annealing |
ADSM, Hiroshima Univ. 1@Koba Naohiro 1,Higashi
Seiichiro 1,Okada Tatsuya 1,Kaku Hirotaka 1,Murakami Hideki 1,Miyazaki Seiichi
1 |
| |
3 |
Direct Observation of Millisecond Phase Transformation
of a-Si Films Induced by Thermal Plasma Jet Irradiation |
Grad. School of AdSM, Hiroshima Univ 1@Kaku Hirotaka
1, Higashi Seiichiro 1, Okada Tatsuya 1, Murakami Hideki 1, Miyazaki Seiichi
1 |
| |
4 |
Crystallization of amorphous Si film Prepared by
Irradiating Femto-Second Laser |
Yamaguchi Univ. 1, Univ. of Hyogo 2@Naoya Kawamoto
1, Naoto Matsuo 1, Kaiki Tamura 1, Hitoshi Ishikawa 1, Toshihisa Fujiwara
1, Kiyoshi Ueno 1, Tadaki Miyoshi 1, Akira Heya 2 |
| |
5 |
Microstructures and the crystallization temperatures
for Ni-induced lateral crystallized Si0.6Ge0.4 thin films |
Kyushu Univ. 1, Kyushu Univ. 2, Kyushu Univ. 3@Itakura
Masaru 1, Masumori Shunji 1, Tomokiyo Yoshitsugu 1, Kuwano Noriyuki 2, Kanno
Hiroshi 3, Sadoh Taizo 3, Miyao Masanobu 3 |
| ’ |
6 |
Microstructure of Ge thin film fabricated by Ni-metal
induced lateral crystallization |
Kyushu Univ. 1, Kyushu Univ. 2, Kyushu Univ. 3@Masumori
Shunji 1, Itakura Masaru 1, Kuwano Noriyuki 2, Kanno Hiroshi 3, Sadoh Taizou
3, Miyao Masanobu 3 |
| ’ |
7 |
Fabrication of FETs with poly-Ge thin films obtained
by oxidation-induced condensation from amorphous SiGe on SiO2 |
Univ. of Tokyo 1@*Suzuki Sho 1,Nishimura Tomonori
1, Kita Koji 1,Toriumi Akira |
| |
|
Break 15:15`15:30 |
|
| |
8 |
Enhanced solid-phase crystallization of a-SiGe
films using Ni-imprint method |
Dept.Electronics,Kyushu Univ.1,CMS Kyushu Inst.of
Tech.2@*Toko Kaoru 1,Aoki Tomohisa 1,Kanno Hiroshi 1,Kenjo Atsushi 1,Baba
Akiyoshi 2,Asano Tanemasa 2,Miyao Masanobu 1 |
| |
9 |
Low-Temperature Crystallization of Si Films Obtained
Using Ferritin Nano-Particles |
Nara Inst. of Science and Technology 1, Matsushita
Electric Industrial 2@Nanjo Yasuhiro 1,Kirimura Hiroya 1,Uraoka Yukiharu
1,Fuyuki Takashi 1,Okuda Mitsuhiro 1,Yamashita Ichiro 1,2 |
| |
10 |
Formation of c-Si/SiO2 by lateral solid-phase
epitaxyFEffects of post-annealing
|
Dept. Electronics Kyushu Univ. 1, TOSHIBA CORPORATION
Semiconductor Com. 2, Graduate School of Engineering Hokkaido Univ 3@*Tsumura
Yoshitaka 1, Sadoh Taizoh 1, Kenjo Atsushi 1, Kimura Koji 2, Yoshino Chihiro
2, Yonemura Koji 2, Araki Shota 3, Hamada Koichi 3, Ohnuki Somei 3, Miyao
Masanobu 1 |
| |
11 |
Growth mechanism of Si for solar cells in thin
film zone melting crystallization. |
Tokyo Inst of Technology 1,JST PRESTO 2@*Sawaki
Daigo 1,Tanaka Yumi 2 1,Terasawa Shinsuke 1,Ihara Manabu 1 2 |
| ’ |
12 |
Fabrication of poly-Si films by continuous local
thermal CVD |
Furukawa Electric Crop. 1,NAIST 2@Toshihiro Nakamura
1,Hiroshi Kuraseko 1,Sadayuki Toda 1,Hisashi Koaizawa 1,Yukiharu Uraoka
2,Takashi Fuyuki 2 |
| ’ |
13 |
Evaluation of Poly-Si films Crystallinity Using
Infrared Probe Light |
Kobe Steel,Ltd.@*Sakoda Naokazu 1,Takamatsu Hiroyuki
1 |
| |
14 |
Local resistance measurement on low-temperature
poly-Si layer of TFT using scanning spreading resistance microscopy |
RCMSEC Osaka Univ. 1,Mitsubishi Electric Corp.
2@Yamagiwa Hiroto 1,*Tanaka Kouichi 1,Abo Satoshi 1,Wakaya Fujio 1,Sakamoto
Takao 2,Tokioka Hidetada 2,Nakagawa Naoki 2,Takai Mikio 1 |
| 11.5 Si
Process Technology |
| Mar. 23 9:30`18:00 |
| 23a-W-@/ II |
| |
1 |
Interface and bulk state densities of TEOS-SiO2
|
University of Yamanashi 1, Tokyo University of
Science. Suwa 2,
Miyatsu Co.,Ltd. 3@*Yusuke Tsuchiya 1, Ryouhei Takeda 1, Minoru Mitsui 1,
Keisuke Arimoto 1, Tetsuya Sato 1, Kiyokazu Nakagawa 1, Yukio Fukuda 2,
Yutaka Aoki 3,
Syouji Sato 3 |
| ’ |
2 |
High-quality CVD-SiO2 interfacial layer for LTPS-TFT
gate insulator |
Central Research Lab., Hitachi, Ltd.@*Hirotaka
Hamamura 1, Mieko Matsumura 1, Koji Fujisaki 1, Toshiyuki Mine 1, Kazuyoshi
Torii 1 |
| |
3 |
Fabrication and Electrical Characteristics of Poly-Si
TFTs@with Room-temperature Sputter-deposited SiO2 films |
Tokyo Univ. RCAST 1,Nara Inst.of Science and Technology
2@*Serikawa Tadashi 1,Miyamoto Takamasa 2,Ueno Hiroshi 2,Sugawara Yuuta
2,Yano Yuuji 2,Hatakeyama Tomohiro 2,Uraoka Yukiharu 2,Takashi Fuyuki 2
|
| |
4 |
Reliability of High Quality Polycrystalline Si
Thin Film Transistors with Sputter-deposited SiO2 Films. |
NAIST 1,Univ. of Tokyo 2@*Uraoka Y. 1,Miyamoto
T. 1,Ueno H. 1,Yano H. 1,Hatayama T. 1,Fuyuki T. 1,Serikawa T. 2 |
| |
5 |
Low Temperature Formation of TFT Source/Drain by
Utilizing Silicidation |
CMS Kyushu Inst. of Technol. 1@*Esaki Masahiko
1. Nakagawa Gou 1. Asano Tanemasa 1 |
| |
6 |
Development of surface treatment for plastic films
using atomic hydrogen
|
Univ. of Hyogo@Akira Heya Makoto Noda, Naoto Matsuo |
| |
|
Break 11:00`11:15 |
|
| |
7 |
Technology of transferring thin-film-electrical
circuits to foreign plastic substrates 4. |
Tokyo Univ. of Agri. & Tech. 1, TRADIM 2@*Yoshioka
Kazuya 1, Yamamoto Michihisa 1, Sameshima Toshiyuki 1, Takechi Kazushige
2 |
| |
8 |
Fabrication of Thick Photosensitive-Polysilazane
Film for Low-Temperature Poly-Si TFT |
Central Research Lab., Hitachi, Ltd. 1, Hitachi
Displays, Ltd. 2@*Daisuke Ryuzaki 1, Daisuke Sonoda 2, Toshiki Kaneko 2,
Mutsuko Hatano 1, Kazuyoshi Torii 1 |
| |
9 |
Analysis of Threshold Voltage for Poly-Si TFTs |
Tokyo A&T Univ.1, Ryukoku Univ.2@*T. Sameshima1
and M. Kimura2 |
| |
10 |
Temperature dependence of threshold voltage of
the low-temperature poly-Si thin film transistor |
Hitachi CRL 1CHitachi Displays 2@Mieko Matsumura
1, Yoshiaki Toyota 1, Takeshi Sakai 2 |
| |
11 |
Characterization of trap density at grain boundaries
using doped poly-Si TFTs |
Ryukoku Univ. 1, Tokyo Univ. of Agriculture and
Technology 2@Yoshino Takuto 1, *Kimura Mutsumi 1, Sameshima Toshiyuki 2 |
| |
|
Lunch 12:30`13:30 |
|
| 23p-W-@/ II |
| |
1 |
Measurement of Temperature Dependence of Field
Effect Mobility in Poly-Si TFTs |
Osaka Univ. 1,NAIST 2@*Kuzuoka Tsuyoshi 1,Shimizu
Yoshiyuki 1,Tsuji Hiroshi 1,Kamakura Yoshinari 1,Morifuji Masato 1,Uraoka
Yukiharu 2,Taniguchi Kenji 1 |
| |
2 |
Low temperature fabrication Ge-TFT with Schottky
S/D |
Kyushu Univ.@*Nakamura Maki 1, Kamizuru Hayato
1, Kenjo Atsushi 1, Sadoh Taizoh 1, Miyao Masanobu 1 |
| |
3 |
Device simulator with Lorentz force and Hall effect
of polycrystalline semiconductor
|
Ryukoku Univ. 1
@Tani Satoshi 1, Okumura Tomoya 1, Kimura Mutsumi 1
|
| |
4 |
Reliability Analysis of Ultra-Low-Temperature Poly-Si
Thin Film Transistors |
NAIST 1, SAIT 2, Hanyang Univ 3@*Ueno Hitoshi 1,
Sugawara Yuta 1, Yano Hiroshi 1, Hatayama Tomoaki 1, Uraoka Yukiharu 1,
Fuyuki Takashi 1, Jung J 2, Park K 2, Kim J 2, Kwon J 2, Noguchi Takashi
3 |
| |
5 |
Relationship between stress bias condition and
hot-carrier degradation in n-channel poly-Si TFTs@ |
Tokyo Polytech. Univ. @Yajima Tosihisa 1,Yamada
Atsuhiro 2,Hirata Seisirou 2,Satoh Toshihumu 1,2,Tango Hiroyuki 1,2 |
| |
|
Break 14:45`15:00 |
|
| ’ |
6 |
A study on selective etching for elevated PtSi
SALICIDE |
Tokyo tech 1@*Ohkuma Naoki 1, Sawakuma Yu 1, Ohmi
Shun-ichiro 1 |
| |
7 |
Raman study on low-temperature formation of Ni-silicide
layers |
Kyoto Inst.Tec. 1,Wakayama Univ. 2,WaferMasters
3@*Sasaki Takashi 1,Nishibe Shintaro 1,Harima Hiroshi 1,Isshiki Toshiyuki
1,
Yoshimoto Masahiro 1,Kisoda Kenji 2,Woo Sik Yoo 3,Fukada Takashi 3 |
| |
8 |
Investigation of Fabrication Process of n+/p
Junction for Germanium n-channel MOSFET |
Advanced LSI Tech. Lab., Toshiba Corp. 1@*Koike
Masahiro 1, Kamata Yoshiki 1, Ino Tsunehiro 1, Koyama Masato 1, Nishiyama
Akira 1 |
| |
9 |
Modulation of Schottky-Barrier Height by Dopant
Segregation in NiGe/Ge(100) interface |
MIRAI-ASET 1,MIRAI-AIST 2,The Univ. of Tokyo 3@*Keiji
Ikeda 1,Yoshimi Yamashita 1,Noriyuki Taoka 2,Naoharu Sugiyama 1,Shin-ichi
Takagi 2,3 |
| |
10 |
Reduction of the halo redistribution by C implantation |
NEC Electronics Corp. Process Technology Div.@*Mineji
Akira, Shishiguchi Seiichi |
| |
11 |
Ultra-Low energy ion implantation in Si |
RIIF-AIST@Hiroshi Itoh, Kazuhiro Yamamoto |
| |
|
Break 16:30`16:45 |
|
| |
12 |
Relationship between Diluted Gas and Damage of
Plasma Doping |
Research Center for Nanodevices and Systems, Hiroshima
Univ. 1@*Yoshikawa Koji 1, Kobayashi Kei 1, Sunami Hideo 1 |
| |
13 |
Ion-implantation Technology to Deep Trench Sidewall |
Fuji Electric Advanced Technology Co., Ltd. 1@Kouta
Takahashi 1, Ayako Yajima 1, Yuko Ueki 1, Kunio Mochizuki 1, Haruo Nakazawa
1 |
| ’ |
14 |
Evaluation for arsenic-implantation-induced mixing
of silicon atoms in silicon isotope superlattices with SIMS |
Keio Univ. 1, CREST-JST 2, Musashi Inst. Tech.
3, NTT-AT 4@*Yasuo Shimizu 1, Kohei M. Itoh 1,2, Toshiko Okui 3, Yasuhiro
Shiraki 3, Akio Takano 4 |
| |
15 |
Analysis of Ultra-shallow dopant by High-resolution
Rutherford Backscattering |
Kobelco Research Inst. Inc.1,Kobelco Research Inst.
Inc.1@Fujikawa Kazuhisa 1,Sasakawa Kaoru 1 |
| |
16 |
Numerical Calculation of Silicon Wafer Temperature
during Flash Lamp Annealing |
Yokohama National Univ. 1,Ushio Electric 2@*Habuka
Hitoshi 1,Hara Akio 1,Karasawa Takeshi 2,Yoshioka Masaki 2 |
| 11.5 Si
Process Technology |
| Mar. 24 9:00`17:45 |
| 24a-W-@/ II |
| |
1 |
The High Activation Evaluation of Atmospheric In-situ
As Doped Si Selective Epitaxial Growth |
Sony Corporation 1@*Ikuta Tetsuya 1,Miyanami Yuki
1,Fujita Shigeru 1,Iwamoto Hayato 1 |
| ’ |
2 |
Low-temperature selective SiGe epitaxial growth
using SiH4-GeH4-HCl-H2 mixed gases |
Fujitsu Ltd. 1, Fujitsu Laboratories Ltd. 2@Fukuda
Masahiro 1, Shimamune Yosuke 2, Koizuka Masaaki 1, Mori Toshifumi 1, Tamura
Naoyoshi 2, Kase Masataka 1, Miyajima Motoshu 1 |
| |
3 |
Reaction Analysis of High-Temperature Silicon Dioxide
LPCVD |
Fuji Electric Adv. Tech. Mat. & Sci. Lab. 1, Device
Tech. Lab. 2, Univ. of Tokyo 3@*Shimizu Ryosuke 1, Ogino Masaaki 2, Sakai
Shigeru 2, Shimogaki Yukihiro 3 |
| |
4 |
Investigation of Correlation between Reaction Space
and Deposited SiO2 film Thickness of LP-CVD-HTO |
Fuji Electric Advanced Technology Co.,Ltd.1,Tokyo
Univ. 2 @*S Sakai 1,M Ogino 1,R Shimizu 1, Y Shimogaki 2 |
| ’ |
5 |
Stress control of Silicon Nitride films by Cat-CVD
method |
Osaka Univ.1 , Selete 2@*Okamoto Hiroki 1, Inumiya
Seiji 2, Matsuki Takeo 2, Tamura Yasuyuki 2, Robata Tutomu 2, Ohno Katsumi
2, Nara Yasuo 2, Nakamura Kunio 2, Yuba Yoshihiko 1, Akasaka Youichi 1 |
| |
6 |
In-plane strain in SiO2/Si(<5-nm-thick)/SiO2 structure |
NTT Basic Research Labs. 1, Univ. Hyogo@2, CAST@3@Hiroo
Omi 1CTomoaki Kawamura1, Yoshihiro Kobayashi 1, Yoshiyuki Tsusaka 2, Yasushi
Kagoshima 2, Junji Matsui 3
|
| |
|
Break 10:30`10:45 |
|
| |
7 |
Strain distribution in strained-Si substrates using
UV-Raman mapping |
Meiji Univ. 1@*Yamasaki Kosuke 1, Kosemura Daisuke
1, Tanaka Satoshi 1, Ogura Atsushi 1 |
| ’ |
8 |
Evaluation of strain depth profiles in the strained-Si
substrates by in-plane X-ray diffractmetery |
Meiji Univ. 1,JASRI 2@*Kosemura Daisuke 1,Yamasaki
Kosuke 1,Tanaka Satoshi 1,Ogura Atsushi 1,Hirosawa Ichiro 2 |
| |
9 |
Characterization of depth profile of traps in SIMOX
wafers |
Bio Nano Electronics Research Center, Toyo Univ.@*Oda
Keisuke 1,Kajiwara Kenji 1,Miyazawa Yosiyasu 1,Nakajima Yosikata 1, Hanajiri
Tatsuro 1,Toyabe Toru 1,Sugano Takuo 1
|
| |
10 |
Electrical Estimation of Single-ion-induced Damage
against Electron Mobility in SOI Layer |
Waseda Univ. 1, Waseda ZAIKEN 2, ASMeW 3@*Okamoto
Shintaro 1, Shinada Takahiro 3, Kobayashi Takahiro 1, Kurosawa Tomonori
1, Nakayama Hideki 1, Ohdomari Iwao 1,2,3 |
| |
11 |
Shape analysis of void in direct bonding SOI wafer |
Osaka Univ. 1, Osaka Univ. 2, Osaka Univ. 3, Osaka
Univ. 4, Osaka Univ. 5@*Noritaka Ajari 1, Junichi Uchikosi 2, Takaaki Hirokane
3, Kenta Arima 4, Mizuho Morita 5 |
| |
12 |
Analysis of sensitivity development of piezo-resistive
membrane type pressure sensor by anisotropic etching process on MEMS |
Graduate School of Science and Technology Kumamoto
Univ. 1, Department of Engineering Kumamoto Univ. 2@*Naoki Hayashi 1, Satoshi
Shibamura 2, Akira Nakada 2, Hiroshi Kubota 1 |
| |
13 |
Enhancement of the hole mobility in very thin Si
Layers on SIMOX substrates |
Dept. of Materials Sci. & Eng, Kyushu Univ. 1@*Tabira
Kousuke 1, Ikoma Yosifumi 1, Kato Yosimine 1, Motooka Teruaki 1 |
| |
|
Lunch 12:30`13:30 |
|
| 24p-W-@/ II |
| |
1 |
Evaluation of dopant diffusion in the confined
Si wire. |
Waseda Univ. 1, Waseda Zaiken 2@*Seike Aya 1, Sano
Itsutaku 1, Ohdomari Iwao 1,2 |
| ’ |
2 |
Evaluation of implanted impurity ions in nano-Si
wires(3) |
Waseda Univ. 1,Waseda Zaiken 2@*Sano Itsutaku 1,Seike
Aya 1,Ohdomari Iwao 1,2 |
| |
3 |
Development of single ion detection system by detecting
current variation |
Waseda Univ. 1,ASMeW 2,WasedaZAIKEN 3@*Nakayama
Hideki 1,Shinada Takahiro 2,Okamoto Shintarou 1,Kobayashi Takahiro 1,Kurosawa
Tomonori 1,Ohdomari Iwao 1,2,3 |
| |
4 |
Simulation of thermal oxidation for silicon nano-wire |
Waseda Univ. 1,Waseda Nano Inst. 2,PRESTO-JST 3@*Hiromichi
Ohta 1, Watanabe Takanobu 1 2 3,Tatsumura Kousuke 1,Ohdomari Iwao 1 2 |
| |
5 |
Control of Si Nano-crystal Formation from SiOx
Films Induced by Rapid Thermal Annealing Using Thermal Plasma Jet |
Hiroshima Univ.@Okada Tatsuya 1, Higashi Seiichiro
1, Kaku Hirotaka 1, Koba Naohiro 1, Murakami Hideki 1, Miyazaki Seiichi
1 |
| |
6 |
Development of W/Poly-Si selective oxidation by
MMT plasma |
Hitachi Kokusai Electric Inc. 1@*Ueda Tatsushi
1,Hirano Akito 1,Funaki Katsunori 1,Terasaki Tadashi 1,Ogawa Unryu 1 |
| |
7 |
Characterization of Mo-Ta system for dual metal
gates |
AIST NeRI@*Matsukawa Takashi 1,Liu Yongxun 1,Endo
Kazuhiko 1,Masahara Meishoku 1,Ishii Kenichi 1,Yamauchi Hiromi 1,Tsukada
Junichi 1,Suzuki Eiichi 1 |
| |
8 |
Work function control of HfN Gate electrode |
Kurahashi Teruo Fujitsu lab 1.Sakamoto Manabu Fujitsu
lab 2.Mishima Yasuyoshi Fujitsu lab 3.@*Kurahashi Teruo 1.Sakamoto Manabu
2.Mishima Yasuyoshi 3. |
| |
|
Break 15:30`15:45 |
|
| |
9 |
Observation of anisotropic and nonlinear thermal
expansion of NiSi thin films |
Rigaku Corp. 1, Tohoku Univ. 2@Ogi Aya 1, Konya
Takayuki 1, Mitsunaga Toru 1, Inaba Katsuhiko 1, Shishido Toetsu 2 |
| |
10 |
Influence of nitrogen content on the electrical
properties of TaSiN metal gate stack. |
Semiconductor Leading Edge Technologies 1@Nam Kabjin
1, Matsuki Takeo 1, Tamura Yasuyuki 1,Ootsuka Fumio 1, Nara Yasuo 1 |
| |
11 |
Observation of Ni silicidation reaction in sub-100
nm gate regions |
Graduate School of Eng., Nagoya Univ. 1,ESI, Nagoya
Univ. 2,Selete 3,CCRAST, Nagoya Univ. 4@Ito Daisuke 1,*Sakai Akira 1,Nakatuka
Osamu 2,Kondo Hiroki 1,Akasaka Yasusi 3,Nara Yasuo 3,Ogawa Masaki 4,Zaima
Sigeaki 1 |
| |
12 |
Increase in sheet resistance of Ni silicides at
temperature region for transition from NiSi to NiSi2 |
Tokyo Tech.FCRC 1,Tokyo Tech.IGSSE 2,ULSI Process
Technology Development Center, Semiconductor Company, Matsushita Electric
Industrial Co.Ltd 3 @*Shiozawa Takashi 1,Xiang Ruifei 1,Nagahiro Koji 1,Ahmet
Parhat 1,Kakushima Kuniyuki 2,Tsutsui Kazuo 2,Iwai Hiroshi 1,Okuno Yasutoshi
3,Matsumoto Michikazu 3,Kubota Masafumi 3 |
| ’ |
13 |
Effect of additional deposition of different metal
layers in Ni silicide formation |
Tokyo Tech FCRC 1, Tokyo Tech IGSSE 2CULSI Process
Technology Development Center, Semiconductor Company, Matsushita Electric
Industrial Co.Ltd 3@Nagahiro Koji 1, Xiang Ruifei 1, Shiozawa Takashi 1,
Ahmet Parhat 1, Kakushima Kuniyuki 2, Tsutsui Kazuo 2, Iwai Hiroshi 1, Okuno
Yasuyuki 3, Matsumoto Mitikazu 3, Kubota Masafumi 3 |
| |
14 |
Evaluation of Chemical Structures and Work Function
of NiSi near the Interface between NiSi and SiO2 |
ADSM, Hiroshima Univ. 1, Fujitsu Lab. Ltd. 2,RCNS,
Hiroshima Univ. 3@Azuma Daisuke 1, Murakami Hideki 1, Ohta Akio 1, Munetaka
Yuuki 1, Yoshinaga Hiromichi 1, Higashi Seiichiro 1,Miyazaki Seiichi 1,Aoyama
Takayuki 2, Shibahara Kentaro 3 |
| |
15 |
Chemical Vapor Deposition of Ni-silicide |
Tri Chemical Lab. Inc. 1, Meiji Univ. 2, Toyota
Tech. Inst. 3@*Ishikawa Masato 1, Muramoto Ikuyo 1, Machida Hideaki 1, Imai
Satoshi 2, Ogura Atsushi 2, Ohshita Yoshio 3 |
| ’ |
16 |
Workfunction Tuning of Pd2Si Fully-Silicided
Gate by Impurity Predoping |
Hiroshima Univ. 1@*Hosoi Takuji 1, Sano Kosuke
1, Hosawa Kosei 1, Kentaro Shibahara 1 |
| 11.6 Si
Devices/Integration Technology |
| Mar. 23 9:30`12:30 |
| 23a-X-@/ II |
| |
1 |
Effect of Patterned Ground Shield on Characteristics
of Spiral Inductors Fabricated in CMOS Process |
Mitsubishi Electric Corporation 1@*Shintani Kenji
1,Nishikawa Kazuyasu 1,Yamakawa Satoshi 1 |
| |
2 |
Characteristics of Transmission Lines Fabricated
by CMOS Process (6) |
Mitsubishi Electric Corporation 1@*Nishikawa Kazuyasu
1, Shintani Kenji 1, Yamakawa Satoshi 1 |
| ’ |
3 |
Analysis of signal transmission characteristics
of Si integrated antennas |
Research Center for Nanodevices and Systems, Hiroshima
Univ. 1 @*Kimoto Kentaro 1, Sasaki Nobuo 1, Pran Kanai Saha 1, Nitta Masakazu
1,
Kikkawa Takamaro1 |
| ’ |
4 |
Interference in Inter-chip Ultra Wideband Signal
Transmission using Si Integrated Antennas |
Research Center for Nanodevices and Systems, Hiroshima
Univ. 1@*Nitta Masakazu 1, Kimoto Kentaro 1, Sasaki Nobuo 1, Kikkawa Takamaro
1 |
| |
5 |
Effect of Threshold Voltage Fluctuations on Stability
of Inverter Circuit of MOS Current Mode Logic |
CIR, Tohoku Univ. 1, RIEC, Tohoku Univ. 2@*Na Hyoung-jun
1, Tanaka Kosuke 2, Momma Yuto 2, Suemitsu Maki 1, Endoh Tetsuo 2 |
| ’ |
6 |
Critical Substrate Bias in VTCMOS Scheme with Short
Channel Devices and its Modeling |
Inst.of Industrial Science Univ. of Tokyo @Arifin
Tamsir Putra 1, Tetsu Ohtou 2, Toshiharu Nagumo 3, Toshiro Hiramoto 4 |
| |
|
Break 11:00`11:15 |
|
| |
7 |
65nm Node MOSFET and embedded memory device development
for low power application |
Toshiba Corporation Semiconductor Company@*N.Kamishita
1,T.Ishiduka 1,S.Aota 1,K.Utsumi 1,M.Kanda 1,Y.Matsubara 1,T.Nakayama 1,S.Yamada
1,F.Matsuoka 1 |
| |
8 |
Decaborane Ion Implantation for PMOSFETs to Enable
Formation of Steep Ultra-Shallow Junction and Small Threshold Voltage Fluctuation |
FUJITSU LABORATORIS LTD@1, NISSIN Ion Equipment
Co.,ltd.@2
@*T. Aoyama 1, M. Fukuda 1, S. Umisedo 2, N. Hamamoto 2, T. Nagayama 2,
M. Tanjyo 2
|
| |
9 |
Effect of offset spacer on Carrier Profiles in
Sub-50 nm P-MOSFETs |
Fujitsu Lab. 1, Fujitsu 2@*Hidenobu Fukutome 1,
Takashi Saiki 2, Ryou Nakamura 2, Akihiro Usujima 2, Takayuki Aoyama 1 |
| |
10 |
Improvement of 45 nm technology node nMOSFET by
applying Indium Halo implantation |
Semiconductor Company Toshiba Corporation 1, Semiconductor
Business Unit Sony Corporation 2@*Hisashi Aikawa 1, Masafumi Hamaguchi 1,
Taiki Komoda 1, Seiji Takahashi 2, Takuji Matsumoto 2, Kazunobu Ohta 2,
Amane Oishi 1, Yukio Tagawa 2, Hisao Yoshimura 1, Keiichi Ohno 2, Masaaki
Iwai 1, Masaki Saito 2, Naoki Nagashima 2, Fumitomo Matsuoka 1 |
| |
11 |
Characterization of MOS Transistor with Κ channel |
Fujitsu Lab1,Fujitsu Lab2,Fujitsu Lab3@*Shido Hideharu2,Fukuda
Masatoshi3,Mishima Yasuyoshi |
| 11.6 Si
Devices/Integration Technology |
| Mar. 24 9:30`18:45 |
| 24a-X-@/ II |
| |
1 |
Low temperature bonding of sharp micro bumps |
Center for Microelectronic Systems, Kyushu Institute
of Technology@Naoya Watanabe 1, Tanemasa Asano 1 |
| |
2 |
Accuracy of Soft-error simulation in Flip-flops |
Fujitsu Lab. 1@*Uemura Taiki 1, Tosaka Yoshiharu
1, Satoh Shigeo 1 |
| |
3 |
Evaluation of soft error tolerance in SOI-SRAMs
using high energy nuclear microprobes (III) |
RCMSEC Osaka Univ. 1, Renesas Technology Corp.
2, AIST KANSAI 3@*Abo Satoshi 1, Hirata Yasushi 1, Ueda Hirofumi 1, Wakaya
Fujio 1, Iwamatsu Toshiaki 2, Ipposhi Takashi 2, Mokuno Yoshiaki 3, Horino
Yuji 3, Takai Mikio 1 |
| |
4 |
Analysis of Single Event Transient Pulses of a
0.2-Κm FD-SOI MOSFET |
Univ. Tokyo 1, ISAS 2@*Masahiro Aimi 1, Daisuke
Kobayashi 2, Hirobumi Saito 1,2 , Kazuyuki Hirose 2 |
| |
5 |
ΐ-SiC MIS diode memory devices |
Tokyo University of Argri Tech. 1@Masatsugu Shoji
1.Nagashima Toshiaki 1.Suda Yoshiyuki 1 |
| |
|
Break 10:45`11:00 |
|
| |
6 |
Study of oxygen-doped-GeSbTe-Phase-Change-memory
cells |
Hitachi Central Research Lab. 1, Hitachi ULSI Systems
2, Hitachi Mechanical Engineering Research Lab. 3, Renesas Technology 4,
Kochi Univ. of Technology 5@Nozomu. Matsuzaki 1, Kenzo Kurotsuchi 1, Yuichi
Matsui 1, Osamu Tonomura 1, Naoki Yamamoto 5, Yoshihisa Fujisaki 1, Naoki
Kitai 2, Riichiro Takemura 1, Kenichi. Osada 1, Satoru Hanzawa 1, Hiroshi
Moriya 3, Tomio Iwasaki 3, Takayuki Kawahara 1, Norikatsu Takaura 1, Motoyasu
Terao 1, Masamichi Matsuoka 4, Masahiro Moniwa 4 |
| |
7 |
Study of Measurement Method for Transient Programming
Current of Oxygen-doped GeSbTe Phase-Change memory cells |
Hitachi Central Research Laboratory 1, Hitachi
ULSI Systems 2, Hitachi Mechanical Engineering Research Laboratory 3, Renesas
Technology 4@@@K. Kurotsuchi 1, N. Takaura 1, N. Matsuzaki 1, Y. Matsui
1, O. Tonomura 1, Y. Fujisaki 1, N. Kitai 2, R.Takemura 1, K. Osada 1, S.
Hanzawa 1, H. Moriya 3, T. Iwasaki 3, T. Kawahara 1, M. Terao 1, M. Matsuoka
4, and M. Moniwa 4 |
| |
8 |
Analysis of SRAM Cell including Discrete Dopant
Distribution |
Fujitsu Lab. 1@*Tanabe Ryo 1, Ashizawa Yoshio 1,
Oka Hideki 1 |
| |
9 |
Current-voltage characteristics of nitride trap
non-volatile memory devices |
Hiroshima Univ. 1@*Takii Eisuke 1, Shibahara Kentaro
1 |
| ’ |
10 |
Stacked Dual Floating Gate Memory using SiO2/HfO2/SiO2
Stacked Tunnel Barriers |
QNERC & Dept. of Phys. Elec., Tokyo Tech. 1, Dept.
of E&E Eng., Musashi Inst. of Tech. 2, Adv. Research Labs., Musashi Inst.
of Tech. 3, SORST-JST 4
@*Sato Daisuke 1, Niikura Hiroki 1,2, Tsuchiya Yoshishige 1,4, Mizuta Hiroshi
1,4, Nohira Hiroshi 2, Maruizumi Takuya 2, Shiraki Yasuhiro 3, Oda Shunri
1,4 |
| ’ |
11 |
Charging-discharging behavior of the ferritin protein-core
floating gate MOS devices |
NAIST 1, Matsushita ATR 2@Matsumura Takashi 1,
Miura Atsushi 1, Hikono Takio 1, Uraoka Yukiharu 1, Fuyuki Takashi 1, Yoshii
Shigeo 2, Yamashita Ichirou 1,2 |
| |
|
Lunch 12:30`13:30 |
|
| 24p-X-@/ II |
| £ |
1 |
Optimization of RF-SET sensitivity by using SET-Spice
hybrid simulation |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1, SORST-JST 2@*Muruganathan Manoharan 1, Mizuta Hiroshi 1,2, Oda Shunri
1,2 |
| |
2 |
High-rate Random Number Generator using Narrow
Channel Si Nanocrystal MOSFET |
Corporate R&D Center,Toshiba Corporation@*Matsumoto
Mari 1,Ohba Ryuji 1,Matsushita Daisuke 1,Muraoka Koichi 1,Yasuda Shinichi
1,Tanamoto Tetsufumi 1,Uchida Ken 1,Fujita Shinobu 1 |
| |
3 |
Room-temperature operation of data processing circuit
based on single-electron transfer and detection with MOSFET technology |
NTT Basic Research Labs. 1, Hokkaido Univ. 2@Nishiguchi
Katsuhiko 1, Fujiwara Akira 1, Ono Yukinori 1, Hiroshi Inokawa 1, Yasuo
Takahashi 2 |
| |
4 |
Low temperature characteristics of Si single-electron
transistors with gate-induced barriers |
NTT Basic Research Laboratories 1, Hokkaido Univ.
2, NIST 3@*Fujiwara Akira 1, Inokawa Hiroshi 1, Yamazaki Kenji 1, Namatsu
Hideo 1, Takahashi Yasuo 2, Neil Zimmerman 3, Stuart Martin 3 |
| £ |
5 |
Light illumination effects on a single-hole-tunneling
SOI-FET |
Shizuoka Univ. 1@*Burhanudin Zainal 1, Nuryadi
Ratno 1, Tabe Michiharu 1 |
| |
6 |
Numerical study on single-electron pump operation
by random multidot transistors |
Shizuoka Univ. 1@*Yokoi Kiyohito 1, Ikeda Hiroya
1, Tabe Michiharu 1 |
| |
7 |
Transport Characteristics of SOI-MOSFETs Embedding
Artificial Dislocation Network |
Shizuoka Univ. 1@*Ishino Toshiya 1,Yamamoto Chihiro
1,Ishikawa Yasuhiko 1,Ratno Nuryadi 1, Tabe Michiharu 1 |
| ’ |
8 |
Periodic Coulomb oscillations in Si single-electron
transistor based on multiple islands |
Hiroshima Univ. 1, Rohm 2@*Kensaku Ohkura 1, Tetsuya
Kitade 2, Anri Nakajima 3 |
| ’ |
9 |
Voltage Gain Dependence of FWHM of Room-Temperature
Negative Differential Conductance in Silicon Single-Hole Transistor |
Univ. of Tokyo 1@*Kousuke Miyaji 1, Masumi Saitoh
1, Toshiro Hiramoto 1 |
| ’ |
10 |
Observation of Negative Differential Conductance
in Room-Temperature Operating Silicon Single-Electron Transistor |
IIS, Univ. of Tokyo 1@*Masaharu Kobayashi 1,Miyaji
Kousuke 1,Toshiro Hiramoto 1 |
| |
|
Break 16:00`16:15 |
|
| £ |
11 |
A Few Electron Memory Device Based on Surface Nitrided
Nanocrystalline Silicon Dots |
QNERC, Tokyo Tech, and SORST-JST 1
Dept. of Physical Electronics, Tokyo Tech, and SORST-JST 2@*Shaoyun Huang
1, Kouichi Usami 1, Yoshishige Tsuchiya 1, Hiroshi Mizuta 2, and Shunri
Oda 1 |
| |
12 |
Charging and Discharging Characteristics of Valency
Controlled Si Quantum Dots Floating Gate |
Hiroshima Univ. 1,@*Katsunori Makihara 1, Takeshi
Nagai 1, Mitsuhisa Ikeda 1, Yoshihiro Kawaguchi 1, Hideki Murakami 1, Seiichiro
Higashi 1, Seiichi Miyazaki 1 |
| |
13 |
Multi-step Electron Disharging from Silicon-Quantum-Dot
Floating Gate in nMOSFETs |
Hiroshima Univ. 1@*Nagai Takeshi 1,Ikeda Mitsuhisa
1,Yusuke Shimizu 1,Higashi Seiichiro 1,Miyazaki Seiichi 1 |
| |
14 |
Ultra High Density HfO2 Nanodots Flash
Memory |
Fujitsu Laboratories Ltd. 1@*Wakai Hironori, Kobayashi
Masahiro, Kumise Takaaki, Yamaguchi Masaomi, Nakanishi Toshiro and Tanaka
Hitoshi |
| £ |
15 |
Fabrication of pn junction array using Si-microprobes
grown by in-situ doping VLS growth |
Toyohashi Univ. of Tech. 1, ISSRC (Toyohashi Univ.
of Tech.) 2, JST-CREST 3@*Islam Md. Shofiqul 1, Funagayama Naoki 1, Kawashima
Takahiro 1, Takao Hidekuni 1,2,3, Sawada Kazuaki 1,2,3, Ishida Makoto 1,2,3 |
| £’ |
16 |
Temperature dependence of Fowler-Nordheim current
oscillations in Si/SiO2/Si systems |
Shizuoka Univ. 1@*Moraru Daniel 1, Nagata Daisuke
1, Tabe Michiharu 1 |
| |
17 |
Fabrication of planner structure Si/SiGe RTD applied
with P doping four-layer Strain-Relief buffer |
Graduate School of Eng., Tokyo Univ. of Agric.
and Tech. 1, Faculty of Tech.,Tokyo Univ. of Agric. and Tech. 2@*Hirotaka
Maekawa 1CYoshihiro Sano 1, Ueno Chiro 2, Yoshiyuki Suda 1
|
| £ |
18 |
Capacitance-Voltage and Conductance-Voltage characteristics
of Double Barrier Resonant Tunneling Diode Fabricated with epi-Si/g-Al2O3
Heterostructure |
Toyohashi Univ. of Tech. 1, JST-CREST 2@Halima
Khatun 1, Mohammad Shahjahan 1, Sawada Kazuaki 1,2, Ishida Makoto 1,2 |
| £’ |
19 |
Resonant Tunneling Device Using a Single Nanocrystalline
Silicon Quantum Dot |
Quantum Nanoelectronics Research Center and Department
of Physical Electronics, Tokyo Institute of Technology. 1
SORST Japan Science and Technology, 2
@Akhmadi Surawijaya 1, Yoshishige Tsuchiya 1,2, Hiroshi Mizuta 1,2, and
Shunri Oda 1,2, |
| £ |
20 |
Resonant tunneling between discrete energy levels
in a silicon double quantum dot formed in a MOS transistor
|
NTT BRL1, SORST-JST2, Jilin Univ.3, Tokyo Inst.
of Technology4@*Liu Hongwu1,2,3, Fujisawa Toshimasa1,4, Ono Yukinori1, Fujiwara
Akira1, Inokawa Hiroshi1, Hirayama Yoshiro1,2 |
| 11.6 Si
Devices/Integration Technology |
| Mar. 25 9:30`19:00 |
| 25a-X-@/ II |
| ’ |
1 |
Analysis and reduction of the switching voltage
of the NEMS memory device by using the 3-D finite element simulation |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1, SORST-JST 2, Central Research Laboratory, Hitachi, Ltd. 3@*Nagami Tasuku
1, Momo Nobuyuki 1, Tsuchiya Yoshishige 1,2, Saito Shinichi 3, Arai Tadashi
3, Shimada Toshikazu 3, Mizuta Hiroshi 1,2, Oda Shunri 1,2 |
| |
2 |
Fabrication of double layer structure towards NEMS
memory device |
QNERC & Dept. of Physical Electronics, Tokyo Tech.
1, CRL, Hitachi Ltd. 2, SORST-JST 3 @N. Momo 1, T. Nagami 1, *Y. Tsuchiya
1,3, S. Saito 2,3, T. Arai 2,3,
T. Shimada 2,3, H. Mizuta 1,3, S. Oda 1,3 |
| |
3 |
Experimental mechanical stress characterization
of MEMS by using of confocal laser scanning microscope with a Raman spectroscopy
interface |
JSPMI 1CRenishaw 2, Lasertec 3 @Experimental mechanical
stress characterization of MEMS by using of confocal laser scanning microscope
with a Raman spectroscopy interface |
| |
4 |
Schottky Barrier Modulation by Charge Transfer
Doping Using Cesium Implanted into Oxide Layers |
MIRAI-ASET 1, MIRAI-ASRC, AIST 2@*Kimoto Kenji
1, Tetsuya Tada 2, Toshihiko Kanayama 2 |
| |
5 |
Degradation of Current Drivability of Schottky
Barrier S/D Transistors Having High-k Gate Dielectrics and Possible Measures
to Suppress the Phenomenon |
Corporate R&D Center, Toshiba Corp.@*Ono Mizuki
1, Nishiyama Akira 1, Koyama Masato 1 |
| |
6 |
Ni Salicide Technology for High-density SRAM |
Toshiba Corporation Semiconductor Company@*Kohei
Nakagami 1, Masahiko Kanda 1, Shoji Aota 1, Naotaka Kamishita 1, Kuniaki
Utsumi 1, Tatsuji Ishiduka 1, Shingo Torii 1, Takeo Nakayama 1 |
| |
7 |
First-principles Calculations of Electronic Structure
of the Nickel Silicide/Silicon Interface |
Toshiba Corporate R&D Center 1, Toshiba Semicon.
Company 2@Takashi Yamauchi 1, Atsuhiro Kinoshita 1, Kazuya Ohuchi 2, Koichi
Kato 1 |
| ’ |
8 |
Experimental evaluation of parasitic resistances
in dopant-segregation (DS-) Schottky barrier transistors (SBTs) |
Toshiba Corp.@*Yoshifumi Nishi 1, Atsuhiro Kinoshita
1, Daisuke Hagishima 1, Junji Koga 1 |
| |
9 |
Low-Temperature Formation of NiSi2 by
Nitrogen Addition during Ni Sputtering |
MIRAI-ASET 1, MIRAI-ASRC, AIST 2, The Univ. of
Tokyo 3@Mise Nobuyuki 1, Migita Shinji 2, Watanabe Yukimune 1, Nabatame
Toshihide 1, Satake Hideki 1, Toriumi Akira 2,3 |
| ’ |
10 |
Fermi-level pinning at metal/germanium junctions |
Dept. of Material Engineering, The Univ. of Tokyo
1@*Nishimura Tomonori 1, Kita Koji 1, Toriumi Akira 1 |
| ’ |
11 |
Ultra-thin Ge-on-Insulator(GOI) Metal S/D p-channel
MOSFETs fabricated by low temperature MBE growth |
Tokyo Univ. 1,Tokyo Univ. 2@Uehara takashi 1 ,Matsubara
hiroshi 2,Satoshi Sugahara 1,Shin-ichi Takagi 1,2 |
| |
12 |
MOSFETs Using Ohmic Contact Alloys for the Metallic
Source and Drain |
Dept. of frontier informatics, Univ. of Tokyo 1,
Dept. of Electronic Eng., Univ of Tokyo 2@*Satoshi Sugahara 1, Ryoshou Nakane
2, Shinichi Takagi 1 |
| |
|
Lunch 12:30`13:30 |
|
| 25p-X-@/ II |
| |
1 |
Mobility Enhancement due to Volume Inversion in
(110)-Oriented Ultrathin Body Double-gate nMOSFETs |
IIS, Univ. of Tokyo@*Tsutsui Gen 1, Saitoh Masumi
1, Saraya Takuya 1, Nagumo Toshiharu 1, Hiramoto Toshiro 1 |
| |
2 |
High Current Drive Uniaxially-Strained SGOI pMOSFETs
Fabricated by Lateral Strain Relaxation Thechnique |
MIRAI-ASET 1, MIRAI-AIST 2, Toshiba Ceramiccs 3,
Univ. of Tokyo@*Irisawa Toshifumi 1, Numata Toshinori 1, Tezuka Tsutomu
1, Usuda Koji 1, Hirashita Norio 1, Sugiyama Naoharu 1, Toyoda Eiji 3, Shin-ichi
Takagi 2,4 |
| |
3 |
High Performance Multi-Gate pMOSFETs using uniaxially-strained
SGOI channels |
MIRAI-ASET 1, MIRAI-AIST 2, Toshiba Ceramiccs 3@*Irisawa
Toshifumi 1, Numata Toshinori 1, Tezuka Tsutomu 1, Usuda Koji 1, Nakaharai
Shu 1, Hirashita Noorio 1, Sugiyama Naoharu 1, Toyoda Eiji 3, Shin-ichi
Takagi 2 |
| |
4 |
Fabrication and Investigation of the Vertical Double-Gate
MOSFET using a Neutral Beam Etching |
AIST Nanoele. 1, Tohoku Univ. 2 @*Kazuhiko Endo1,
Syuichi Noda2, Meishoku Masahara1, Takuya Ozaki2, Tomohiro Kubota2, Seiji
Samukawa2, Yongxun Liu1, Kenichi Ishii1, Yuki Ishikawa, Etsuro Sugimata1,
Takashi Matsukawa1, Hidenori Takashima1, Hiromi Yamauchi1, Eiichi Suzuki1 |
| |
5 |
Co-integration Technology of TiN Metal-Gated 3T/4T
FinFETs |
AIST@Yongxun Liu 1, Etsuro Sugimata 1, Takashi
Matsukawa 1, Kenichi Ishii 1, Kazuhiko Endo 1, Meishoku Masahara 1, Shinichi
Ouchi 1, Hiromi Yamauchi 1, Jyunichi Tsukata 1, Yuki Ishikawa 1, Eiichi
Suzuki 1 |
| |
6 |
Operation-Region Identification and Rough Capacitance
Estimation Method for Four-Terminal DG-MOSFETs |
NeRI, AIST@Shin-ichi O'uchi |
| ’ |
7 |
Analysis of DC/AC Performance of Underlap/Offset
Single-Gate (SG) SOI MOSFET
|
Kansai Univ.@Yoshioka Yoshimasa 1, Akiyama Tomoki
1, Tahara Yuki 1, Yoshimoto Kazuhisa 1, Omura Yasuhisa 1 |
| ’ |
8 |
Structure-Oriented Issues in High-Frequency Operation
of Multi-FinFET Devices and Design Perspective |
Kansai Univ 1@Tahara Yuki 1,Tamura Takuta 1,Omura
Yasuhisa 1 |
| ’ |
9 |
S/D Engineering of Multi-Fin Multiple-Gate SOI
FET |
Kansai Unive. 1@Konishi Hideki 1, *Yoshimoto Kazuhisa
1, Omura Yasuhisa 1 |
| |
10 |
Parasitic elements on FinFET depending on structure
of source and drain region. |
Tokyo Tech. 1 2, Indian Tech. Bombay 3,@*Kobayashi
Yusuke 1, Venkatnarayan Hariharan 3, Kakushima Kuniyuki 1, Tsutsui Kazuo
1, Iwai Hiroshi 2, V. Ramgopal Rao 3 |
| |
|
Break 16:00`16:15 |
|
| ’ |
11 |
A study on fabrication process of ultra-small 3D
channels for TML(Twin-Multi-Layer Channel)-MOSFET |
Tokyo Tech 1, R.I.E.C Tohoku Univ. 2, Tokyo Tech
Prof. Emeritus 3
@*Kawashita Michihiro 1, Yamasaki Hiroshi 1, Ohmi Shun-ichiro 1, Sakuraba
Masao 2, Murota Junichi 2, Sakai Tetsushi 3 |
| |
12 |
Analysis on Grain-Boundary Diffusion in Source-Drain
Silicidation for Three-Dimensional MOS Transistor |
Research Center for Nanodevices and Systems, Hiroshima
Univ. 1,@*Matsumura Shunpei 1,Sugimura Atsushi 1,Okuyama Kiyoshi 1, Shibahara
Kentaro 1,Hideo Sunami 1, |
| |
13 |
Dependence of parasitic resistance on gate-to-contact
distance in three-dimensional MOS structure |
Research Center for Nanodevices and Systems,Hiroshima
Univ. 1@*Sugimura Atsushi 1,Matsumura Syunpei 1,Okuyama Kiyosi 1,Sunami
Hideo 1 |
| |
14 |
Channel Structure Design of Multi-Gate MOSFETs
for Substrate Bias Control |
IIS, Univ. of Tokyo 1@Nagumo Toshiharu 1, Hiramoto
Toshiro 1 |
| ’ |
15 |
Experimental Study on Body Factor in Short Channel
FD SOI MOSFET with Ultrathin BOX |
Univ. of Tokyo 1, Chuo Univ. 2 @*Yokoyama Koki
1,2, Tsutsui Gen 1, Nagumo Toshiharu 1, Nagashiro Waichi 1, Kobayashi Masaharu
1, Saraya Takuya 1, Hiramoto Toshiro 1 |
| |
16 |
Study of Effect of Halo Implantation on 30nm Ultra
Thin Body Si Double-Gate MOSFET with 100nm Gate Length |
RIEC Tohoku Univ. 1@*Momma Yuto 1, Endoh Tetsuo
1 |
| ’ |
17 |
Recessed Source/Drain SOI Technology for Body Control
Devices |
Renesas Technology Corp. 1@*Tsujiuchi Mikio 1,Iwamatsu
Toshiaki 1,Ipposhi Takashi 1,Tsuchiya Osamu 1 |
| |
18 |
Study on the Floating Body Effect on Strained-Si/SGOI
nMOSFET |
CMS Kyushu Inst. of Technol. 1@*Itani Kazuhiro
1, Sakamoto Daisuke 1, Mizota Takashi 1, Matsuki Daisuke 1, Nishisaka Mika
1, Asano Tanemasa 1 |
| |
19 |
Advantages of depletion SOI MOSFET |
Bio Nano Electronics Research Center, Toyo Univ.
1@K. Miyazawa 1, T. Yamazaki 1,Y. Nakajima 1, T. Hanajiri 1, T. Toyabe 1,
and T. Sugano 1 |
| |
20 |
Parameter and Random Dopant Fluctuation on Fully-Depleted
SOI MOSFETs with a Very Thin BOX |
IIS Univ. Tokyo 1, R&D Group, Hitachi, Ltd. 2@*Tetsu
Ohtou 1, Nobuyuki Sugii 2, Toshiro Hiramoto 1 |
| ’ |
21 |
First Principles Calculation on Electronic Band
Structures of Sub-1nm SOI films |
Kobe Univ. 1@Teratani Yoshiyuki 1, Tsuchiya Hideaki
1, Miyoshi Tanroku 1 |
| 11.6 Si
Devices/Integration Technology |
| Mar. 26 9:00`15:00 |
| 26a-X-@/ II |
| |
1 |
High Frequency Distortion Characteristics of Sub-100
nm High-k MOSFET |
Tokyo Tech., FCRC 1,SELETE 2@*Nakagawa Masayuki
1,Yoshizaki Satoshi 1,Song JaeYeol 1,Chong Woei Yuan 1,Nara Yasuo 2,Yasuhira
Mituo 2,Ohtsuka Fumio 2,Arikado Tsunetoshi 2,Nakamura Kunio 2,Kakushima
Kumiyuki 1,Parhat Ahmet 1,Tsutsui Kazuo 1,Aoki Hitoshi 1,Iwai Hiroshi 1 |
| |
2 |
Vth-tunable CMIS Platform with High-k Gate Dielectrics |
Renesas Technology Corp. 1@*Hayashi Takashi 1,
Mizutani Masaharu 1, Inoue Masao 1, Yugami Jiro 1, Tsuchimoto Junichi 1,
Nishida Yukio 1, Sayama Hirokazu 1, Yamashita Tomohiro 1, Oda Hidekazu 1,
Eimori Takashisa 1, Ohji Yuzuru 1 |
| |
3 |
Degradation of the Inversion Mobility Due to Incorporated
Nitrogen in HfO2 Gate Dielectrics MOSFETs |
MIRAI-ASRC AIST 1, MIRAI-ASET 2, Univ. of Tokyo
3@*Ota Hiroyuki 1, Ogawa Arito 2, Satake Hideki 2, Nabatame Toshihide 2,
Toriumi Akira 1,3 |
| ’ |
4 |
Measurement Methodology to Determine CET of Ultra
Thin SiO2 Film |
The Univ. of Tokyo 1@*Kazuyuki Tomida 1, Koji Kita
1, Akira Toriumi 1 |
| |
5 |
Accurate determination of Vfb by considering ionized
dopant charge in the Si surface quantization layer |
MIRAI-ASET 1, MIRAI-AIST 2, Univ. of Tokyo 3, Selete
4@*Yasuda Naoki 1, Ota Hiroyuki 2, Horikawa Tsuyoshi 2, Toriumi Akira 2,3,
Tamura Yasuyuki 4, Sasaki Takaoki 4, Ootsuka Fumio 4 |
| |
6 |
Reduction of Leakage Current at Trench MOS Gate
by Hydrogen Annealing |
Fuji Electric Adv.Tech. 1,ISIR Osaka Univ. 2@*Kuribayashi
Hitoshi 1,Hiruta Reiko 1,Shimizu Ryosuke 1, Koichi Sudoh 2,Iwasaki Hiroshi
2 |
| |
|
Break 10:30`10:45 |
|
| |
7 |
Effect of Strain on Gate Currents of strained-Si
MOSFET |
Tokyo Univ. 1, Tokyo Univ. Grad. 2@*Hoshii Takuya
1, Sugahara Satoshi 2, Takagi Shin-ichi 1,2 |
| |
8 |
p-n junction leakage current in strained-Si/SGOI
diode |
MIRAI-ASET 1, MIRAI-ASRC AIST 2@Akihito Tanabe
1, Toshinori Numata 1, Tsutomu Tezuka 1, Norio Hirashita 1, Shin-ichi Takagi
2 |
| |
9 |
Reduction of Leak Current in pMOSFET on Strained-Si/SGOI
by Applying Local Oxidation of SiGe |
CMS Kyushu Inst. of Technol. 1, Fukuryo Semicon
2@*Sakamoto Daisuke 1, Nishisaka Mika 1, Enokida Toyotsugu 2, Hagino Hiroyasu
2, Asano Tanemasa 1 |
| |
10 |
Performance Improvement and Stress Evaluation in
PMOSFET with SiGe Source/Drain |
Semiconductor Company Toshiba Corporation 1, Semiconductor
Business
Unit Sony Corporation 2
@*Rie Yamaguchi 1,Tomoya Sanuki 1,Osamu Fujii 1,Kazunobu Ohta 2,Masaaki
Iwai 1, Hisao Yoshimura 1, Masaki Saito 2, Naoki Nagashima 2, Seiji Yamada
1 and Fumitomo Matsuoka 1 |
| ’ |
11 |
Channel Direction Dependence of Inversion-Layer
Mobility in Local Strained Channel MOSFETs |
Advanced LSI Technology Laboratory, TOSHIBA Corporation
1, SoC R&D Center, TOSHIBA Corporation Semiconductor Company 2@*Chika Tanaka
1, Kazuya Ohuchi 2, Atsuhiro Kinoshita 1, Ken Uchida 1, Junji Koga 1 |
| |
|
Lunch 12:00`13:00 |
|
| 26p-X-@/ II |
| |
1 |
Comparison in electrical characteristics between
III-V Semiconductor n-MOSFETs and Si n-MOSFETs |
Univ. Tokyo@*Shinichi Takagi, Satoshi Sugahara |
| ’ |
2 |
New epitaxial growth technique of III-V compound
semiconductors on Si substrates for III-V-on-insulator (III-V-OI) MOSFET |
The University of Tokyo ,Department of Frontier
Informatics@*Masato Shichijo 1CSatoshi Sugahara 1, Shinichi Takagi 1 |
| |
3 |
Carrier Transport with Elastic Scattering and Ohmfs
Law |
Univ. Tsukuba 1@*Natori Kenji 1, Kurusu Takashi
1 |
| ’ |
4 |
Validation of Accurate Inversion Layer Mobility
Extraction Method in Short Channel MOSFETs |
Dept. of Materials Engineering, The Univ. of Tokyo
1@*Chen Lian 1, Irie Hiroshi 1, Kita Koji 1, Toriumi Akira 1 |
| |
5 |
Investigation of validity of Matthiessen's rule
on MOS inversion layer mobility through the Hall factor analysis |
Univ. of Tokyo 1@*Kita Koji 1, Irie Hiroshi 1,
Toriumi Akira 1 |
| |
6 |
Energy relaxation due to acoustic phonon scattering
in n-type Si-MOSFETs |
IIS Univ. of Tokyo 1, GSFS Univ. of Tokyo 2@*Park
KyungHwa 1, Hirakawa Kazuhiko 1, Takagi Shinichi 2 |
| |
7 |
Influence of doping concentration on current characteristics
of phosphorus-doped n-channel SOI MOSFETs (2) |
NTT Basic Research Labs. 1, Akita Univ. 2, Hokkaido
Univ. 3@*Ono Yukinori 1, Nishiguchi Katsuhiko 1, Takashina Kei 1, Horiguchi
Seiji 2, Inokawa Hiroshi 1, Takahashi Yasuo 3 |
| |
8 |
Physical Origin for Anomalous Behavior of Coulomb
Scattering Mobility in Highly Doped Channel MOSFETs |
Toshiba RDC 1,Toshiba Semiconductor Co. 2,Univ.
of Tokyo@*Nakabayashi Yukio 1,Koga Junji 1,Ishihara Takamitsu 1,Takayanagi
Mariko 2,Takagi Shinichi 3 |
| 11.7 Simulation
|
| Mar. 23 13:30`17:30 |
| 23p-X-@/ II |
| ’ |
1 |
Development of Doping Multi-Process Simulator Based
on Hybrid Quantum Chemical Molecular Dynamics Method |
Tohoku Univ. 1, JST-PRESTO 2, NICHe Tohoku Univ.
3@*Masuda Tsuyoshi 1, Tsuboi Hideyuki 1, Koyama Michihisa 1, Endou Akira
1, Kubo Momoji 1,2, Carlos Del Carpio 1, Miyamoto Akira 1,3 |
| |
2 |
Development of a technique for automatic optimization
of etchback mask design for STI-CMP |
Hitachi Res. Lab., Hitachi Ltd.1, Renesas Technology2@*Ohtake
Atsushi 1,Arai Toshiyuki 2,Masuda Hiroyuki 2 |
| |
3 |
A Study of Grain-Boundary Modeling on Simulation
of TFT Circuit Using SPICE II
|
Shimane Univ. 1@*Yoshida Toshiyuki 1 |
| |
4 |
Simulation study of organic TFT device structures |
Toyo Univ.Dept.Engineering 1,Waseda Univ.Nanotechnology
Res.Lab. 2@*Matsuki Kouji 1,Takani Toshiyuki 1, Toyabe Toru 1, Edura Tomohiko
2, Wada Yasuo 2 |
| ’ |
5 |
Implementation of 2D Tunneling Model into Monte
Carlo Simulator and Its Application to Flash Memory |
Nagoya Univ. 1@*Masato Miyazaki, Shigeyasu Uno,
Kazuo Nakazato |
| £’ |
6 |
Design and Analysis of Functional NEMS-gate MOSFETs
and SETs |
QNERC, Tokyo Tech, and SORST-JST 1
Dept. of Physical Electronics, Tokyo Tech, and SORST-JST 2@*Benjamin Pruvost1,
Hiroshi Mizuta1,2, and Shunri Oda1,2 |
| |
|
Break 15:00`15:15 |
|
| |
7 |
Empirical Modeling of Snap-back Operation of SOI
MOSFETs and Proposal of Equivalent Circuit |
Kansai Univ.@Shiwaya Yo-ichi 1,Omura Yasuhisa 1 |
| |
8 |
Empirical Model for effective channel width including
three-dimensional effects of SOI FinFET |
Kansai Univ. @Sanda Takashi 1, Konishi Hideki 1,
Omura Yasuhisa 1 |
| |
9 |
Optimizing of gate sizes for Improvement in a short
channel effect |
Kyoto Univ. 1@*Kusunoki Tomokuni 1, Saiki Takahide
1, Uenoyama Satoru 1, Maeda Yoshihito 1 |
| ’ |
10 |
Empirical Model of Phonon-Scattering-Limited Mobility
for Ultra-Thin SOI MOSFETs |
Kansai Univ. 1@Yamamura Tsuyoshi 1, Sato Singo
1, Omura Yasuhisa 1 |
| |
11 |
Theoretical Analysis of Inversion Layer Mobility
in Strained-Si pMOSFETs |
Osaka Univ. 1@Masaya Uchida 1, Takuji Sanda 1,
Yoshinari Kamakura 1, Kenji Taniguchi 1 |
| £’ |
12 |
A New Method for Calculating 3-dimensionally Distributed
Random Dopant Effects by 2-dimensional Device Simulator |
Advanced LSI Technology Lab., Toshiba Corp. 1.
Semiconductor Company, Toshiba Corp. 2.@*Shuichi Toriyama 1, Kazuya Matsuzawa
1, Hiroyoshi Tanimoto 2 |
| |
13 |
Investigation of the effect of a discrete impurity
in ultra-small FinFETs |
Osaka Univ. 1@*Takeda Hiroshi 1, Mori Nobuya 1,
Okamoto Masateru 1, Minari Hideki 1 |
| ’ |
14 |
2D Quantum Transport of Nanon-Scale MOSFET by Non-Equilibrium
Green's Function (NEGF) Method |
Grad. Sci.&Tech. Kobe Univ. 1, Fac. Eng. Kobe Univ.
2 @*Kagotani Naoaki, Helmy Fitriawan, Miyoshi Tanroku, Ogawa Matsuto |
| £ |
15 |
Multiband Simulation of Nanoscale Device Based
on a Non-Equilibrium Green's Function Method |
Kobe Univ. 1@Fitriawan Helmy 1, Ogawa Matsuto 1,
Miyoshi Tanroku 1 |